TWI528498B - 施加底部填充膜之預切割晶圓 - Google Patents

施加底部填充膜之預切割晶圓 Download PDF

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TWI528498B
TWI528498B TW101103275A TW101103275A TWI528498B TW I528498 B TWI528498 B TW I528498B TW 101103275 A TW101103275 A TW 101103275A TW 101103275 A TW101103275 A TW 101103275A TW I528498 B TWI528498 B TW I528498B
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wafer
underfill
tape
metal bumps
thinned
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金潤相
吉娜 洪
羅絲 古諾
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漢高智慧財產控股公司
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
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    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
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    • H01L2224/73101—Location prior to the connecting process on the same surface
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
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Description

施加底部填充膜之預切割晶圓
本發明係關於製作半導體晶粒之方法。
本申請案主張2011年2月1日提出申請之美國臨時專利申請案第61/438,327號之權利，該案件之內容以引用方式併入本文中。
電設備及電子設備之微型化及輕量化已導致需要較薄半導體裝置及較薄半導體封裝。一種製造較薄半導體晶粒之方式係自晶粒之背側(非活性側)移除過量材料。此藉由自切割出個別晶粒之半導體晶圓之背側移除過量材料更容易完成。過量晶圓之移除通常出現於研磨過程(通常稱作背側研磨)中。
一種製造更小且更有效半導體封裝之方式係採用具有附接至封裝之作用面之金屬凸塊陣列的封裝。金屬凸塊經佈置以與基板上之結合墊匹配。在金屬回流成熔體時，其與結合墊連接，形成電連接及機械連接二者。此金屬凸塊封裝通常稱作「覆晶」，此乃因凸起之半導體經翻轉以附接至其基板。
在半導體與基板間存在熱失配，使得在重複熱循環下對金屬互連件施加應力，從而潛在地導致失效。為抵消此問題，將囊封材料(通常稱作底部填充料)佈置於半導體與基板間圍繞金屬凸塊之空隙中。
半導體封裝製作中之當前趨勢偏好以晶圓級完成盡可能 多之製程步驟，允許同時處理多個積體電路，而非如同晶粒個體化後所發生的那樣個別地處理。不幸的是，尤其在研磨步驟中薄化晶圓時，底部填充料施加不能充分適宜於晶圓級處理，此乃因處置由於薄化晶圓之易碎性而變得甚至更困難。
因此，需要不會損害晶圓之脆性之將晶圓級底部填充材料施加至薄化晶圓的方法。
本發明係關於製造施加底部填充料之薄化半導體的方法，該方法包含：(a)提供半導體晶圓，該半導體晶圓之頂部側上面具有複數個金屬凸塊及視情況垂直穿過矽晶圓之矽通孔；(b)將背研磨膠帶層壓至該晶圓頂部，覆蓋該等金屬凸塊及矽通孔；(c)薄化該晶圓之背側；(d)將切割膠帶安裝至薄化晶圓之背側並將該矽晶圓及切割膠帶安裝至切割框；(e)移除背研磨膠帶；(f)提供預切割成晶圓形狀之底部填充材料；(g)使該底部填充料與該晶圓對準並將該底部填充料層壓至該晶圓。
晶圓係半導體材料，通常為矽、砷化鎵、鍺或類似化合物半導體材料。根據工業文獻中充分記載之半導體及金屬製作方法在晶圓頂部側上形成複數個金屬凸塊及其金屬成份。
出於將電路自一個晶圓連接至另一晶圓之目的，矽通孔係完全延伸貫穿矽晶圓之垂直通道。
本發明方法中所用之切割膠帶的目的係在切割操作期間支撐晶圓。切割膠帶可自多個來源購得且在一種形式中係由載體上之熱敏性、壓敏性或UV敏感性黏著劑組成。載體通常係聚烯烴或聚醯亞胺之撓性基板。在分別施加熱、拉應變或UV時，黏著性降低。通常，釋放襯墊覆蓋黏著層且可在即將使用切割膠帶之前容易地移除。
背研磨膠帶之目的係在晶圓薄化過程期間保護並支撐金屬凸塊及晶圓之頂部表面。背研磨膠帶可自多個來源購得且在一種形式中係由載體上之熱敏性、壓敏性或UV敏感性黏著劑組成。載體通常係聚烯烴或聚醯亞胺之撓性基板。在分別施加熱、拉應變或UV時，黏著性降低。通常，釋放襯墊覆蓋黏著層且可在即將使用背研磨膠帶之前容易地移除。可藉由機械研磨、雷射研磨或蝕刻實施背研磨操作。
已知適於作為可呈膜形式之底部填充料化學物質的黏著劑及囊封劑，如同製造底部填充膜之方法一樣。底部填充材料之厚度可經調節，以便可在層壓後完全或僅部分覆蓋金屬凸塊。在任一情形下，供應底部填充材料以使其完全填充半導體與預期基板間之空間。在一個實施例中，在載體上提供底部填充材料並將其用釋放襯墊保護。因此，將以三層形式提供底部填充材料，其中順序為第一層係載體，例如撓性聚烯烴或聚醯亞胺膠帶，第二層係底部填充材料，且第三層係釋放襯墊。在即將使用之前，移除釋放襯墊並通常在底部填充料仍附接至載體時施加底部填充 料。在將底部填充料施加至晶圓後，移除載體。
參照該等圖進一步闡述本發明。在該等圖中，可以矽晶圓之作用面(含有金屬凸塊之面)向上或向下定向來顯示切割膠帶、矽晶圓、金屬凸塊、底部填充料及背研磨膠帶中之一或多個元件之總成。可以由專業人員確定之任一定向處理該總成。切割膠帶、背研磨膠帶及底部填充料中之每一者均顯示無釋放襯墊。在載體上提供切割膠帶及背研磨膠帶且在使用後丟棄。彼等熟習此項技術者應理解，通常使用釋放襯墊來保護切割膠帶或背研磨膠帶之壓敏性黏著劑，且在即將使用前移除釋放襯墊。繼續對層壓於晶圓之活性側上之底部填充層實施切割及結合步驟。
圖1a及1b繪示製備具有由底部填充料支撐之金屬凸塊的薄化矽晶圓之第一先前技術方案。製備在矽晶圓之一個面(作用面)上具有金屬凸塊11之矽晶圓10。用膠帶12覆蓋金屬凸塊11以在晶圓薄化期間保護晶圓之作用面。膠帶通常稱作背研磨膠帶。薄化晶圓之背側以產生薄化晶圓13。在移除背研磨膠帶時，將具有背研磨膠帶12之薄化晶圓13放置於真空夾盤台17上。將底部填充材料14層壓於晶圓之作用面上，從而圍繞並囊封金屬凸塊11。將切割膠帶15安裝於晶圓之薄化背側上，且隨後將晶圓放置於切割框(或夾具)16中用於隨後切割成個別半導體。此方法之缺點在於在移除背研磨膠帶後，晶圓易碎且在將晶圓層壓於切割膠帶上並放置於切割框中之前其未受到支撐。
圖2a及2b繪示製備具有由底部填充料支撐之金屬凸塊的 薄化矽晶圓之第二先前技術方案。製備在矽晶圓之一個面(作用面)上具有金屬凸塊11之矽晶圓10。用保護性背研磨膠帶12覆蓋金屬凸塊11。薄化晶圓之背側以產生薄化晶圓13。將切割膠帶15安裝於晶圓之背側上，且將晶圓放置於真空夾盤台20上之切割框16中。將底部填充材料14層壓於晶圓之作用面上，從而圍繞並囊封金屬凸塊11。此方法之缺點在於底部填充材料在界面18處連接切割框，從而導致在層壓期間在底部填充料中起皺。
圖3a及3b繪示製備具有由底部填充料支撐之金屬凸塊的薄化矽晶圓之第三先前技術方案。製備在矽晶圓之一個面(作用面)上具有金屬凸塊11之矽晶圓10。在矽晶圓之作用面上佈置兩層膠帶19(其中一層係保護性背研磨膠帶12且第二層係底部填充材料14)，其中底部填充層與金屬凸塊11接觸並覆蓋其。薄化晶圓之背側以產生薄化晶圓13。將切割膠帶15安裝於晶圓之背側上，且將晶圓放置於真空夾盤台20上之切割框16中。移除兩層膠帶19中之背研磨膠帶層12，留下底部填充材料14。此方法之缺點係背研磨膠帶與底部填充材料間之相互作用。背研磨膠帶對底部填充層之黏著力可比底部填充層對晶圓之黏著力強。此可造成在移除背研磨膠帶期間底部填充層自晶圓剝離。另外，晶圓之均勻薄化可受到背研磨膠帶之厚度變化的影響。當底部填充料之厚度變化與背研磨膠帶之厚度變化相加時，總厚度變化增加且對薄化後之晶圓厚度之均勻性具有甚至更大的有害影響。
圖4a及4b繪示本發明方法：製備具有複數個金屬凸塊11及可選矽通孔21之厚矽晶圓10。將保護性背研磨膠帶12層壓於金屬凸塊及矽晶圓之頂部表面上。將用以在隨後切割期間支撐薄化晶圓之切割膠帶15安裝於薄化晶圓之背側。將具有切割膠帶15及背研磨膠帶12之晶圓13安裝至切割框16中，其中晶圓之頂部側面向上且切割膠帶與切割框接觸。移除背研磨膠帶。提供在一側上具有底部填充材料14之載體膠帶17。預切割底部填充材料14以配合晶圓之頂部表面。使底部填充料與晶圓接觸，使形狀對準，並在載體仍完好之情況下層壓至晶圓之作用面(具有金屬凸塊)。在進一步處理之前移除載體。
因此，在一個實施例中，本發明係關於製造施加底部填充料之薄化半導體晶圓的方法，其包含：(a)提供半導體晶圓，該半導體晶圓之頂部側上面具有複數個金屬凸塊及視情況垂直穿過矽晶圓之矽通孔；(b)將背研磨膠帶層壓至該晶圓頂部，覆蓋該等金屬凸塊及矽通孔；(c)薄化該晶圓之背側；(d)將切割膠帶安裝至薄化晶圓之背側並將該矽晶圓及切割膠帶安裝至切割框；(e)移除背研磨膠帶；(f)提供預切割成晶圓形狀之底部填充材料；(g)使該底部填充料與該晶圓對準並將該底部填充料層壓至該晶圓。
此方法具有兩個主要優點：(i)在整個製作步驟期間，薄化晶圓係由背研磨膠帶或切割膠帶或二者支撐，及(ii)由於底部填充料經預切割成晶圓形狀，故底部填充料不會碰撞切割框，從而消除在底部填充料層壓至晶圓期間起皺或 產生空隙之任何可能性。
10‧‧‧矽晶圓
11‧‧‧金屬凸塊
12‧‧‧背研磨膠帶
13‧‧‧薄化晶圓
14‧‧‧底部填充材料
15‧‧‧切割膠帶
16‧‧‧切割框(或夾具)
17‧‧‧載體膠帶
18‧‧‧界面
19‧‧‧兩層膠帶
20‧‧‧真空夾盤台
21‧‧‧矽通孔
圖1a及1b連續地繪示製備具有由底部填充料支撐之金屬凸塊的薄化矽晶圓之第一先前技術方案。
圖2a及2b連續地繪示製備具有由底部填充料支撐之金屬凸塊的薄化矽晶圓之第二先前技術方案。
圖3a及3b連續地繪示製備具有由底部填充料支撐之金屬凸塊的薄化矽晶圓之第三先前技術方案。
圖4a及4b連續地繪示製備具有由底部填充料支撐之金屬凸塊的薄化矽晶圓之本發明方案。
10‧‧‧矽晶圓
11‧‧‧金屬凸塊
12‧‧‧背研磨膠帶
13‧‧‧薄化晶圓
14‧‧‧底部填充材料
15‧‧‧切割膠帶
16‧‧‧切割框(或夾具)
17‧‧‧載體膠帶
21‧‧‧矽通孔

Claims (1)

  1. 一種製造施加底部填充料之薄化半導體晶圓的方法，其包含：(a)提供半導體晶圓，該半導體晶圓在其頂部側上具有複數個金屬凸塊，及視情況垂直穿過該矽晶圓之矽通孔；(b)將背研磨膠帶層壓至該晶圓之該頂部，以覆蓋該等金屬凸塊及矽通孔；(c)薄化該晶圓之背側；(d)將切割膠帶安裝至該薄化晶圓之該背側並將該矽晶圓及切割膠帶安裝至切割框；(e)移除該背研磨膠帶；(f)提供預切割成該晶圓之形狀的底部填充材料，其中該底部填充料係置於釋放襯墊與載體間；(g)於使該底部填充料與該晶圓對準並將該底部填充料層壓至該晶圓前，移除該釋放襯墊。
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WO2012106191A2 (en) 2012-08-09
CN103415917A (zh) 2013-11-27
KR101960982B1 (ko) 2019-07-15
EP2671249A2 (en) 2013-12-11
US9281182B2 (en) 2016-03-08
US20130210239A1 (en) 2013-08-15
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JP2017041638A (ja) 2017-02-23
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