TWI251921B - Designs and methods for conductive bumps - Google Patents

Designs and methods for conductive bumps Download PDF

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Publication number
TWI251921B
TWI251921B TW093128593A TW93128593A TWI251921B TW I251921 B TWI251921 B TW I251921B TW 093128593 A TW093128593 A TW 093128593A TW 93128593 A TW93128593 A TW 93128593A TW I251921 B TWI251921 B TW I251921B
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TW
Taiwan
Prior art keywords
layer
diffusion barrier
tin
metal
bump
Prior art date
Application number
TW093128593A
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English (en)
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TW200520192A (en
Inventor
Mark Bohr
Sridhar Balakrishnan
Valery Dubin
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Intel Corp
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Publication of TW200520192A publication Critical patent/TW200520192A/zh
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Publication of TWI251921B publication Critical patent/TWI251921B/zh

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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

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1251921 (1) 九、發明說明 【發明所屬之技術領域】 本說明書係關於半導體加工製造，又更具體地關於用 於積體電路的凸塊，就像在晶粒封裝中一樣。 【先前技術】 在晶粒封裝加工期間，可在晶粒基材和周圍的封裝件 之間設置數個導電層。晶粒封裝件可利用導電層加以焊接 ’且焊接層可與更下層的導電層接觸。該更下層的導電層 可加以圖案化而含有一或更多個導電凸塊，並且可稱之爲 「凸塊」層。凸塊可與基底層金屬（BLM)接觸，該基底 層金屬係直接地或間接地與基材接觸。該凸塊與基底層金 屬可含有一或更多種性質，由該一或更多種性質可會能導 致一或更多個電子遷移問題或層劣化。 【發明內容】 本發明之一或更多個實施例的技術、方法及結構係關 於積體電路及晶粒封裝。具體而言，一或更多個實施例係 關於在基材上製造凸塊以防止銅與錫摻混在一起。本揭示 內容之一或更多個實施例可減少許多與銅錫金屬間形成有 關的電子遷移問題，並可減少一或更多層中形成的晶鬚。 附圖及以下的說明中詳細說明了 一或更多個實施例。 有一實施例中，裝置包含半導體基材以及和該半導體基材 接觸的第一導電層。該第一導電層可包含基底層金屬，例 (2) 1251921 如銅。該裝置復包含與該第一導電層接觸的 在擴散阻障層表面上的潤溼層及在溼潤層表 。該凸塊層可包括錫，並且錫凸塊層可經電 障層可防止銅及錫擴散穿過擴散阻障層。擴 抑制凸塊層的鬚型形成。由說明和圖案，並 圍將使一或更多個實施例之其他特徵與優點 在半導體晶圓加工時，在基材上形成裝 以電力連結至晶粒封裝件。電力連結至晶粒 晶粒封裝件與晶圓上的下層導電互連件層之 層達到。該焊料層可能經常都包括錫或錫合 導電互連件層可爲最下層金屬層或最接近基 此金屬層可稱之爲基底層金屬（BLM)。有 金屬可作爲擴散阻障層以防止焊料遷移至晶 。晶粒的墊子可包括一或更多層金屬層，例 發明之一或更多個實施例中，可在基底層金 層以作爲基底層金屬的銅與擴散阻障層上方 擴散阻障層。 一層中含錫且鄰近層中含銅的晶粒封裝 可能會使晶粒封裝件互連件產生一或更多個 這些不利的問題之中有些可能會使晶粒封裝 力和機械性質劣化，降低形成此互連件的產 晶鬚和脫層等不規則不想要的區帶。脫層可 多層的劣化或物性分離。這些不利的問題之 1 A至1 D圖例示並說明於下。 擴散阻障層、 面上的凸塊層 鍍。該擴散阻 散阻障層也可 由申請專利範 顯而易見。 置及互連件並 封裝件可利用 間的導電焊料 金。有時候， 材的金屬層。 時候，基底層 粒的下層墊中 如鋁層。在本 屬表面上形成 層的錫之間的 件互連件結構 不利的問題。 件互連件的電 率或甚至形成 能涉及一或更 中有些可由第 -6- (3) (3)1251921 【實施方式】 第1A至1 B圖表示含例示性凸塊脫層的晶粒封裝件 互連件之圖形。第1 A圖中的凸塊1 1 0係包括錫合金，錯 錫’的焊料區帶。如標不區帶1 1 5所不，凸塊1 1 〇可符合 下方的互連件或基底層金屬1 2 5的形狀。凸塊丨1 〇可接觸 並覆蓋下方的互連件或基底層金屬之邊緣和側壁。 第1B圖係存在基底層金屬125、鉛錫凸塊1 1〇和晶 粒基材區130之區帶115的圖形。在此圖中，在基材13〇 與凸塊1 1 0之間的層1 2 5、1 1 0當中發生脫層。此脫層可 由基底層金屬125之一或更多種性質引發。基底層金屬 1 2 5可以使基底層金屬1 2 5在烘烤或熱處理期間劣化的方 式建構。劣化及脫層可減少層1 2 5、1 1 〇之間的導電表面 積並造成與電子遷移有關的故障。 晶粒封裝件互連件中的故障可爲與電子遷移有關的故 障及其他可由層材料和層界面的性質引起的故障。有些與 電子遷移有關的故障可能由於層1 2 5、1 1 0的冶金性質、 增加的熱問題及層1 2 5、1 1 0之間一或更多個孔隙1 2 0之 成長而引發。區帶1 1 5的電子遷移可造成更高的電流密度 並增加電磁應力。如以下一或更多個實施例中說明的，提 出使與電子遷移有關的晶粒封裝件互連件故障之複數種方 法、結構和技術。 晶粒封裝件互連件之一或更多層的有些冶金性質可能 會導致晶粒封裝件互連件故障。此冶金性質的實施例包括 (4) (4)1251921 非保角表面、材料在不同溫度時的相轉移及不同層組成成 分的擴散和摻混。例如，錫可爲用於一或更多晶粒封裝件 互連件層的普通金屬。然而，錫可在不同溫度時存在二同 素異形體。在溫度約1 3 .2 °C以上時，硬質、閃亮且導電性 α錫（四面體’ α-相錫）可處於穩定相。若溫度低於13.2 °C時，β錫（鑽石立方結構，β -相錫）可能在熱力學上較 有利。由於二相的密度不同，所以α至β相的轉移可能伴隨 2 6%的體積增量。相轉移時的體積變化可使錫與其他層之 間的界面變形。另外，β錫係呈粉末狀且不具互連件所需 的機械強度。因而，若錫係呈β相，錫層和互連件的機械 強度將會衰退。至少由於以上的原因，錫層或互連件可在 低溫時由α相轉變成β相並可能導致互連件故障。如以下一 或更多個實施例中說明的，提出複數種方法、技術及結構 以防止錫的低溫相轉移。 儘管凸塊1 1 〇如1 〇〇中的焊料凸塊所示，該凸塊可爲 凸塊或凸塊層，該凸塊層並非焊料層，而是毗鄰焊料層的 層。再者，凸塊1 1 0不可直接地接觸晶粒封裝件1 0 5。如 下圖中說明的，該凸塊或凸塊層可包括其他的材料，例如 銅，並可直接地接觸基底層金屬或其他層互連件。 第1 C至1 D圖顯示不同層的銅和錫之非所欲的摻混 實施例。例如，第1 c圖顯示焊料層中含孔隙1 5 5的晶粒 封裝件互連件1 5 0。不同層的銅和錫之擴散或摻混可能會 形成銅錫介金屬，並可能有助於產生孔隙1 5 5。互連件 1 5 0的電阻可能會由於焊料中形成孔隙而增加，並可能導 -8- (5) (5)1251921 致電子遷移的問題◦其他非所欲的形成，例如晶鬚，也可 能由於銅和錫的摻混而形成。晶鬚可能會導致錫凸塊提高 壓縮應力，並可能會導致晶粒封裝件互連件故障。 第1 D圖顯示含擴散或摻混的銅和錫的晶粒封裝件互 連件之不同層的另一例示性圖形1 6 0。第1 D圖顯示銅和 錫形成的實施例。例如，在圖形1 6 0中，銅1 7 2、1 7 8和 錫176的層之間有形成Cu3Sn的區帶165和Cu6Sn5的區 帶 1 70。 有些習知技術嘗試防止不同晶粒封裝件互連件層的銅 和錫之摻混和擴散。例如使用鉛5錫凸塊可用以防止晶鬚 形成。然而，使用鉛5錫凸塊可能會有電子遷移的問題， 如以上說明的，該電子遷移的問題可導源於錫的低溫相轉 移。再者，鉛可能造成環境和健康的問題。在另一習知實 施例中，濺鍍的鎳可用以防止銅擴散至錫中。然而，濺鍍 的鎳具有不良的擴散阻障性質且無法適度地防止銅和錫之 擴散或摻混。如以下一或更多個實施例中說明的，提出複 數種方法、技術和結構以防止不同晶粒封裝件互連件層之 間的銅和錫之擴散與摻混。 本揭示內容之一或更多個實施例也提出複數種方法、 技術和結構以防止錫凸塊在基底層金屬蝕刻期間劣化。大 體而言，在包括鈦、鋁或鎳釩的基底層金屬蝕刻期間之錫 凸塊的侵触和氧化都得以防止。 第2圖顯示晶粒封裝件互連件的實施例。在矽基材 205表面上形成基底層金屬230，且基底層金屬230可包 (6) (6)1251921 括銅。也可在經圖案化的絕緣體、樹脂或介電層2 3 5，例 如聚醯亞胺層，表面上形成基底層金屬230。基底層金屬 2 3 0可包括黏著層2 3 2和晶種層2 3 4。黏著層2 3 2可形成 於，例如，基材2 0 5或介電層2 3 5上。黏著層2 3 2可助於 接合或黏接二不同表面，例如協助基底層金屬黏至下方的 表面。晶種層234可助於黏著層232表面上建立基底層金 屬結構。晶種層可作爲相對於下方層之平滑界面，並可促 成正確的生長及基底層金屬的形成。黏著層23 2可包括鈦 、鈦氮及鈦矽氮，且晶種層2 3 4可括鎳、鎳釩及鈷。習知 的金屬層，例如鋁層2 3 3，可形成於黏著層2 3 2與晶種層 23 4之間以改良基底層金屬之一或更多種性質。含附帶金 屬層之基底層金屬性質改良可包括抑制晶鬚形成及防止熱 加工和電磁應力作用期間的層脫層和劣化。 擴散阻障層225可選擇性地設在基底層金屬23 0表面 上。選擇性沈積可表示某些表面可含有僅沈積於該表面之 一部分的另一層。擴散阻障層22 5可爲無電型的，並位於 可防止基底層金屬2 3 0的銅與凸塊層2 1 5或焊料層2 1 0的 錫摻混之位置。擴散阻障層22 5可防止銅錫介金屬形成及 晶鬚形成。擴散阻障層22 5可防止凸塊脫層並改善製造晶 粒封裝件互連件的加工產率。其他的擴散阻障層22 5可包 括鈷硼磷、鈷鎢磷、鈷鎢硼、鈷鎢硼磷、鎳硼磷、鎳鎢磷 、鎳鎢硼及鎳鎢硼磷之中任一者。 沈積在不規則形狀物體、圖案和凹部時，無電沈積物 可提供一或更多個優點。無電電鍍時，電子由化學還原劑 - 10- (7) (7)1251921 供應。大體而g ’無電電鍍可表示金屬離子由含還原劑的 溶液還原。該還原劑可在催化性表面上氧化而提供電子。 在電鍍期間無電沈積物可具有高均勻度且幾乎沒有或沒有 壓縮應力。無電沈積物傾向在下方結構的所有形狀上形成 均勻的厚度，因此可提供更均勻的電流密度並降低某些電 子遷移問題。無電阻障層也可提供低成本、具選擇性及不 定形的優點。 擴散阻障層可含有其他可防止或抑制含銅的錫擴散穿 過擴散阻障層。舉例來說，可使用錫及銅具有低反應性或 擴散性的可電鍍材料，例如第VIII族（例如，鈷、鎳、 鐵、釘、铑、銥及餓）與第VI族（例如，鎢、鉬及鉻） 合金化形成的金屬及類金屬（例如，硼、磷及氮）。 擴散阻障層22 5表面上可設置溼潤層（未圖示）。溼 潤層也可選擇性地沈積在擴散阻障層2 2 5的複數個部分上 。溼潤層可包括鈷硼、鎳硼及鎳磷之中任一者。 在溼潤層表面上設置凸塊層2 1 5，並在凸塊層2 1 5表 面上設置焊料層2 1 0。晶粒封裝件2 2 0係位於焊料層2 1 0 表面上並以電力連結至焊料層2 1 0。電力連結至晶粒封裝 件2 2 0可使電流在基材附近或上面的晶粒封裝件和裝置和 互連件之間流動。錫可在凸塊層2 1 5、焊料層2 1 0或兩層 2 1 0、2 1 5 當中。 在本揭示內容之一或更多實施例中，可電鑛錫以抑制 晶鬚形成及相關的電子遷移故障。錫之電鍍也可防止錫的 低溫（例如，1 3.2 °C左右）相轉移，並防止與β錫有關的 -11 - (8) (8)1251921 機械及電子遷移故障。錫的電鍍可包括錫及錫的合金，例 如〇. 7銅、鉍、銻及3 .5銀。錫可由含錫鹽（例如，硫酸 錫、氯化錫）、酸（例如，硫酸、磺酸）及其他添加物（ 例如’抑制劑，例如聚醚二醇或晶粒精製劑及抗氧化劑） 的溶液，在固定電流（例如，1 0至1 0 0毫安培/平方公 分左右）或電壓時電鍍。 第3圖係製造第2圖所示的實施例之例示性流程圖。 可在3 1 0時在晶圓形成一或更多個裝置及銅互連件◦接著 可在3 1 2時利用矽氮及聚醯亞胺使晶粒封裝件互連件200 鈍化。藉著使用微影法及蝕刻作業，可使接觸墊（未圖示 )開孔以供銅金屬化。可使用電漿氣相沈積法（P V D )、 化學氣相沈積法（CVD )、原子層沈積法（ALD )或者在 314時電鍍而沈積基底層金屬230。基底層金屬230可包 括黏著層（例如，鈦、鈦氮或鈦矽氮）及晶種層（例如， 鎳、鎳釩或鈷）。黏著層與晶種層之間可形成附帶的金屬 層，例如鋁，以改良基底層金屬2 3 0的阻障性質。 接著可在3 1 6時沈積並圖案化光阻劑層。擴散阻障層 2 2 5可在3 1 8時形成。擴散阻障層2 2 5可爲無電型，並可 包括鈷硼磷、鈷鎢磷、鈷鎢硼、鈷鎢硼磷、鎳硼磷、鎳鎢 磷、鎳鎢硼及鎳鎢硼磷之中任一者。接著，可在3 2 0時在 擴散阻障層上沈積溼潤層。溼潤層可包括鈷硼、鎳硼、鈷 磷、鎳磷之中任一者。錫或錫合金的電鍍可在3 22時進行 。錫之某些合金可包括0 · 7銅、鉍、銻及3 . 5銀之中任一 者。接著可在3 24時移除光阻劑並可在3 2 6時蝕刻基底層 -12- (9) 1251921 金屬2 3 0。 利用擴散阻障層2 2 5形成晶粒封裝件互連件2 0 0可伴 隨使用蝕刻以便使基底層金屬2 3 0圖案化。基底層金屬 2 3 0的蝕刻可降低錫凸塊及聚醯亞胺的劣化（例如，侵蝕 或氧化）。 第4圖顯示晶粒封裝件互連件4 0 〇之另一實施例。由 銅形成凸塊層415，並直接地形成於基底層金屬430表面 上。基底層金屬430可爲銅。擴散阻障層425可爲無電型 並可設置於（銅）凸塊層415表面上及錫或錫合金層下方 。擴散阻障層4 2 5可提供類似於第2圖的互連件2 0 0之擴 散阻障層22 5。舉例來說，擴散阻障層42 5可藉由防止銅 和錫擴散穿過擴散阻障層而防止（銅）凸塊層4 1 5和錫層 4 3 5之間的銅及錫擴散或摻混。擴散阻障層4 2 5可防止凸 塊層415中的晶鬚形成。儘管圖形中顯示數層415、425 、4 3 5的例示性厚度，但層厚度可由所示的厚度再行改變 〇 可在錫層4 3 5上方形成焊料層4 1 0，並可使封裝件層 4 2 0連至焊料層4 1 0 ◦封裝件層4 2 0係以電力連至互連件 400中所有其他的導電層410、435、425、415、430，使 電流在基材附近或上面的晶粒封裝件和裝置和互連件之間 流動。 第5圖顯示製造第4圖所示的實施例之例示性流程圖 。互連件400在3 1 0、3 1 2、3 14及3 1 6的加工流程可以類 似的方法進行’並按照第2至3圖中互連件2 0 0的加工流 -13- (10) 1251921 程的順序。在5 1 8時，形成並電鍍銅凸塊層4 1 5。 第2圖中電鍍錫凸塊層215，電鍍銅凸塊層415可 勻的厚度、晶鬚形成抑制及降低至零壓縮應力的優 散阻障層425可爲無電型，並可在522時在凸塊層 面上形成，並在5 22時在凸塊層415表面上形成溼 第4圖中未圖示）。無電型擴散阻障層42 5可包括 、鈷鎢磷、鈷鎢硼、鈷鎢硼磷、鎳硼磷、鎳鎢磷、 及鎳鎢硼磷之中任一者，而溼潤層可包括鈷硼、鎳 憐及鎮憐之中任一'者。 在5 24時，在溼潤層的表面上形成並電鍍鋁層 電鍍鋁層4 3 5可提供如以上說明在互連件2 0 0中電 類似優點。此類似的優點可包括抑制晶鬚形成並防 低溫相轉移。可在5 1 6時移除光阻劑並可在5 2 8時 底層金屬43 0。可在錫層4 3 5上方形成焊料層410 使封裝件層420連至焊料層410。焊料層410可包 也可加以電鍍。 第6圖顯示晶粒封裝件互連件600之另一實施 由銅形成凸塊層6 1 5，並直接地形成於基底層金屬 面上。基底層金屬430可爲銅。擴散阻障層625可 型並可設置於銅凸塊層615表面上及錫或錫合金層 擴散阻障層62 5可環繞在凸塊層6 1 5的四周，使基 屬6 3 0與凸塊層6 1 5的底表面接觸。可以無電型擴 層62 5覆蓋在所有凸塊層61 5的非基底層金屬630 ，該表面包括上表面和側表面。然而，凸塊層6 1 5 如同在 提供均 點。擴 415表 潤層（ 鈷硼磷 錬鎮砸 硼、鈷 43 5 ° 鍍鋁的 止錫的 鈾刻基 ，並可 含錫， 例。可 6 3 0表 爲無電 下方。 底層金 散阻障 表面上 的外表 -14- (11) 1251921 面可以物理的方式與可能包括錫的層形成區隔以免 物理接觸。無電型擴散阻障層625可提供類似於第 互連件400的無電型擴散阻障層之優點。舉例來說 型擴散阻障層6 2 5可防止凸塊層6 1 5中的銅和錫層 的錫之間的銅及錫的擴散或摻混，並可防止凸塊層 的晶鬚形成。 可在無電型擴散阻障層6 2 5上方形成的焊料層 並可使封裝件層6 2 0連至焊料層6 1 0。焊料層6 1 0 錫並可加以電鍍。 第7圖顯示製造第6圖所示的實施例之例示性 。互連件 600 在 310、312、314、316 及 518 的加 可以類似的方法進行，並按照第4至5圖中互連件 加工流程的順序。 在720時，形成並電鍍銅凸塊層615。如同在 中電鏟錫凸塊層215，電鍍銅凸塊層615可提供均 度、晶鬚形成抑制及降低至零壓縮應力的優點。擴 層625可爲無電型，並可在722時在凸塊層615表 成’並在7 2 2時在凸塊層6 1 5表面上形成溼潤層（ 中未圖示）。無電型擴散阻障層62 5可包括鈷硼磷 磷、銘鎢硼、鈷鎢硼磷、鎳硼磷、鎳鎢磷、鎳鎢硼 硼磷之中任一者，而溼潤層可包括鈷硼、鎳硼、鈷 磷之中任一者。可在72 0時移除光阻劑並可在722 基底層金屬6 3 0。擴散阻障層625可爲無電型並可 時在凸塊層615上形成，並在726時在凸塊層615 直接的 4圖的 ，無電 6 1 0中 615中 6 10, 可包括 流程圖 工流程 4 00的 第2圖 勻的厚 散阻障 面上形 第6圖 、銘鶴 及錬鶴 磷及鎳 時蝕刻 在724 表面上 -15- (12) (12)1251921 形成溼潤層（第6圖中未圖示）。無電型擴散阻障層6 2 5 可包括鈷硼磷、鈷鎢磷、鈷鎢硼、鈷鎢硼磷、鎳硼磷、鎳 鎢磷、鎳鎢硼及鎳鎢硼磷之中任一者，而溼潤層可包括鈷 硼、鎳硼、鈷磷及鎳磷。其他的導電層，例如焊料層6 1 0 ’可形成於無電型擴散阻障層6 2 5和淫潤層表面上，並可 與封裝件層62 0相接觸。 第8圖顯示電力電腦系統中的晶粒封裝件結構之實施 例。如以上說明與第3、5及7圖中說明的，在基材上形 成晶粒封裝件所需之一或更多個互連件和層。設置於電路 板8 5 0上時，晶粒封裝件8 1 0可使晶粒封裝件內之內電路 與晶粒封裝件外部且在電路板8 5 0上的電路連結。電路板 8 5 0可含有其他的晶片和零件，例如記憶體8 4 3、中央處 理單元（CPU) 8 2 5及控制器或其他一些邏輯單元8 3 3。 電路板8 5 0可製成多層以便在複數個零件之間發送訊號， 並可用於電腦及/或電子產品系統8 60中。 已經說明過本發明有許多實施例。儘管如此，要瞭解 可進行不同的修飾而不會悖離本發明的精神和範圍。舉例 來說，加工順序可由第3、5及7圖中所示的加工順序再 行改變。第7圖中，例如，在銅層已經形成並電鍍5 1 8以 供互連件6 0 0所需之後，可再沈積7 2 4無電型擴散阻障層 62 5。在無電型擴散阻障層62 5上形成726溼潤層之後， 可移除72 0光阻劑並可鈾刻722基底層金屬63 0。另一實 施例中，可使用無電型阻障層防止銅和錫之外的其他金屬 摻混，例如防止金和鋁摻混。 -16- (13) (13)1251921 【圖式簡單說明】 第1 A至1 D圖顯示有缺陷的凸塊圖形。 第2圖顯不製得的結構之貫施例。 第3圖係第2圖所示的實施例之例示性製造流程圖。 第4圖顯示製得的結構之實施例。 第5圖係第4圖所示的實施例之例示性製造流程圖。 第6圖顯不製得的結構之實施例。 第7圖係第5圖所示的實施例之例示性製造流程圖。 第8圖顯示電力/電腦系統的晶粒封裝件結構之實施 例。 【主要元件符號說明】 100 有 缺 陷 的 凸 塊 105 晶 封 裝 件 110 凸 塊 115 標 示 丨品 帶 1 20 孔 隙 125 基 底 層 金 屬 13 0 晶 、[/丄 基 材 1 5 0 晶 业丄 封 裝 件 互 連 件 1 55 孔 隙 1 6 0 晶 少丄 封 裝 件 互 連 件的不同層 1 65 Cu3S η 的 區 帶 -17- (14)1251921 1 70 1 72 1 76 1 78 200 205 2 10 2 15 220 225 230 232 23 3 234 23 5 3 10 3 12 3 14 3 16 3 18 320 322 324 326
CusSns的區帶 銅層 錫層 銅層 晶粒封裝件互連件 矽基材 焊料層 凸塊層 晶粒封裝件 擴散阻障層 基底層金屬 黏著層 鋁層 晶種層 介電層 加工流程 加工流程 加工流程 加工流程 加工流程 加工流程 加工流程 加工流程 加工流程 - 18- 1251921 (15) 400 晶 业丄 封 裝 件 互 連 件 4 1 0 焊 料 層 4 15 凸 塊 層 420 封 裝 件 層 425 擴 散 阻 障 層 43 0 基 底 層 金 屬 43 5 錫 層 5 16 加 工 流 程 5 18 加 工 流 程 520 加 工 流 程 522 加 工 流 程 524 加 工 流 程 526 加 工 流 程 528 加 工 流 程 600 晶 封 裝 件 互 連 件 6 10 焊 料 層 6 15 凸 塊 層 620 封 裝 件 層 625 擴 散 阻 障 層 630 基 底 層 金 屬 720 加 工 流 程 722 加 工 流 程 724 加 工 流 程 726 加 工 流 程 -19- 1251921 (16) 8 10 晶 、f/丄 封 825 中 央 處 833 邏 輯 單 843 記 憶 體 850 電 路 板 860 電 腦 及 BLM 基 底 層 EL Μ y \\\ 電 型 EM 電 子 遷 裝件 理單元 元 /或電子產品系統 金屬 移
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  1. (1) (1) Γ·擴顧 、申請專利範圍 附件2Α · 第93128593號專利申請案 中文申請專利範圍替換本 民國94年8月19日修正 1. 一種半導體裝置，其包含： 半導體基材； 與該半導體基材接觸的第一導電層，該第一導電層包 含基底層金屬，該基底層金屬包含銅； 與該第一導電層接觸的擴散阻障層； 在該擴散阻障層上面的潤溼層，以及 在該潤溼層上面的凸塊層，該凸塊層包括錫，該錫凸 塊層係經電鍍，該擴散阻障層係經調適以防止銅及錫擴散 穿過該擴散阻障層。 2 .如申請專利範圍第丨項之裝置，其中該擴散阻障層 係無電型擴散阻障層。 3 .如申請專利範圍第〗項之裝置，進一步包含位於該 凸塊層與晶粒封裝件之間的焊料層，其中該焊料層包含錫 〇 4.如申請專利範圍第丨項之裝置，其中該基底層金屬 包含黏著層和晶種層’其中該黏著層包含T i、T i N和 TiSiN中之一者，且該晶種層包含Ni、NiV和Co中之一 者。 5 ·如申請專利範圍第4項之裝置，其中該基底層金屬 (2) (2)1251921 進一步包含位於該黏著層和該晶種層之間的金屬層，其中 該金屬層包含鋁。 6 .如申請專利範圍第1項之裝置，其中該擴散阻障層 包含 CoBP、CoWP、CoWB、CoWBP、NiBP、NiWP、 NiWB、和NiWBP中之一者，其中該凸塊層進一步包含錫 台金，該錫合金包含0.7 Cu、Bi、Sb及3.5 Ag中之一者 ，其中該經電鍍之錫凸塊層係進一步調適以防止錫由a S n 低溫相轉移成爲β S η。 7 .如申請專利範圍第1項之裝置，其中該潤溼層包含 CoB、NiB和NiP中之一者，其中該擴散阻障層係進一步 經調適以降低凸塊層的脫層。 8 .如申請專利範圍第1項之裝置，其中該裝置進一步 包含濺鍍的基底層金屬，其中該擴散阻障層係進一步經調 適以降低與CiiSn介金屬形成有關的電子遷移。 9. 一種半導體裝置，其包含= 在半導體基材上的基底層金屬，該基底層金屬包含銅 在該基底層金屬上面的凸塊層，該凸塊層包含經電鍍 的銅層； 與該凸塊層接觸的擴散阻障層； 在該擴散阻障層上面的潤溼層，以及 與該凸塊層接觸的焊料層，該焊料層包括錫，該擴散 阻障層係進一步經調適以防止銅及錫擴散穿過該擴散阻障 層。 -2 - (3) (3)1251921 1 〇 ·如申請專利範圍第9項之裝置，其中該擴散阻障 層包含無電型擴散層。 Π .如申請專利範圍第9項之裝置，其中該基底層金 屬包含黏著層和晶種層，其中該黏著層包含Ti、TiN和 TiSiN中之一者，且該晶種層包含Ni、NiV和Co中之一 者。 1 2 .如申請專利範圍第1 0項之裝置，其中該基底層金 屬進一步包含位於該黏著層和該晶種層之間的金屬層，其 中該金屬層包含鋁，其中該擴散阻障層係經調適以抑制該 凸塊層中的晶鬚型形成。 13.如申請專利範圍第12項之裝置，其中該基底層金 屬進一步與該擴散阻障層接觸使該凸塊層所有的表面在物 理上與該焊料層分離。 1 4.如申請專利範圍第9項之裝置，其中該擴散阻障 層包含 CoBP、CoWP、CoWB、CoWBP、NiBP、NiWP、 NiWB和NiWBP中之一者，其中該溼潤層包含CoB、NiB 和N i P中之一者。 15. —種半導體製造的方法，其包含： 利用氮化矽及聚醯亞胺進行鈍化； 沈積基底層金屬； 沈積光阻劑層； 形成擴散阻障層，該擴散阻障層係經調適以防止不同 層之間的銅和錫之摻混； 在擴散阻障層上面形成潤溼層； (4) (4)1251921 形成凸塊層； 移除該光阻劑層；以及 蝕刻該基底層金屬。 1 6 .如申請專利範圍第！ 5項之方法，其中沈積該基底 層金屬包含電漿氣相沈積法（p V D )、化學氣相沈積法（ CVD)、以及原子層沈積法（alD)中之一者，其中該擴 散阻障層包含無電型擴散阻障層。 1 7 .如申請專利範圍第〗6項之方法，其中該基底層金 屬包含黏著層和晶種層，該黏著層包含Ti、TiN和TiSiN 中之一者，且該晶種層包含Ni、NiV和Co中之一者，其 中該無電型擴散阻障層係進一步經調適以降低凸塊層之脫 層。 1 8 ·如申請專利範圍第丨7項之方法，其中沈積該基底 層金屬包含在該黏著層和該晶種層之間沈積一金屬層，其 中該基底層金屬進一步包含一或更多個電力互連件。 1 9 .如申請專利範圍第〗8項之方法，其中該金屬層包 含鋁’其中該光阻劑層係經調適以便圖案化，其中該無電 型擴散阻障層係進一步經調適以降低與CviSn介金屬形成 有關的電子遷移。 2 0 ·如申請專利範圍第1 6項之方法，其中該無電型擴 散阻障層包含 CoBP、CoWP、CoWB、CoWBP、NiBP、 NiWP、NiWB、和 NiWBP 中之一者。 2 I .如申請專利範圍第1 6項之方法，其中該凸塊層包 含錫，該錫係經電鍍以防止錫由a S η低溫相轉移成爲β S η -4- (5) (5)1251921 ，其中經電鍍的錫係進一步調適以抑制晶鬚形成。 22·如申請專利範圍第16項之方法，其中該凸塊層進 一步包含錫合金，該錫合金包含0.7 Cu、Bi、Sb及3.5 A g中之一者，其中該錫合金係經電鍍以防止錫由a S η低 溫相轉移成爲β S η。 23 .如申請專利範圍第1 6項之方法，其該方法進一步 包含： 在凸塊層上形成焊料層，該焊料層包含錫；以及 將晶粒封裝件連接至該焊料層。 24·—種半導體製造的方法，其包含·· 利用氮化矽及聚醯亞胺進行鈍化； 沈積基底層金屬； 沈積光阻劑層； 形成銅層，該銅層係經電鍍； 形成無電型擴散阻障層，該無電型擴散阻障層係位於 該銅層與錫層之間，該無電型擴散阻障層係經調適以防止 銅和錫擴散穿過該無電型擴散阻障層； 在該無電型擴散阻障層上面形成潤溼層； 移除該光阻劑層；以及 飩刻該基底層金屬。 2 5 ·如申請專利範圍第2 4項之方法，其進一步包含在 該潤淫層及該無電型擴散阻障層上面形成焊料區帶，其中 該焊料區帶係與晶粒封裝件相接觸’其中該焊料區帶包含 錫。 (6) (6)1251921 2 6 .如申請專利範圍第2 4項之方法，其中該錫層包含 在該無電型擴散阻障層上面的焊料區帶，其中該焊料區帶 係與晶粒封裝件相接觸。 2 7 ·如申請專利範圍第2 4項之方法，其中該無電型擴 散阻障層包含 CoBP、CoWP、CoWB、CoWBP、NiBP、 NiWP、NiWB、和 NiWBP 中之一者。 2 8 . 一種半導體製造的方法，其包含： 利用氮化矽及聚醯亞胺進行鈍化； 沈積基底層金屬； 沈積光阻劑層； 形成凸塊層，該凸塊層包含銅，該銅凸塊層係經電鍍 9 移除該光阻劑層； 蝕刻該基底層金屬； 形成無電型擴散阻障層，該無電型擴散阻障層係位於 該銅凸塊層與錫層之間，該無電型擴散阻障層係經調適以 防止不同層之間的銅和錫之摻混；以及 在該無電型擴散阻障層上面形成潤溼層。 2 9.如申請專利範圍第28項之方法，其中該無電型擴 散阻障層包含 CoBP、CoWP、CoWB、CoWBP、NiBP、 NiWP、NiWB、和NiWBP中之一者，其中該基底層金屬 包含黏著層和晶種層，其中該黏著層包含Ti、TiN、和 TiSiN中之一者，且該晶種層包含Ni、NiV、和Co中之 (7) (7)1251921 3 〇 .如申請專利範圍第2 8項之方法，其中該基底層金 屬進一步在物理上與該無電型擴散阻障層相接觸，其中該 凸塊層包含外表面，其中該凸塊層的外表面係在物理上與 該含錫的層分隔而不相接。 3 1 .如申請專利範圍第2 8項之方法，其中該銅凸塊層 係進一步經調適以防止晶鬚形成，其中該無電型擴散阻障 層係進一步經調適以降低與CuSn介金屬形成有關的電子 遷移。 3 2 . —種含電路板的系統，其包含： 一或更多個含電路的組件；以及在該電路板上之一或 更多層，該一或更多層係用於該電路板上的組件之間發送 至少一訊號，其中該電路板上至少一組件包含晶粒封裝互 連件，該晶粒封裝互連件包含： 半導體基材； 與該半導體基材接觸的第一導電層，該第一導電層包 含基底層金屬，該基底層金屬包含銅； 與該第一導電層接觸的擴散阻障層； 在該擴散阻障層上面的潤溼層，以及 在該潤溼層上面的凸塊層，該凸塊層包含錫，該錫凸 塊層係經電鍍，該擴散阻障層係經調適以防止銅及錫擴散 穿過該擴散阻障層。 3 3 .如申請專利範圍第3 2項之系統，其中該一或更多
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