TW498508B - Semiconductor package and method of fabricating the same - Google Patents

Semiconductor package and method of fabricating the same Download PDF

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Publication number
TW498508B
TW498508B TW090110050A TW90110050A TW498508B TW 498508 B TW498508 B TW 498508B TW 090110050 A TW090110050 A TW 090110050A TW 90110050 A TW90110050 A TW 90110050A TW 498508 B TW498508 B TW 498508B
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Taiwan
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pattern
semiconductor package
scope
item
patent application
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TW090110050A
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English (en)
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Kye-Chan Park
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Dongbu Electronics Co Ltd
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    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Description

498508 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明（1 ) 【技術領域】 本發明係相關半導體封裝，更詳言之，係可輕薄短小， 並確保信賴性的半導體封裝及其製造方法。 【習知技術】 如眾所週知，電子產品因應消費者的講求十足，故有 輕薄短小的趨勢，配合此趨勢，安裝在主機板（m〇ther b〇ard) 上的半導體封裝亦形成可高密度安裝的輕薄短小化。 此類半導體封裝係具有將大部分半導體晶片，以如 EMC(Epoxy Molding Compound)之類的封裝材料封裝，且 將多數導線拉出/成形於該封裝材料外側的型態。 惟，如CCD(Charge Coupled Device)之類的元件，因為 具必須將主動區域開啟的特性，所以在利用EMC封裝上便 有困難。此乃CCD之經開啟的主動區域若接觸EMC的話， 該CCD的缺陷便裸露出。 所以，在為該CCD類半導體晶片的封裝上，便有提案 利用底座及蓋的封裝方法。以下，請參閱第丨圖及第2圖所 示，針對利用該底座及蓋而製造的習知半導體封裝，進行 說明。 第1圖所示係利用由陶瓷所形成之底座、及由玻璃所形 成之蓋’而製造之習知陶瓷封裝的剖面示意圖。 如圖所示，將CCD類的半導體晶片（5)搭載於由陶兗所 形成的陶究底座⑴上，並在搭載該半導體晶片的陶兗底座 (1)上側部分，以玻璃蓋（8)封裝，俾防止該半導體晶片 叉3染。該陶瓷底座（1)係整體形成四角狀，並在内部具階 本紐尺度適用中國國家標準（CNS)A4規格（2Ϊ0 X 297公爱)-^_____ (請先閱讀背面之注意事項再填寫本頁) ----訂---------線. 4 兕 5〇8 Α7
經濟部智慧財產局員工消費合作社印製 梯狀空穴（2)，且具備有將數個導線（4)由依端及另一端的階 梯面（3)，引出/成形於各自鄰接之外側的型態。該半導體 晶片（5)係利用環氧系列的黏接劑（6)而裝設於空穴（2)底面 上。該半導體晶片（5)的焊接墊（5a)係利用鋁或金線（7)而電 性連結於該導線（4)的一端，即電性連結於電極墊（4a)。 第2圖所示係利用emC與玻璃蓋而製造的習知塑膠封 裝之剖面示意圖。其中，與第丨圖相同的部分，以相同圖示 符號表示。 如圖所示，將半導體晶片（5)利用黏接劑裝設於由沖膜 塾（11)内導線（12)與外導線（13)所形成之一般導線框（2 〇) 的冲膜塾（11)上。該半導體晶片（5)之焊接墊（5a)係利用銘 或金線（7)，而電性連結於導線框（2〇)的内導線（12)上。以 使該半導體晶片（5)上面與經線焊的内導線部分不致被覆 蓋的方式’將該半導體晶片（5)下面與導線框（2〇)之一部 份，以EMC壓膜。圖示符號21係表以EMC所形成之EMC底 座在4 EMC底座（21)上部以玻璃盡（8)封裝，俾防止該半 導體晶片（5)受污染。 一 【發明欲解決之技術課題】 惟’上述的封裝專’因為構造的特性，所以在輕薄短 小上便較困難，因為可具備的導線數目存有極限，所以在 適用於南積體元件的封裝上便有困難。再者，陶究封裝乃 屬高價位者，在利用上亦較困難。此外，塑膠封裝在EMC 與玻璃間的細微間隙，即屬有機物之EMC與屬無機物之玻 璃間的物質本身特性差，隨EMC所產生的α粒子源，而造 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱) ----- ----------—--------1---------^ (請先閱讀背面之注音？事項再填寫本頁} ·
經濟部智慧財產局員工消費合作社印製
成半導體晶片受污染，導致其特性與信賴性的降低。 本^月乃針對為解決上述諸項問題而進行的發 月本I明之目的在於提供一種可輕薄短小化，且可破保 信賴性的半導體封裝及其製造方法。 【課題解決之手段】 e相關本發明之一見解的半導體封裝，係包含有：半導體 曰曰片金凸塊、玻璃基板、升高材料、錫球；其中，該半 導體晶片係靠近上面四周分別呈一列配置的焊接墊等；該 金凸塊係形成於該等焊接墊上者；該玻璃基板係具備有· 透過該金凸塊而電性連結於該半導體晶片之焊接墊上的内 圖案、與孩内圖案隔離的外圖案、及堰牆；該堰牆係依對 應該焊接墊方式，在一侧面上形成由連結該内圖案與該外 圖案間的圖案所形成之金屬圖案等，並依包圍該内圖案等 方式’在该連結圖案與一側面上形成相框狀的堰牆；該升 高材料係將該半導體晶片上，除該金屬圖案之外圖案以 外’截至該堰牆為止周圍的玻璃基板空間，予以升高者； 該錫球係裝設於該等金屬圖案之外圖案上者。 另’相關本發明另一見解的半導體封裝之製造方法， 係包含有：提供步驟、金凸塊形成步驟、堰牆形成步驟、焊 接步驟、升高步驟、及裝設步驟；其令，該提供步驟係提 供半導體晶片與玻璃基板的步驟，而該半導體晶片係在靠 近上面四周，將焊接墊等分別呈一列配置者，而該玻璃基 板係在一側面上，對應該焊接墊的位置與個數，而形成内 圖案、外圖案、及由連結該等之連結圖案所形成之金屬圖 C請先閱讀背面之注音？事項再填寫本頁) ----^---------線 本紙張尺度適用令國國家標準（CNS)A4規格（210 X 297公爱） 498508 A7 B7 五、發明說明（4 ) 案；該金凸塊形成步驟係在該等焊接墊上形成金凸塊；該 堰牆形成步驟係在該連結圖案等及玻璃基板的一側面上， 形成包圍該内圖案等之相框狀的堰牆；該焊接步驟係依將 該焊接墊與内圖案形成電性連結方式，而利用該金屬凸 塊，將該半導體晶片與玻璃基板之間予以焊接的步驟；該 升高步驟係將除該外圖案外，截至該堰牆為止的該半導體 晶片周圍的玻璃基板空間，予以升高的步驟；該裝設步驟 係在各金屬圖案的外圖案上裝設錫球。 【圖式簡單說明】 本發明之目的、見解、與優點，參照下述詳細說明及 所附圖式，應可理解。 第1圖係習知陶瓷封裝的剖面示意圖。 第2圖係習知陶塑膠封裝的剖面示意圖。 · 第3圖係本發明之半導體封裝的剖面示意圖。 第4圖係本發明之玻璃基板的平面示意圖。 第5 A〜5D圖係供說明相關本發明半導體封裝之製造方法的 程序剖面示意圖。 【圖式符號說明】 -1. 裝--------訂——線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 1 陶瓷底座 2 空穴 3 階梯面 4 導線 5 半導體晶片 6 黏接劑 7 金線 8 玻璃蓋 11 沖膜墊 12 内導線 13 外導線 20 導線櫂 21 EMC底座 30 半導禮晶 31 内圖案 32 連姑圖案 33 外圖案 35 金屬圖案 本紙張尺度適肖巾關家鮮(CNS)A4規格（210x297公釐) -6 - 498508 A7 ___ B7 五、發明說明（5 ) 36 堰牆 40 玻璃基板 41 金凸塊 42 升高材料 43 錫球 30a 焊接墊等 4a 電極墊 5a 焊接墊 【實施例】 (請先閱讀背面之注意事項再填寫本頁) 第3圖所示係相關本發明實施例之半導體封裝的剖面 示意圖。 經濟部智慧財產局員工消費合作社印製 如圖所示，設置具備焊接墊等（3〇a)的半導體晶片 (30)，與具對應該焊接墊等（3〇a)而形成金屬圖案等（3 5)的 玻璃基板（40)。該半導體晶片（3〇)與玻璃基板（4〇)係以焊接 墊等（3 0a)與金屬圖案等（35)呈相對向方式配置。該焊接墊 等（3 0a)與金屬圖案的一端（3L以下稱「内圖案」），係透過 形成於該焊接墊等（30a)上的金凸塊（41)，而焊接並電性連 結。作為安裝於主機板之機構功能的錫球（43)，係裝設於 基屬圖案的另一端（33:以下稱「外圖案」）。堰牆（Dam:36) 係形成於内圖案（31)與外圖案（33)間的金屬圖案部分（32: 以下稱「連結圖案」）上。除金屬圖案等（35)之外圖案（33) 外，截至該堰牆（36)為止之該半導體晶片（30)周圍的半導體 晶片（3 0)空間，利用由環氧、或高分子系列的樹脂所組成 的升高材料（42)封裝。 該半導體晶片（30)係屬CCD，在其上面的主動區域上 形成彩色過濾器（未圖示）。該半導體晶片（3〇)雖未圖示，但 在靠近半導體晶片（30)上面四邊全部部分，分別形成一列 配置。該金凸塊（41)在顧慮封裝的輕薄短小前提下，高度 在50〜172μηι左右，球體直徑在50〜100μηι左右。該升高材 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 498508 A7 經濟部智慧財產局員工消費合作社印製 五、發明說明（6 ) 料（42)係在70〜120°C下可硬化的物質，譬如環氧或高分子 系列樹脂。該錫球（43)係錫：鉛組成比為60〜80:40〜20wt%， 為提昇信賴度，可採用如銀、金、鉻、或話等摻質，大小 為10〜40mil左右。 該金屬圖案等（35)係如第4圖所示般，分別形成於對應 半導體晶片的各焊接塾等位置上。堪踏（36)則形成包圍該 金屬圖案等（35)之内圖案（31)的相框狀。 該金屬圖案等（35)係由半導體晶片（30)、外圖案（33)與 連接該等間的連結圖案（32)。該金屬圖案等（35)係由銦+ 錫、銦+錫+銅、銦+錫+金、或銦+錫+銅+金中選擇一種的 混合物’或具與該等混合物幾乎類似電性的金屬所構成。 該金屬圖案等（35)係厚度大於10111，最好在1〜3)11111左右，而 覓度則大於50μπι，最好在50〜70μηι左右。内圖案（3 1)在顧 慮與金凸塊（41)連接的前提下，至少大於50Χ 5〇 μπι，最好 具有50χ 50〜ΙΟΟχΙΟΟμηι大小。該外圖案（33)在顧慮錫球（43) 的裝設上，尺寸為大於75χ 75μιη，最好具有75 χ 75〜10〇><1〇(^111大小。 該堰牆（36)係呈包圍半導體晶片（3〇)的形狀，即具相框 狀，而形成於該連結圖案（32)與玻璃基板（4〇)上。該堰牆（36) 係由環氧或高分子系列樹脂之類無溶劑的不透明系列樹脂 所成，並具30〜ΙΟΟμπι的寬度，與10〜7〇_的高度。 (請先閱讀背面之注意事項寫本頁) I!裝 . 線· 具備如前述構造的本發明半導體封裝，藉由未採用高 價位的陶瓷底座，所以在費用上頗為有利，另亦藉由未採 用會產生α粒子源的EMC，可確保信賴性。
498508 A7 B7 五、發明說明（7) 以下，針對上述本發明半導體封裝之製造方法，請參 閱第5A〜5D圖所示，進行詳細說明。 請參閱第5A圖所示，提供在四邊周圍分別將半導體晶 片（3 0)形成一列排列的半導體晶片（30)。在各焊接墊等（3〇a) 上形成金凸塊（41)。該金凸塊（41)最好利用sSB(Stud Bump Bonding)法形成，並在溫度150〜280°C、壓力20〜250、電力 30〜150Mw的處理條件下形成。接著，形成具高度 50〜175μηι、球體直徑50〜ΙΟΟμηι左右的該金凸塊（41)。此 時，其高度係透過撕裂（tearing)、牽引穿模（puinng)、或精 壓（coining)等方法，進行調節。 請參閱第5B圖所示，對應該焊接墊等（3〇a)而形成金屬 圖案等(35)，而提供形成堰牆（36)的玻璃基板（40)。該金屬 圖案（35)係由内圖案（31)、連結圖案（32)、及外圖案（33)所 構成。該堰牆（36)係依包圍内圖案（31)的方式，以相框形狀 形成於該連結圖案（32)及玻璃基板（40)上。該堰牆（36)係依 網板印刷或分散（dispensing)法形成，並離内圖案（31)約 20μηι左右的距離，形成於連結圖案部分上，而形成 10〜70μηι高度及30〜ΙΟΟμιη寬度。 請參閱第5C圖所示，將經形成於焊接墊等（3〇a)上的金 凸塊（41)，依配置於金屬圖案等（3 5)之内圖案（31)上的方 式，將半導體晶片（30)整列於玻璃基板（4〇)上。然後，將該 半導體晶片（30)利用熱壓接程序，焊接於該玻璃基板（4〇) 上。此時，焊接墊等（30a)與内圖案（3 1)，便利用該金凸塊 (41)而形成電性連結。該熱壓接程序係在溫度"卜丨5()c、 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 訂---------線1' 經濟部智慧財產局員工消費合作社印製 -9 - 498508 經濟部智慧財產局員工消費合作社印製 A7 ______B7___ 五、發明說明（8 ) 壓力20〜50gf/Bump、時間2〜5秒的條件下進行。 請參閱第5D圖所示，在半導體晶片（30)周圍，即除金 屬圖案等（35)之外圖案（33)外的半導體晶片（30)四邊上，為 確保半導體晶片（30)及金屬圖案等（35)的信賴性，利用升高 材料（42)升高至該堰牆（36)為止。該升高材料（42)係在 70〜120°C下可硬化的物質，譬如由環氧或高分子系列樹脂 所構成。 之後，如第3圖所示，將具安裝於主機板上之機構功 能的錫球（43)，裝設於金屬圖案等（35)的外圖案（33)上，至 此便完成本發明的半導體封裝。該錫球（43)係依大小具 10〜40mil左右的方式形成者。 【發明功效】 綜上所述，本發明之半導體封裝，因為省略陶瓷底座 與EMC的使用，所以可達節省費用與提昇信賴性之功效。 另，本發明之半導體封裝，因為半導體晶片與基板間的電 性連接，係藉由金凸塊進行的構造，故可達更提昇輕薄短 小之功效。 此外，雖然此處針對本發明特定實施例進行說明、圖 示，但熟習此技術者均可由此進行進行修正與變化。故， 上述的申請專利簡，在隸屬纟發明正確的思想與範圍情 提下，亦涵蓋所有的修正與變化，此點應可理解。 ^紙張尺度適財關家鮮（cns)A4 297公釐） (請先閱讀背面之注意事項再填寫本頁) ----^---------線

Claims (1)

  1. 498508 A8B8C8D8 六、申請專利範圍 1·一種半導體封裝，係包含有： (請先閱讀背面之注意事項再填寫本頁) 靠近上面四周分別呈一列配置焊接墊等的半導體 晶片； 形成於該等焊接墊上的金凸塊； 形成有内圖案、外圖案與堰牆的玻璃基板； 该内圖案，係透過該金凸塊而電性連結於該 半導體晶片之焊接塾上； ^ 該外圖案，係與該内圖案隔離的外圖案； 該堰牆，係依對應該焊接墊方式，在一側面 上形成由連結該内圖案與該外圖案間的圖案所 形成之金屬圖案等’並依包圍該内圖案等方式， 在该連結圖案與一側面上形成相框狀的堰牆； 將該半導體晶片上，除該金屬圖案之外圖案以外， 截至該堰牆為止周圍的玻璃基板空間，予以升高的升高 材料；及 裝設於該等金屬圖案之外圖案上的錫球。 經濟部智慧財產局員工消費合作社印製 2·如申請專利範圍第1項所述之半導體封裝，其中該本導體 晶片係在其上面的主動區域上，形成彩色過濾器者。 3·如申請專利範圍第1項所述之半導體封裝，其中該金凸塊 係高度50〜175μπι，且直徑50〜ΙΟΟμηι者。 4·如申請專利範圍第1項所述之半導體封裝，其中該金屬圖 案係由銦+錫、|因+錫+銅、銦+錫+金、或銦+錫+銅+金中 選擇一種的混合物。 5.如申請專利範圍第1項所述之半導體封裝，其中該金屬圖 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -11- 498508 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8 六、申請專利範圍 案係厚度1〜3μπι，且寬度5〇〜7〇μιη。 6·如申請專利範圍第丨項所述之半導體封裝，其中該内圖案 的大小係50\50〜1〇(^1〇0(1111;而該外圖案的大小係75>< 75〜1〇〇χ1〇〇μιη。 7·如申請專利範圍第1項所述之半導體封裝，其中該堰牆係 由環氧或高分子系列樹脂所成。 8·如申請專利範圍第丨項所述之半導體封裝，其中該堰牆係 寬度30〜1〇〇μπι、高度1〇〜7〇μιη者。 9·如申請專利範圍第丨項所述之半導體封裝，其中該升高材 料係環氧或高分子系列樹脂。 10·如申請專利範圍第丨項所述之半導體封裝，其中該錫球 係錫：錯組成比為60〜80:40〜20wt%的物質。 Π·如申請專利範圍第10項所述之半導體封裝，其中該錫球 係包含有銀、金、鉻、或鈷等摻質。 12.如申請專利範圍第丨項所述之半導體封裝，其中該錫球 的大小係10〜40mU。 13 · —種半導體封裝之製造方法’係包含有： 提供半導體晶片與玻璃基板的步驟； 該半導體晶片，係在靠近上面四周，將焊接 墊等分別呈一列配置者； 該玻璃基板，係在一側面上，對應該焊接墊 的位置與個數，而形成内圖案、外圖案、及由連 結遠荨之連結圖案所形成之金屬圖案； 在該等焊接墊上形成金凸塊的步驟； 石氏張尺度適用中國國家標準（CNS)A4規格⑽χ29 «^1 ^1 i^i n βιβ n · e^i n ammt It l_i im i · n 1 ί I team 1 i_i I 線 *·1、——.------------------- (請先閱讀背面之注意事項再填寫本頁) -12- 498508 C8 —________D8 ________________ 六、申請專利範圍 在該連結圖案等及玻璃基板的一側面上，形成包 圍該内圖案等之相框狀堰牆（Dam)的步驟； 依將該焊接墊與内圖案形成電性連結方式，而利 用該金屬凸塊，將該半導體晶片與玻璃基板之間予以 焊接的步驟； 將除該外圖案外，截至該堰牆為止的該半導體晶 片周圍的玻璃基板空間，予以升高的步驟；及 在各金屬圖案的外圖案上裝設錫球的步驟。 14:如申請專利範圍第丨3項所述之半導體封裝之製造方 法’其中該本導體晶片係在其上面的主動區域上，形成 彩色過濾器者。 1 5 ·申請專利範圍第13項所述之半導體封裝之製造方法，其 中該金凸塊係在溫度150〜28〇t、壓力20〜250、電力 30〜150mW的處理條件下形成者。 16·申請專利範圍第13項所述之半導體封裝之製造方法，其 中該金凸塊係形成高度50〜175μηι，且直徑50〜ΙΟΟμιη者。 17.申請專利範圍第16項所述之半導體封裝之製造方法，其 中該金凸塊的高度係透過撕裂（tearing)、牽引穿模 (pulling)、或精壓（coining)方法，進行調節。 1 8 ·申請專利範圍第13項所述之半導體封裝之製造方法，其 中該金屬圖案係由銦+錫、銦+錫+銅、銦+錫+金、或銦+ 錫+銅+金中選擇一種的混合物。 19.申請專利範圍第13項所述之半導體封裝之製造方法，其 中該金屬圖案係厚度1〜3μηι，且寬度50〜70μιη。 紙張尺度適用中國國家標準（CNS)A4規格⑽X 297公釐) 一 ΓΤΓ:'' ---- ----------rllti — (請先閱讀背面之注音？事項再填寫本頁) 訂---------線！ 經濟部智慧財產局員工消費合作社印製 498508 A8 B8 C8 D8 經濟部智慧財產局員工消費合作社印制衣 六、申請專利範圍 20·申請專利範圍第π項所述之半導體封裝之製造方法，其 中該内圖案的大小係50χ 50〜1〇〇χ ΐ〇〇μΓη ;而該外圖案的 大小係 75χ 75 〜ΙΟΟχΙΟΟμηι。 21 ·申請專利範圍第13項所述之半導體封裝之製造方法，其 中該堰牆係由環氧或高分子系列樹脂所成。 22·申請專利範圍第13項所述之半導體封裝之製造方法，其 中該堰牆係寬度30〜ΙΟΟμιη、高度1〇〜7〇pm者。 23.申請專利範圍第13項所述之半導體封裝之製造方法，其 中該堰牆係依網板印刷或分散法形成者。 24·申請專利範圍第13項所述之半導體封裝之製造方法，其 中4半導體晶片與玻璃基板間的焊接，係施行熱壓接程 序。 25.申凊專利範圍第24項所述之半導體封裝之製造方法，其 中該熱壓接程序係在溫度1〇〇〜丨5〇 °c 、壓力 20〜50gf/Bump、時間2〜5秒的條件下進行。 26·申請專利範圍第13項所述之半導體封裝之製造方法，其 中该升南材料係以環氧或高分子系列樹脂形成。 27.申請專利範圍第13項所述之半導體封裝之製造方法，其 中該升高材料係在70〜120°C下硬化。 28·申請專利範圍第13項所述之半導體封裝之製造方法，其 中該錫球係由錫：船組成比為60〜80:40〜20wt%的物質所 構成。 2 9 ·申明專利範圍第2 8項所述之半導體封裝之製造方法，其 中該錫球係包含有銀、金、鉻、或鈷等摻質。 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐 (請先閱讀背面之注意事項再填寫本頁) ^ttJ· H ϋ ϋ I ϋ I I ϋ ·1 n .1 n ·ϋ ϋ n I ϋ ϋ ϋ ϋ ϋ H -14- 498508 A8 B8 C8 D8 六、申請專利範圍 30.申請專利範圍第13項所述之半導體封裝之製造方法，其 中該錫球係形成10〜40mil的大小者。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -15-
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US20020008315A1 (en) 2002-01-24

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