TW201635473A - 低電磁干擾電路之封裝組態 - Google Patents
低電磁干擾電路之封裝組態 Download PDFInfo
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Abstract
一種電子組件包括裝入(encase)於封裝內之高壓切換電晶體。高電壓切換電晶體包含源極電極、閘極電極以及汲極電極,其皆位於高壓切換電晶體之第一側。源極電極電性連接至封裝之導電結構部分。可使用上述電晶體與另一電晶體以形成組合,其中電晶體之源極可電性連接至含有該電晶體之封裝的導電結構部分,且第二電晶體之汲極電性連接至裝有第二電晶體之封裝的第二導電結構部分。另一方面,第二電晶體之源極與其導電結構部分電性隔離,而第二電晶體之汲極與其導電結構部分電性隔離。
Description
本發明描述用於不同電路應用之半導體元件之封裝組態。
現在,大多數的高壓切換電路設計中都使用矽基電晶體,例如為矽金屬氧化半導體場效應電晶體(MOSFET)或絕緣閘雙極電晶體(IGBT)。矽功率MOSFET之示意圖繪示於第1圖中。如圖所示,源極電極10和閘極電極11在半導體主體13之一側,且該汲極電極12在另一側。
在將第1圖之電晶體插入完整之電路前,電晶體會被裝入(encase)一封裝內。傳統電晶體封裝之示意範例繪示於第2及3圖中。請參照第2圖,封裝包括結構部分,例如為外殼(case)24及封裝基座(package base)23;亦有非結構部分,例如導腳(lead)20-22。外殼24由絕緣材料形成,而封裝基座23由導電材料形成,閘極導腳21由導電材料形成且電性連接到電晶體之閘極電極11,汲極導腳22由導電材料形成且電性連接至封裝基座23,且源極導腳20由導電材料形成且電性連接
到電晶體之源極電極10。如圖所示,該電晶體直接安裝於該封裝基座23上,且使汲極電極12與封裝基座23具有電性及熱接觸。汲極電極12及封裝基座23連接而使其電位在所有偏壓條件下大至相同且操作時所產生的熱可輕易的排出至封裝基座。汲極導腳22及汲極電極12藉此電性連接,因兩者皆電性連接至封裝基座23。金屬接線(bond wire)31可在閘極電極11及閘極導腳21之間形成電性連接。類似的,源極導腳20可由接線30電性連接至源極電極10。
在第3圖中之封裝與第2圖類似,除了該封裝外殼26由導電材料形成,使封裝基座23及外殼26在相同的電位(也就是說,他們電性連接)。在此封裝中,源極導腳20和閘極導腳21個別地與封裝外殼26電性隔離,而汲極導腳22則電性連接至該外殼。汲極電極12電性連接至封裝基座23,閘極導腳21電性連接至電晶體之閘極電極11,而源極導腳20電性連接至源極電極10。
如第4圖中所示,當第2圖之封裝電晶體使用在電路組合或電路板上時,通常會安裝在散熱片27上,並有一絕緣間隙物28在封裝基座23及散熱片27之間以形成電晶體組合25。絕緣間隙物28做得很薄以使電晶體產生的熱可由絕緣間隙物28傳送到散熱片。然而,絕緣間隙物28具有一最小厚度,因減少絕緣間隙物28之厚度會增加封裝基座23與散熱片27之間的電容(capacitance)。在許多狀況下,散熱片27連接到一
電路接地,而使汲極與散熱片之間的電容轉變為汲極與接地間的電容。當散熱片沒有連接到電路接地時,通常在散熱片和電路接地間會有一個很大的電容,因為散熱片的表面積通常遠大於電晶體之表面積。此亦會造成汲極和電路接地之間很大的總電容。
第5圖繪示第4圖之電晶體組合25在其安裝至電路組合或電路板後之電路圖,且其源極連接至接地33。電容器32表示封裝基座23與電路接地間的電容,也就是汲極電極12與電路接地間之電容。在電晶體組合25之操作期間,電容器32之充放電不只會導致嚴重的切換損失,亦會發出電磁幅射(亦稱為電磁干擾(electromagnetic interference,EMI))而減損電路之性能。電容器32可使共模(common-mode)交流電流經由其應經過之訊號路徑以外的路徑流至接地。電容器32之電容愈大,切換損失及共模EMI放射之強度就愈強,而會造成電性性能之下降。因此,必需要在電性性能(需要較厚的絕緣間隙物28)及電晶體操作時產生之熱的散熱(需要較薄的絕緣間隙物)間作取捨。需要有一種元件及封裝組態其可有效的減輕切換損失及EMI,並同時可在該元件用在高壓、高功率切換之類的電路時可有效的將熱排出。
在一樣態中,一種電子組件包括裝於一封裝內之一高壓切換電晶體。該高電壓切換電晶體包含一源極電極、一閘極電極以及一汲極電極,其皆位於該高壓切換電晶體之一第一側。該源極電極電性連接至該封裝之一導電結構部分。
在一樣態中描述了一種組合。該組合包括一第一電晶體,其裝入一第一封裝內,該第一封裝包含一第一導電結構部分;以及一第二電晶體,其裝入一第二封裝內,該第二封裝包含一第二導電結構部分。該第一電晶體之一源極電性連接至該第一導電結構部分,且該第二電晶體電性連接至該第二導電結構部分。
在另一樣態中描述了一種組合。該組合包括包含一第一源極之一第一電晶體,該第一電晶體裝入一第一封裝中,該第一封裝包含一第一導電結構部分;以及包含一第二源極與一第二汲極之一第二電晶體,該第二電晶體裝入一第二封裝中,該第二封裝包含一第二導電結構部分。該第一源極電性連接至該第一導電結構部分,該第二源極與該第二導電結構部分電性隔離,且該第二汲極與該第二導電結構部分電性隔離。
在又一樣態中描述了一種電子組件。該電子組件包括一第一電晶體,其包含一第一源極與一第一汲極;一第二電晶體,其包含一第二源極以及一第二汲極;以及一單封裝,其包含一導電結構部分,該封裝裝有該第一電晶體以及該第二電晶體,其中該第一源極電性連
接至該封裝之該導電結構部分,該第二汲極電性連接至該第二源極,且該第一電晶體直接安裝在該封裝之該導電結構部分。各種元件的實施可包括一或多個下列的特徵。高壓切換電晶體可為一側向(lateral)元件。該高壓切換電晶體可為一III-N電晶體。該高壓切換電晶體可包含一絕緣或半絕緣基材。該高壓切換電晶體可經組態以在300V或更高的偏壓下操作。該高壓切換電晶體為一加強式電晶體。該封裝之該導電結構部分包含一封裝基座。該封裝之該導電結構部分電性連接至一散熱片。該封裝之該導電結構部分電性連接至一電路接地或一直流接地。該高壓切換電晶體可為包含一絕緣或半絕緣部分之一III-N電晶體。該絕緣或半絕緣部分為一絕緣或半絕緣基材。該高壓切換電晶體可直接安裝在該封裝之該導電結構部分上,且該絕緣或半絕緣部分鄰近(adjacent)或接觸該封裝之該導電結構部分。該電子組件操作期間產生之EMI功率與該電子組件之總輸出功率的一第一比率可小於一第二電子組件操作期間產生之EMI功率與該第二電子組件之總輸出功率的一第二比率,其中該第二電子組件包含一高壓切換電晶體,且一汲極電極電性連接至該第二電子組件之一封裝之一導電結構部分,且該第二電子組件之該封裝之該導電結構部分藉由一絕緣間隙物與該電路接地或該直流接地分隔開。該電子組件操作期間發生之切換功率損失與該電子組件之總輸出功率的一第一比率可被減少,相較之下其
小於一第二電子組件操作期間發生之切換功率損失與該第二電子組件之總輸出功率的一第二比率,其中該第二電子組件包含一高壓切換電晶體,且一汲極電極電性連接至該第二電子組件之一封裝之一導電結構部分,且該第二電子組件之該封裝之該導電結構部分藉由一絕緣間隙物與該電路接地或該直流接地隔開。該封裝更包含一閘極導腳、一源極導腳以及一汲極導腳,其中該汲極導腳在該閘極導腳與該源極導腳之間。
該第一電晶體或該第二電晶體可為一高壓切換電晶體。該第一導電結構部分可直接安裝在一散熱片上且電性連接至該散熱片。該第一導電結構部分可電性連接至一電路接地或一直流接地。該第二導電結構部分可電性連接至一直流高壓電源。該第二導電結構部分可藉由一絕緣間隙物與一電路接地或一直流接地隔開。該第二導電結構部分與該電路接地或該直流接地間之一電容可使該第二導電結構部分被交流接地。該第一電晶體之一汲極可電性連接至該第二電晶體之一源極。該第一電晶體可為一低端切換器而該第二電晶體可為一高端切換器。一半橋可以此處所述之元件形成。一橋式電路可以此處所述之元件形成。該第一電晶體或該第二電晶體可為一III-N電晶體。該第一電晶體或該第二電晶體為一側向元件。
該第一電晶體及該第二電晶體可共用一共同基材。該基材可為:一絕緣或半絕緣基材。該第一汲極
與該第二源極可由一單一電極形成。元件或組件亦可包含一電容器,其中該封裝裝有該電容器。該第二汲極可電性連接至該電容器之一第一端子(terminal),且該電容器之一第二端子電性連接至該封裝之該導電結構部分。該封裝可包含一第一源極導腳、一第一閘極導腳、一第一汲極導腳、一第二閘極導腳以及一第二汲極導腳。該第一電晶體可更包含一第一閘極,該第二電晶體更包含一第二閘極,該封裝之該導電結構部分電性連接至該第一源極導腳,該第一閘極電性連接至該第一閘極導腳,該第二閘極電性連接至該第二閘極導腳,該第二汲極電性連接至該第二汲極導腳,且該第一汲極及該第二源極皆電性連接至該第一汲極導腳。
在一些實施方式中,此處所述之元件可包括一或多個以下的優點。封裝之側向高壓電晶體可減少或消除:因封裝組態而造成的電晶體之汲極與電路或直流接地間的電容。電晶體之汲極與電路或直流接地間的電容可導致電流經由其應經過之訊號路徑以外的路徑流至接地,其可能增加元件操作期間之EMI或切換損失。增加EMI或切換損失可減損該元件或包括該元件之電路之性能。因此,減少或消除電晶體之汲極與電路或直流接地間的電容可使元件或電路之操作更有效率。除此之外,散熱亦因此處所述之一些電晶體而改進。散熱可改進元件之壽命及性能。散熱亦可使元件可有更廣泛的應用。
10‧‧‧源極電極
11‧‧‧閘極電極
12‧‧‧汲極電極
13‧‧‧半導體主體
20、21、22、20'、21'、22'‧‧‧導腳
23、23'‧‧‧封裝基座
24‧‧‧外殼
25‧‧‧電晶體組合
26‧‧‧封裝外殼
27、27'‧‧‧散熱片
28‧‧‧絕緣間隙物
30、31‧‧‧接線
32‧‧‧電容器
33‧‧‧接地
38‧‧‧直流高壓電源
40、40'‧‧‧源極電極
41、41'‧‧‧閘極電極
42、42'‧‧‧汲極電極
43‧‧‧一半導體主體
44、44'‧‧‧絕緣或半絕緣部分
60、62、73‧‧‧連接器
65、66、165、166、‧‧‧切換器
75、76‧‧‧二極體
90‧‧‧第一源極導腳
91‧‧‧第一閘極導腳
92‧‧‧第一汲極導腳
93‧‧‧第二閘極導腳
94‧‧‧第二汲極導腳
96‧‧‧電極
266‧‧‧高端切換器
365‧‧‧低端切換器
366‧‧‧高端切換器
第1圖為先前技術之矽基半導體電晶體之示意圖。
第2-4圖為先前技術之封裝半導體電晶體之透視截面圖。
第5圖為第4圖之封裝半導體電晶體之電路圖。
第6圖為封裝半導體電晶體之透視截面圖。
第7圖為為半橋之電路圖。
第8圖為半橋之組件之透視圖。
第9圖為第8圖之半橋之兩個切換器之截面側視圖。
第10-11圖為半橋之電路圖。
第12圖為半橋之兩個切換器之截面側視圖。
第13圖為由第11圖之兩個切換器形成之半橋之電路圖。
第14圖為可同時裝入電晶體及半橋之單一封裝之透視圖。
第15-16圖為半橋之電子元件之側視圖。
在各個圖式中的相似參考符號係表示相似的元件。
第6圖示意性的繪示一電子組件,其包括裝入一封裝之高壓切換電晶體。此處所指之高壓切換電晶體為對高壓切換應用做最佳化之電晶體。也就是說,當該電晶體為關時,其可阻擋高壓,例如為約300V或更高、約600V或更高、約1200V或更高;而當電晶體為開時,在使用上有足夠低之開電阻(on-resistance)RON,也就是說,當一實質電流通過該元件時,其導電損失(conduction loss)夠小。高壓切換電晶體包括一絕緣或半絕緣部分44、一半導體主體43、一源極電極40、一閘極電極41以及一汲極電極42。在一些實施方式中,該絕緣或半絕緣部分44為一絕緣或半絕緣基材或載體晶元(carrier wafer),而在一另一實施方式中,該絕緣或半絕緣部分為該半導體主體之一絕緣或半絕緣部分。在又一實施方式中,絕緣或半絕緣部分44可為一墊層(shim),例如一晶元級墊層(wafer-level shim)。
在此基材所指為半導體元件之半導體材料層於其頂端磊晶成長之材料層,其使該半導體材料與該基材接觸或與該基材鄰接之部分的晶格結構與該基材之晶格結構至少部分相同,或至少部分由該基材之晶格結構決定。在一些實施方式中,該基材並不會對通過該半導體元件之電流的導通有任何幫助。在此,「墊層」所指為一絕緣材料,而半導體元件或組件安裝於墊層上以防止與墊層接觸之部分與墊層下之層或結構電性接觸。例
如,一封裝半導體電晶體可安裝於一接地平面,且有墊層在半導體封裝與該接地平面之間,如此該墊層防止該半導體封裝與該接地平面電性接觸。墊層與基材不同處在於墊層在半導體層形成後附著於該元件或組件上。在一些實施方式中,墊層在半導體元件及包覆該元件之封裝之間。例如,在第6圖中,當絕緣或半絕緣部分44為墊層時,其位於半導體主體43與封裝基座23之間。在一些實施方式中,半導體晶元上具有複數個元件,而墊層在晶元被晶粒切割(dicing)以使各別的元件分開之前即已附著在晶元上。此種墊層(稱為「晶元級墊層」)可用於簡化形成於導電基材上之元件或組件的製作過程。製作過程之簡化是因為大型的晶元級墊層可在晶粒切割前連接至該晶元,而不是先將晶元做晶粒切割後再將墊層連接到各別的元件上。
封裝包括結構部分(如外殼24及封裝基座23)以及非結構部分(如導腳20-22)。在此封裝之「結構部分」所指為形成封裝之基本形狀或鑄形以提供該封裝結構上之剛性(rigidity)。在許多情況中,當封裝電晶體使用在完整的電路中時,封裝的結構部分直接安裝在該電路或電路板上。在第6圖之電晶體封裝中,封裝基座23由導電材料形成,也就是說,封裝基座23為該封裝之導電結構部分。外殼24由絕緣材料形成,閘極及汲極導腳21及22皆由導電料材形成,而源極導腳20由導電材料形成且電性連接至封裝基座23。在此,若
兩個以上之接觸或其他物件可由充足導電之材質連接而確保該些接觸或物件之電位欲為相同,則稱其為「電性連接」。也就是說,其電位在任何時候及任何偏壓下皆大致相同。在一些實施方式中,封裝基座23及外殼24由一導電外殼取代,也就是說與第3圖之封裝外殼26類似之導電結構部分,其完全環繞該被包覆之電晶體(圖未示)。
絕緣或半絕緣部分44直接安裝至封裝基座23上,在一些實施方式中,可額外的絕緣或半絕緣部分44及封裝基座23(圖未示)之間包括一導電或半導電層(如導電或半導電基材)。當包括額外的導電或半導電層時,該絕緣或半絕緣部分44可為半絕緣半導體層,例如半絕緣半導體緩衝層,而包括於半導體主體43中之主動半導體層形成於其上。在一些實施方式中,半絕緣層由摻雜一半導體層以使該層電性絕緣而形成,儘管其不如某些絕緣材料絕緣。額外的導電或半導體層可為高壓切換電晶體之一部分,或可為一分開之層。封裝基座23可直接安裝至一散熱片27上,使封裝基座23與散熱片27可電性及熱接觸,也就是說,其為電性連接,而電晶體所產生的熱可由散熱片27排出。散熱片27亦可為電路接地,或其可電性連接至一電路接地。在此狀況中封裝基座23電性連接至電路接地。
源極、閘極及汲極電極40-42皆位於該電晶體之最上側。也就是說,其皆位於半導體主體43上離安
裝至封裝基座23之部分最遠的一側。可使用側向元件(也就是側向高壓切換電晶體)而使源極、汲極及閘極電極皆位於半導體主體之同一側。連接器31(其可為接線且由導電材料形成)之一端連接至閘極電極41而另一端連接至閘極導腳21,而使閘極電極41電性連接至閘極導腳21。相同的,汲極導腳22經由連接器62電性連接至汲極電極42,連接器62可為接線且亦由導電材料形成。源極電極40經由導電連接器60電性連接至外殼24,連接器60可為接線。源極電極40及源極導腳20可兩者皆為交流或直流接地,因兩者皆電性連接至封裝基座23(其電性連接至散熱片27),而散熱片27可為電路接地或電性連接至電路接地,而該電路接地可為交流或直流接地。在此,節點、元件、層或組件若在操作時隨時維持在一固定的直流電位則稱為「交流接地」。交流及直流接地總稱為「電路接地」。
連接器31、60及62之間皆電性隔離。在第6圖中所示,源極導腳20位於閘極導腳21及汲極導腳22之間,其與汲極導腳位於閘極導腳及源極導腳之間的封裝中之電晶體相較之下,可具有降低輸入及輸出電流間之干擾的優點。然而,在一些清況中使汲極導腳22位於閘極導腳21及源極導腳20之間較佳(如第2-4圖之封裝所示),因此該組態可更加相容於其他與該封裝電晶體一同使用之現存之零件及元件。
高壓切換電晶體可為任何可執行前述之高壓切換電晶體之功能之電晶體。在一些實施方式中,高壓切換電晶體為一加強式元件,也就是說,通常為關之元件,其閾電壓(threshold voltage)大於0V,如1.5V-2V或更大。在其他實施方式中,高壓切換電晶體為一空乏式(depletion mode)元件,也就是說,通常為開之元件,其閾電壓為小於0V。高壓切換電晶體可為側向元件,因側向電晶體可輕易的製作為源極、汲極及閘極電極皆位於元件之同一側。高壓切換電晶體可為III族氮化物或III-N元件或電晶體,如III-N高電子移動率電晶體(high electron mobility transistor,HEMT)或異質接合場效應電晶體(heterojunction field effect transistor,HFET)。也就是說,半導體主體43可包括至少二層III-N材料。此處III族氮化物或III-N材料、層、元件等詞彙所指者為依AlxInyGazN之化學計量式所組成之化合物半導體材料的材料或元件,其中X+Y+Z約為1。可設計用來滿足高壓切換電晶體之條件之III-N元件及元件結構的例子可在以下文獻中找到:美國公開號2009-0072272(2009年3月19日公開)、美國公開號2009-0072240(2009年3月19日公開)、美國公開號2009-0146185(2009年6月11日公開)、美國專利申請號12/108,449(2008年4月23日申請)、美國專利申請號12/332,284(2008年12月10日申請)、美國專利
申請號12/368,248(2009年2月9日申請)以及美國公開號2009-0072269(2009年3月19日公開),上述所有文件於此引用做為本文之參考。
以第6圖之電子組件來說,當散熱片27為電路接地(如為直流接地)或電性連接至一電路接地,且汲極電極42與電路接地間之電容不重要(也就是說,其夠小而不實質上影響或降低組件或包括組件之電路的性能)時,第6圖中之組件在操作時產生之切換損失及EMI或共模EMI可因此而減少(與第2-4圖中之組件相較之下)。
第7圖為半橋之電路圖,一或多個該半橋可組合而形成一橋式電路。如第7圖中所示,一半橋包括兩個切換器65及66,兩者通常皆由高壓切換電晶體所組成,如圖中所示連接。切換器65之源極電性連接至電路接地或直流接地33,切換器66之汲極電性連接至直流高壓電源38(其為交流接地),而切換器66之源極電性連接至切換器65之汲極。源極電性連接至接地之切換器65通常稱為「低端切換器」,而汲極電性連接至高壓電源之切換器66通常稱為「高端切換器」。直流高壓電源38之電壓依特定的電路應用而固定,但通常可為約300V或更高、約600V或更高或約1200V或更高。在第7圖中可以看到,半橋亦通常包括二極體75及76,其分別反向並聯(anti-parallel)至切換器65及66。然而,亦可不使用這些二極體,也就是說,當在切換器65及66中使
用特定種類之電晶體時,不包括這些二極體。更詳細之描述在美國申請號12/368,200(2009年2月9日申請)中,其於此引用做為本文之參考。
第8及9圖繪示第7圖之半橋中二切換器各別之組態。每個切換器皆封裝為可減少或最小化半橋之EMI之組態,特別是與低端切換器65由第2-4圖中之封裝元件之一組成的半橋相較之下。第8圖繪示半橋之透視圖,而第9圖繪示二切換器各別之透視截面圖。為求清楚,一些第8及9圖中之組合的特徵未繪示於圖中;然而這些特徵會於以下描述。在第8及9圖中之組合,低端切換器65之封裝組態與第6圖之封裝電晶體相似或相同。低端切換器65包括裝入封裝之電晶體。電晶體可包括絕緣或半絕緣部分44。電晶體可直接安裝至該封裝,且絕緣或半絕緣部分44鄰近或接觸封裝基座23。電晶體之源極電極40電性連接至封裝基座23。封裝基座23直接安裝至散熱片27,且散熱片電性連接至直流接地33,使封裝基座23及源極電極皆電性連接至電路或直流接地。也就是說他們都接地或直流接地。閘極電極41電性連接至封裝(圖未示)之閘極導腳21,而汲極電極42電性連接至封裝(圖未示)之汲極導腳22。源極導腳20可電性連接至封裝基座23。閘極導腳及汲極導腳皆與封裝基座23電性隔離。包括於低端切換器65中之電晶體可為高壓切換電晶體,且源極、閘極及汲極電極40-42可位於電晶體之最上側。在一些實施方式中,電晶體為III-N元件,
如III-N HEMT或HFET。在一些實施方式中,電晶體為加強式元件。在一些實施方式中,電晶體為側向元件,如側向高壓切換電晶體。
第8及9圖之組合中之高端切換器66包括裝入第二封裝中之第二電晶體。第二電晶體包括絕緣或半絕緣部分44'。第二電晶體可直接安裝至該第二封裝,且絕緣或半絕緣部分44'鄰近或接觸第二封裝之封裝基座23'。第二電晶體之汲極電極42'電性連接至第二封裝之封裝基座23'。第二電晶體之閘極電極41'電性連接至第二封裝(圖未示)之閘極導腳21',而第二電晶體之源極電極40'電性連接至第二封裝(圖未示)之源極導腳20'。在一些實施方式中,源極、閘極及汲極電極40'-42'分別地位於該電晶體之最上側,而連接器73(可為一接線)電性連接至第二封裝之封裝基座23'之汲極電極42',如第9圖所示。在其他實施方式中,汲極電極42'在半導體主體43'之與源極電極40'及閘極電極41'相對之一側,且汲極電極42'直接安裝在第二封裝之封裝基座23'上,如第2-4圖中之封裝電晶體。低端切換器之汲極電性連接至高端切換器(圖未示)之源極,其可使第二封裝之源極導腳20'電性連接至第一封裝之汲極導腳22。第二封裝之汲極導腳22'電性連接至第二封裝之封裝基座23'及直流高壓電源(圖未示)。第二封裝之源極及閘極導腳皆與第二封裝電性隔離。第二封裝之封裝基座23'安裝在散熱片27'上,且有絕緣間隙物28在封裝基
座23'及材熱片27'之間,且散熱片27'電性連接至電路或直流接地33。可使絕緣間隙物28較薄以使電晶體操作時所產生的熱可由絕緣間隙物28傳至散熱片。高端電晶體66及低端電晶體65可分別安裝於散熱片27'及27上,如第8及9圖所示,或可安裝在單一散熱片上(圖未示)。在一些實施方式中,第二電晶體為III-N元件,如III-N HEMT或HFET或電流侷限垂直電子電晶體(current aperture vertical electron transistor,CAVET)。在一些實施方式中,第二電晶體為加強式元件。在一些實施方式中,第二電晶體為側向元件,如側向高壓切換電晶體,而在另一些實施方式中其為垂直元件。在一些實施方式中,在二切換器65及66中所使用之電晶體實質上相似或相同。
第10圖繪示第8及9圖之組合的電路圖,而第11圖繪示切換器165及166皆由第2-4圖中之封裝電晶體之一形成之半橋的電路圖。在某些情況下必需被包括於半橋中之二極體75及76,在這些電路圖中皆省略,但其可被包括於該半橋中。除切換器65/165及66/166之外,直流接地33以及直流高壓電源38以外,此二電路皆包括一在直流高壓電源38及直流接地之間之實質電容,其以電容器72表示。電容器72之電容值由高端切換器之封裝基座23'及散熱片27'之間之電容決定。此電容為實質上存在,因高端切換器之封裝基座23'具有實質上較大之截面面積,且其與該直流接地分隔一小段距離,
該距離為絕緣間隙物28之厚度。然而,此電容並不會在電路操作期間導致任何實質之EMI,因電容兩側之電壓幾乎保持在恆定。電容器72之實質電容使直流高壓電源38與直流接地交流耦接(AC coupled),造成直流高壓電源38之作用如同交流接地,其對電路操作有益。接著,高端切換器之封裝基座23被交流接地,因其電性連接至直流高壓電源。
第11圖之電路包括在低端切換器165之汲極電極與直流接地之間的實質電容,其以電容器82表示。如前所述,實質電容之產生肇因於低端切換器之封裝基座接近該直流接地但未與其電性連接。在第8及9圖之組態中,因低端切換器65之封裝基座23電性連接至直流接地,因此在此組態中,低端切換器之汲極電極與直流接地之間並無電容。電容器82可使在電路操作期間之EMI或共模EMI增加,因此,與具有以第2-4圖之封裝電晶體之一組成之切換器165及166之半橋相較之下,第8及9圖之封裝組態產生較低的EMI。
第12圖繪示用於一半橋之二切換器之另一封裝組態,其可減少該EMI或使其最小化,特別是與具有以第2-4圖之封裝電晶體之一組成之切換器之半橋相較之下。如第8及9圖中之半橋,第12圖中每個切換器都是各別封裝。又為使圖式清楚,第12圖之組合之部分特徵未繪示於圖中;但這些特徵會於後文敘述。在第12圖之組合中,低端切換器65之封裝組態與第8及9圖中之
低端切換器相同。然而,高端切換器226具有不同之組態。
高端切換器266亦包括一第二電晶體,其裝入第二封裝,第二電晶體包括一絕緣或半絕緣部分44',其可為一絕緣或半絕緣基材。第二電晶體可直接安裝至該第二封裝,且絕緣或半絕緣部分44'鄰近或接觸第二封裝之封裝基座23'。源極、閘極及汲極電極40'-42'皆位於該電晶體之最上側,也就是相對於封裝基座23'之另一側。源極電極40'電性連接至第二封裝(圖未示)之源極導腳,閘極電極41'電性連接至第二封裝(圖未示)之閘極導腳,而汲極電極42'電性連接至第二封裝(圖未示)之汲極導腳。第二封裝之源極、閘極及汲極電極皆與第二封裝之封裝基座23'電性隔離。第二封裝之源極、閘極及汲極導腳皆與第二封裝(圖未示)之封裝基座23'電性隔離。第二封裝之封裝基座23'直接安裝在散熱片27'上,且散熱片27'電性連接至電路或直流接地33以使封裝基座23'可電性連接至直流接地。再次的,高端電晶體66及低端電晶體65可分別地安裝於散熱片27'及27上,如第12圖所示,或可安裝在單一散熱片上(圖未示)。在一些實施方式中,散熱片27/27'實質上沒有任何電性絕緣材料,低端切換器之汲極電性連接至高端切換器之源極(圖未示),其可藉由將第二封裝之源極導腳電性連接至第一封裝之汲極導腳而達成。第二封裝之汲極導腳電性連接至直流高壓電源(圖未示)。
在一些實施方式中,第12圖中之第二電晶體為III-N元件,如III-N HEMT或HFET。在一些實施方式中,第二電晶體為加強式元件。在一些實施方式中,第二電晶體為側向元件,如側向高壓切換電晶體。在一些實施方式中,在二切換器65及66中所使用之電晶體實質上相似或相同。
在第13圖之電路圖中可見,第12圖之組合沒有電容器82而導致第11圖中所繪示之電路具有較高之EMI,因第12圖中之低端電晶體之封裝基座23電性連接至電路或直流接地。因此,在電路操作時可達成低EMI。即然因高端切換器266之組態造成直流高壓電源及接地間沒有實質電容(意即沒有電容器72),直流高壓電源38及電路或直流接地33應需耦接至一完整之電容以確保直流高壓電源38為交流接地。除此之外,既然第12圖中在第二封裝之封裝基座23'與散熱片27'之間沒有絕緣間隙物,第12圖之組合之電路操作時產生之熱和其他半橋組合相較之下可更輕易的排出。
第14圖繪示一單封裝,其可裝入電晶體及一半橋。該單封裝亦可裝入下述其他元件(如電容)。因此,此單封裝與裝入該封裝內之元件可形成單一電子組件。此單封裝包括由導電材料形成之封裝基座23(也就是導電結構部分)、由絕緣材料形成之外殼24、第一閘極導腳91、第一汲極導腳92、第二閘極導腳93、第二汲極導腳94以及第一源極導腳90,其電性連接至封裝基
座23。封裝基座23可直接安裝至散熱片27以使封裝基座23及散熱片27電性接觸及熱接觸。散熱片27可為電路或直流接地,或可電性連接至電路或直流接地,以使散熱片27接地。
第15及16圖繪示裝入第14圖之單封裝之二電晶體之組態。再次為了圖面清楚,第15及16圖之電晶體組態之部分特徵未繪示於圖中;但這些特徵會於後文敘述。請參照第15圖,低端切換器365及高端切換器366皆為可包括絕緣或半絕緣部分44/44'(例如為絕緣或半絕緣基材)之電晶體。電晶體可皆為側向元件,如III-N HEMT,其分別包括源極、閘極及汲極電極40-42或40'-42'。電晶體可為高壓切換電晶體。此二電晶體皆可直接安裝至封裝基座23,且絕緣或半絕緣部分44/44'鄰近或接觸封裝基座23。低端切換器65之源極40電性連接至封裝基座23,其使源極40被電性連接至封裝(見第14圖)之第一源極導腳90。低端切換器365之閘極41電性連接至封裝(圖未示)之第一閘極導腳91。高端切換器366之閘極41'電性連接至封裝(圖未示)之第二閘極導腳93。高端切換器66之汲極42'電性連接至封裝(圖未示)之第二汲極導腳94。低端切換器365之汲極42與高端切換器366之源極40'皆電性連接至封裝(圖未示)之第一汲極導腳92。因此,低端切換器365之汲極42與高端切換器366之源極40'互相電性連接。
高端切換器366之汲極42'亦可電性連接至電容器76之一端子,其可安裝至該封裝並使該端子相對於連接至汲極42'之端子,而汲極42'電性連接至封裝基座23。電容76與第10圖之電路圖繪示之電容器72可具有相同的目的。第15圖之組態可簡化半橋之製程,特別是與裝入自己的封裝中的二電晶體之組態相比。除此之外,將電容器76包括在封裝內可減少電路交流接地(第10圖中之33及38)與輸出節點(第10圖中之78)間之寄生電感(parasitic inductance)。
第16圖中之組態與第15圖之組態相似,除了其二電晶體365'及366'形成在共同絕緣或半絕緣部分44上(例如為絕緣或半絕緣基材),而此二電晶體可共用一共同主動元件層43。低端切換器之汲極及高端切換器之源極亦可以單一電極96形成。電晶體可兩者皆為側向元件,如III-N HEMT。電晶體可為高壓切換電晶體。此二電晶體可直接安裝至封裝基座23,且共同絕緣或半絕緣部分44鄰近或接觸封裝基座23。低端切換器65之源極40電性連接至封裝基座23,其使源極40被電性連接至封裝(見第14圖)之第一源極導腳90。低端切換器之閘極41電性連接至封裝(圖未示連接)之第一閘極導腳91。高端切換器之閘極41'電性連接至封裝(圖未示連接)之第二閘極導腳93。高端切換器之汲極42'電性連接至封裝(圖未示連接)之第二汲極導腳94。電極96(其同時為低端切換器之汲極及高端切換器之源
極)可電性連接至封裝(圖未示連接)之第一汲極導腳92。高端切換器之汲極42'亦可電性連接至電容器76之一端子,其可安裝至該封裝並使相對於其之端子電性連接至封裝基座23。電容76與第10圖之電路圖繪示之電容器72可具有相同的目的。與第14圖之組態相較之下,此組態更可簡化製程。
雖已有數個實施方式描述於此,但需了解其可做各種修改而不離此處所述之技術及元件之精神與範疇。承上述,其他實施方式亦在下列申請專利範圍之範疇內。
20、21、22‧‧‧導腳
23‧‧‧封裝基座
24‧‧‧外殼
27‧‧‧散熱片
31‧‧‧接線
40‧‧‧源極電極
41‧‧‧閘極電極
42‧‧‧汲極電極
43‧‧‧半導體主體
44‧‧‧絕緣或半絕緣部分
60、62‧‧‧連接器
Claims (25)
- 一種組件,包含:一第一電晶體,該第一電晶體裝入一第一封裝內,該第一封裝包含一第一導電結構部分;以及一第二電晶體,該第二電晶體裝入一第二封裝內,該第二封裝包含一第二導電結構部分;其中該第一電晶體之一源極電性連接至該第一導電結構部分,且該第二電晶體之一汲極電性連接至該第二導電結構部分。
- 一種組件,包含:一包含一第一源極之第一電晶體,該第一電晶體裝入一第一封裝中,該第一封裝包含一第一導電結構部分;以及一包含一第二源極與一第二汲極之第二電晶體,該第二電晶體裝入一第二封裝中,該第二封裝包含一第二導電結構部分,其中該第一源極電性連接至該第一導電結構部分,該第二源極與該第二導電結構部分電性隔離,且該第二汲極與該第二導電結構部分電性隔離。
- 如請求項1或2所述之組件,其中該第一電晶體或該第二電晶體為一高壓切換電晶體。
- 如請求項1或2所述之組件,其中該第一導 電結構部分或該第二導電結構部分直接安裝在一散熱片上且電性連接至該散熱片。
- 如請求項1或2所述之組件,其中該第一導電結構部分或該第二導電結構部分電性連接至一電路接地或一直流接地。
- 如請求項1所述之組件,其中該第二導電結構部分電性連接至一直流高壓電源。
- 如請求項6所述之組件,其中該第二導電結構部分藉由一絕緣間隙物與一電路接地或一直流接地隔開。
- 如請求項7所述之組件,其中該第二導電結構部分與該電路接地或該直流接地間之一電容使該第二導電結構部分被交流接地。
- 如請求項1或2所述之組件,其中該第一電晶體之一汲極電性連接至該第二電晶體之一源極。
- 如請求項9所述之組件,其中該第一電晶體為一低端(low-side)切換器而該第二電晶體為一高端(high-side)切換器。
- 一種半橋(half bridge),包含如請求項1或2所述之組件。
- 一種橋式電路,包含複數個如請求項11所述之半橋。
- 如請求項1或2所述之組件,其中該第一電晶體或該第二電晶體為一III-N電晶體。
- 如請求項1或2所述之組件,其中該第一電晶體或該第二電晶體為一側向元件。
- 一種電子組件,包含:一第一電晶體,該第一電晶體包含一第一源極與一第一汲極;一第二電晶體,該第二電晶體包含一第二源極以及一第二汲極;及一單封裝,該單封裝包含一導電結構部分,該封裝裝入有該第一電晶體以及該第二電晶體二者,其中該第一源極電性連接至該封裝之該導電結構部分,該第一汲極電性連接至該第二源極,且該第一電晶體直接安裝在該封裝之該導電結構部分。
- 如請求項15所述之該電子組件,其中該第一電晶體或該第二電晶體為一III-N電晶體。
- 如請求項15或16所述之該電子組件,其中該第一電晶體和該第二電晶體共用一共同基材。
- 如請求項17所述之該電子組件,其中該基材為一絕緣或半絕緣基材。
- 如請求項17所述之該電子組件,其中該第一汲極與該第二源極由一單一電極形成。
- 如請求項15或16所述之該電子組件,更包含一電容器,其中該封裝封入有該電容器。
- 如請求項20所述之該電子組件,其中該第二汲極電性連接至該電容器之一第一端(terminal),且該電容器之一第二端電性連接至該封裝之該導電結構部分。
- 如請求項15或16所述之該電子組件,其中該第一電晶體或該第二電晶體為一高壓切換電晶體。
- 如請求項15或16所述之該電子組件,其中該第一電晶體或該第二電晶體為一側向元件。
- 如請求項15或16所述之該電子組件,其中該封裝包含一第一源極導腳、一第一閘極導腳、一第一汲極導腳、一第二閘極導腳以及一第二汲極導腳。
- 如請求項24所述之該電子組件,其中該第一電晶體更包含一第一閘極,該第二電晶體更包含一第二閘極,該封裝之該導電結構部分電性連接至該第一源極導腳,該第一閘極電性連接至該第一閘極導腳,該第二閘極電性連接至該第二閘極導腳,該第二汲極電性連接至該第二汲極導腳,且該第一汲極及該第二源極二者皆電性連接至該第一汲極導腳。
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CN106098660A (zh) | 2016-11-09 |
EP2497109A2 (en) | 2012-09-12 |
CN102598256B (zh) | 2016-07-06 |
JP2013509732A (ja) | 2013-03-14 |
KR20120098667A (ko) | 2012-09-05 |
EP2497109A4 (en) | 2017-04-19 |
WO2011053981A3 (en) | 2011-09-09 |
US9190295B2 (en) | 2015-11-17 |
US8592974B2 (en) | 2013-11-26 |
US20130234257A1 (en) | 2013-09-12 |
WO2011053981A2 (en) | 2011-05-05 |
US8890314B2 (en) | 2014-11-18 |
TWI538149B (zh) | 2016-06-11 |
US20140377911A1 (en) | 2014-12-25 |
US8138529B2 (en) | 2012-03-20 |
EP2497109B1 (en) | 2021-01-27 |
JP5883392B2 (ja) | 2016-03-15 |
US8455931B2 (en) | 2013-06-04 |
JP2016096344A (ja) | 2016-05-26 |
US20140048849A1 (en) | 2014-02-20 |
CN102598256A (zh) | 2012-07-18 |
US20110101466A1 (en) | 2011-05-05 |
KR101737149B1 (ko) | 2017-05-17 |
TWI573240B (zh) | 2017-03-01 |
TW201126686A (en) | 2011-08-01 |
US20120132973A1 (en) | 2012-05-31 |
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