KR930024156A - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

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KR930024156A
KR930024156A KR1019930008452A KR930008452A KR930024156A KR 930024156 A KR930024156 A KR 930024156A KR 1019930008452 A KR1019930008452 A KR 1019930008452A KR 930008452 A KR930008452 A KR 930008452A KR 930024156 A KR930024156 A KR 930024156A
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semiconductor region
insulating film
conductive
conductive film
film
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KR970004457B1 (ko
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다케시 요시다
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사또오 후미오
가부시기가이샤 도시바
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66416Static induction transistors [SIT]
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    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
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    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/66409Unipolar field-effect transistors
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
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    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66848Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
    • H01L29/8122Vertical transistors

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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Abstract

본 발명은 집적도를 향상시킬 수 있고, 보다 고성능화를 달성할 수 있는 구조를 지니는 반도체 장치를 제공하고저 하는 것이다.
P형 실리콘 기판(1)내에 형성된 N형 확산층(3)과, 기판(1) 위에 형성된 절연막(4)과, 이 절연막(4)위에 형성된 게이트 전극(5)과, 이 게이트 전극(5)위에 형성된 절연막(7)과, 절연막(7), 게이트 전극(5) 및 절연막(4)을 각각 관통하여 확산층(3)에 달하는 스루홀(9)과, 이 스루홀(9)안에 게이트 전극(5)과 절연되어서 형성된 채널영역(11)과, 이 채널 영역(11)의 노출면내에 형성된 드레인 전극(12)을 갖는다. 이 구성에 의하면 채널의 사방이 게이트 전극(5)에 의하여 둘러싸이므로 게이트 전압에 의한 전류의 제어 능력이 높아진다. 또 소자가 기판(1)의 주면에 대하여 수직 방향으로 형성되므로 평면적인 소자의 사이즈를 축소할 수 있고 집적도의 향상을 도모할 수 있다.

Description

반도체 장치 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 관한 MISFET의 단면도, 제2도는 본 발명의 제1실시예에 관한 MISFET의 주요한 제1공정도를 도시하는 단면도, 제3도는 본 발명에 제1실시예에 관한 MISFET의 주요한 제2공정을 도시하는 단면도.

Claims (8)

  1. 반도체 기판(1)와, 상기 기체내에 형성된 제1도전형의 제1반도체 영역(3)과, 상기 기체상에 형성된 제1절연막(4)과, 상기 제1절연막상에 형성된 도전막(5)과, 상기 도전막상에 형성된 제2절연막(7)과, 상기 제1절연막, 상기 도전막 및 상기 제2절연막을 각각 관통하여 형성된 상기 제1반도체 영역에 달하는 개공부(9)와, 상기 개공부 내에 형성된 원하는 도전형의 제2의 반도체 영역(11)과, 상기 제2반도체 영역의 노출면내에 형성된 제1도전형의 제3반도체 영역(12)을 구비하고, 상기 제2반도체 영역내를 상기 기체의 한 주면(主面)에 대하여 수직으로 이동하는 캐리어의 유량을 상기 도전막에 인가되는 전압에 의하여 제어하는 것을 특징으로 하는 반도체 장치.
  2. 제1항에 있어서, 상기 도전막 및 상기 제2반도체 영역은 상기 개공부의 측벽상에 형성된 제3절연막(10)에 의하여 절연되는 것을 특징으로 하는 반도체 장치.
  3. 제1항에 있어서, 상기 제2반도체 영역은 제1도전형이고, 상기 도전막 및 상기 제2반도체 영역의 사이에 제2도전형의 제4반도체 영역(17)이 더욱 형성되어 있는 것을 특징으로 하는 반도체 장치.
  4. 제1항에 있어서, 상기 도전막은 상기 제2반도체 영역과의 접촉부에 있어서 쇼트키 장벽이 형성되는 재료로 이루어지는 것을 특징으로 하는 반도체 장치.
  5. 제1항에 있어서, 상기 도전막의 막두께는 정전유도 트랜지스터로 되는 것과 같은 막두께로 설정되는 것을 특징으로 하는 반도체 장치.
  6. 반도체 기체내에 고농도로 도전성 불순물을 포함한 제1도전형의 제1반도체 영역을 형성하는 공정과, 싱기 기체상에 제1절연막을 형성하는 공정과, 상기 제1절연막상에 도전막을 형성하는 공정과, 상기 도전막상에 제2절연막을 형성하는 공정과, 상기 제1절연막, 상기 도전막 및 상기 제2절연막을 각각 관통하여 상기 제1반도체 영역에 달하는 개공부를 형성하는 공정과, 상기 개공부내에 원하는 도전형의 제2반도체 영역을 형성하는 공정과, 상기 제2반도체 영역의 노출면내에 고농도로 도전성 불순물을 포함한 제1도전형의 제3반도체 영역을 형성하는 공정을 구비하는 것을 특징으로 하는 반도체 장치의 제조 방법.
  7. 제6항에 있어서, 상기 제2 반도체 영역을 형성하는 공정에는, 상기 제2반도체 영역을 종결정(種結晶)으로 하는 선택성 에피택셜 기술이 사용되는 것을 특징으로 하는 반도체 장치의 제조 방법.
  8. 제6항 또는 제7항중 어느 한 항에 있어서, 상기 제2절연막을 관통하여 상기 도전막에 달하는 새로운 개공부를 형성하고, 이 새로운 개공부로 부터 상기 도전막에 원하는 도전형의 불순물을 도입하는 공정을 더욱 구비하는 것을 특징으로 하는 반도체 장치의 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930008452A 1992-05-21 1993-05-18 반도체 장치 및 그 제조 방법 KR970004457B1 (ko)

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JP12895992A JP3229012B2 (ja) 1992-05-21 1992-05-21 半導体装置の製造方法
JP92-128959 1992-05-21

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KR930024156A true KR930024156A (ko) 1993-12-22
KR970004457B1 KR970004457B1 (ko) 1997-03-27

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KR100486253B1 (ko) * 2002-08-12 2005-05-03 삼성전자주식회사 수직형 트랜지스터의 제조방법
KR100894193B1 (ko) * 2001-09-18 2009-04-22 세이코 인스트루 가부시키가이샤 반도체 집적회로의 제조방법

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KR100353526B1 (ko) 1999-06-18 2002-09-19 주식회사 하이닉스반도체 반도체 소자의 제조방법
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KR100301246B1 (ko) 1999-06-30 2001-11-01 박종섭 반도체 소자의 제조 방법
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KR100510996B1 (ko) 1999-12-30 2005-08-31 주식회사 하이닉스반도체 선택적 에피텍셜 성장 공정의 최적화 방법
KR100327596B1 (ko) 1999-12-31 2002-03-15 박종섭 Seg 공정을 이용한 반도체소자의 콘택 플러그 제조방법
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