KR890013796A - 반도체장치 및 그 제조방법 - Google Patents
반도체장치 및 그 제조방법 Download PDFInfo
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- KR890013796A KR890013796A KR1019890001460A KR890001460A KR890013796A KR 890013796 A KR890013796 A KR 890013796A KR 1019890001460 A KR1019890001460 A KR 1019890001460A KR 890001460 A KR890001460 A KR 890001460A KR 890013796 A KR890013796 A KR 890013796A
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- 239000004065 semiconductor Substances 0.000 title claims 41
- 238000004519 manufacturing process Methods 0.000 title claims 4
- 239000012535 impurity Substances 0.000 claims 19
- 239000010408 film Substances 0.000 claims 8
- 239000000463 material Substances 0.000 claims 4
- 239000000758 substrate Substances 0.000 claims 3
- 238000000034 method Methods 0.000 claims 2
- 239000010409 thin film Substances 0.000 claims 2
- 238000009792 diffusion process Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 claims 1
- 238000005468 ion implantation Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4983—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
- H01L21/2815—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects part or whole of the electrode is a sidewall spacer or made by a similar technique, e.g. transformation under mask, plating
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/435—Resistive materials for field effect devices, e.g. resistive gate for MOSFET or MESFET
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7831—Field effect transistors with field effect produced by an insulated gate with multiple gate structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7836—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a significant overlap between the lightly doped extension and the gate electrode
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/90—MOSFET type gate sidewall insulating spacer
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명의 일실시예의 MOSFET의 구조 단면도.
제4도는 본 발명의 작용을 설명하기 위한 모식도이다.
Claims (18)
- 한쪽 도전형의 반도체영역내에 형성된 2개의 다른쪽 도전형의 불순물영역을 가지고, 상기 한쪽 도전형의 반도체 영역주표면상의 상기 2개의 다른쪽 도전형의 불순물영역의 사이의 영역을 적어도 커버하도록 형성된 절연막을 거쳐 게이트전극이 형성된 반도체장치에 있어서, 상기 2개의 다른쪽 도전형의 불순물영역은 상기 게이트전극의 근방에서 저불순물농도이고, 상기 저불순물 농도영역을 커버하도록 도전부재가 설치되고, 상기 도전부재는 저항을 거쳐 상기 게이트전극에 접속되어 있는 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 도전부재와 상기 게이트전극과는 동일재질인 것을 특징으로 하는 반도체 장치.
- 제1항에 있어서, 상기 도전부재는 다결정 반도체인 것을 특징으로 하는 반도체 장치.
- 한쪽 도전형의 반도체영역내에 형성된 2개의 다른쪽 도전형의 불순물 영역을 가지고 상기 한쪽 도전형의 반도체 영역 주표면상의 상기 2개의 다른쪽 도전형의 불순물 영역의 사이의 영역을 적어도 커버하도록 형성된 절연막을 거쳐 게이트전극이 형성된 반도체장치에 있어서, 상기 2개의 다른쪽 도전형의 불순물영역은 상기 게이트전극의 근방에서 저불순물 농도이고, 상기 저불순물 농도영역을 커버하도록 도전부재가 설치되고, 상기 도전부재와 상기 게이트전극과의 사이에 저항체를 삽입한 것을 특징으로 하는 반도체 장치.
- 제4항에 있어서, 상기 도전부재와 상기 게이트전극과는 동일재질인 것을 특징으로 하는 반도체 장치.
- 제4항에 있어서, 상기 도전부재는 다결정반도체인 것을 특징으로 하는 반도체 장치.
- 제4항에 있어서, 상기 저항체는 반도체산화물인 것을 특징으로 하는 반도체 장치.
- 한쪽 도전형의 반도체영역내에 형성된 2개의 다른쪽 도전형의 불순물 영역을 가지고 상기 한쪽 도전형의 반도체 주표면상의 상기 2개의 다른쪽 도전형의 불순물영역의 사이의 영역을 적어도 커버하도록 형성된 절연막을 거쳐 게이트전극이 형성된 반도체장치에 있어서, 상기 게이트 전극은 제1의 게이트전극, 제2의 게이트전극 및 제3의 게이트전극으로 분할되어 있고, 상기 제1의 게이트전극은 상기 2개의 다른쪽 도전형의 불순물 영역의 한쪽의 위에 존재하고, 상기 제3의 게이트전극은 상기 2개의 다른쪽 도전형의 불순물영역의 다른쪽이 위에 존재하고 있고, 제1의 게이트전극과 제2의 게이트전극간 및 제2의 게이트전극과 제3의 게이트전극간은 저항을 거쳐 접속되는 것을 특징으로하는 반도체 장치.
- 제8항에 있어서, 상기 제1, 제2 및 제3의 게이트전극은 동일재질인 것을 특징으로 하는 반도체 장치.
- 제8항에 있어서, 상기 제1, 제2 및 제3의 게이트전극은 다결정성반도체인 것을 특징으로 하는 반도체 장치.
- 제8항에 있어서, 제1의 게이트전극 및 제3의 게이트전극과 상기 제2의 게이트전극과를 저항을 거쳐 전기적으로 접속한 것을 특징으로 하는 반도체 장치.
- 반도체 기판상에 형성한 금속/절연막/반도체에 의한 MIS 또는 MOS 구조의 반도체 장치에서, 게이트를 마스크로하여 저농도의 불순물층을 형성한 후, 게이트 측면에 사이드월을 설치하고 이것을 마스크로하여 고농도의 소오스, 드레인확산층과 채널층과의 사이에 저농도의 오프셋 영역을 설치한 반도체장치에 있어서, 상기 사이드월에 도전성을 가지게하고, 이 사이드윌을 저항을 거쳐 게이트 전극에 전기적으로 접속한 것을 특징으로 하는 반도체 장치.
- 제12항에 있어서, 상기 사이드월과 상기 게이트전극은 동일재질인 것을 특징으로하는 반도체 장치.
- 제12항에 있어서, 상기 사이드월은 다결정성반도체인 것을 특징으로 하는 반도체 장치.
- 이하의 공정을 가지는 것을 특징으로 하는 반도체 장치의 제조방법. (1) 반도체 기판상에 게이트절연막, 게이트전극 및 소오스, 드레인 저불순물농도층을 형성하는 공정. (2) 게이트전극의 표면에 절연박막을 형성하는 공정. (3) 절연 박막상에 다결정 반도체막을 형성하는 공정. (4) 그후 게이트전극의 측벽에만 다결정 반도체막을 남기는 공정. (5) 소오스, 드레인 고불순물농도층을 형성하는 공정.
- 제15항에 있어서, 상기 공정(4)은 PIE 에칭을 사용하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제15항에 있어서, 상기 공정(5)은 이온 주입법을 사용한 것을 특징으로 하는 반도체장치의 제조방법.
- 한쪽 도전형의 반도체영역내에 형성된 2개의 불순물영역이 설치되고, 상기 2개의 불순물영역간의 상기 한쪽 도전형의 반도체영역의 주표면상에 절연막을 거쳐 설치된 게이트전극을 가지는 반도체장치에 있어서, 상기 게이트전극의 측벽에는 고저항층을 거쳐 도전부재가 형성되어 있는 것을 특징으로 하는 반도체 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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JP88-28680 | 1988-02-12 | ||
JP63-28680 | 1988-02-12 | ||
JP63028680A JP2667857B2 (ja) | 1988-02-12 | 1988-02-12 | 半導体装置およびその製造方法 |
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KR890013796A true KR890013796A (ko) | 1989-09-26 |
KR0135607B1 KR0135607B1 (ko) | 1998-04-22 |
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Application Number | Title | Priority Date | Filing Date |
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KR1019890001460A KR0135607B1 (ko) | 1988-02-12 | 1989-02-09 | 반도체 장치 및 그 제조방법 |
Country Status (5)
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US (1) | US5132758A (ko) |
EP (1) | EP0329047B1 (ko) |
JP (1) | JP2667857B2 (ko) |
KR (1) | KR0135607B1 (ko) |
DE (1) | DE68923629T2 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100569716B1 (ko) * | 1998-08-21 | 2006-08-11 | 삼성전자주식회사 | 액정 표시 장치의 박막 트랜지스터 구조 |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0834313B2 (ja) * | 1989-10-09 | 1996-03-29 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP2652108B2 (ja) * | 1991-09-05 | 1997-09-10 | 三菱電機株式会社 | 電界効果トランジスタおよびその製造方法 |
WO1993009567A1 (en) * | 1991-10-31 | 1993-05-13 | Vlsi Technology, Inc. | Auxiliary gate lightly doped drain (agldd) structure with dielectric sidewalls |
JPH0697192A (ja) * | 1992-07-29 | 1994-04-08 | Kawasaki Steel Corp | 半導体装置及びその製造方法 |
US6008544A (en) | 1992-12-08 | 1999-12-28 | Fujitsu Limited | Semiconductor device and manufacturing method of the semiconductor device |
KR960002100B1 (ko) * | 1993-03-27 | 1996-02-10 | 삼성전자주식회사 | 전하결합소자형 이미지센서 |
KR960006004A (ko) * | 1994-07-25 | 1996-02-23 | 김주용 | 반도체 소자 및 그 제조방법 |
US5747852A (en) * | 1995-05-26 | 1998-05-05 | Advanced Micro Devices, Inc. | LDD MOS transistor with improved uniformity and controllability of alignment |
US5817032A (en) | 1996-05-14 | 1998-10-06 | Biopath Automation Llc. | Means and method for harvesting and handling tissue samples for biopsy analysis |
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US20070166834A1 (en) * | 1998-10-05 | 2007-07-19 | Biopath Automation, L.L.C. | Apparatus and method for harvesting and handling tissue samples for biopsy analysis |
DE10047168A1 (de) * | 2000-09-22 | 2002-04-18 | Eupec Gmbh & Co Kg | Steuerbares Halbleiterbauelement |
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EP2998721A1 (en) * | 2002-09-26 | 2016-03-23 | BioPath Automation, L.L.C. | Apparatus and methods for automated handling and embedding of tissue samples |
US7179424B2 (en) * | 2002-09-26 | 2007-02-20 | Biopath Automation, L.L.C. | Cassette for handling and holding tissue samples during processing, embedding and microtome procedures, and methods therefor |
CN100518940C (zh) * | 2002-09-26 | 2009-07-29 | 比欧帕斯自动化公司 | 操作组织样品的盒子、嵌入组件和方法 |
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JP5259619B2 (ja) * | 2006-12-12 | 2013-08-07 | バイオパス・オートメーション・エル・エル・シー | 切片化可能な弾性発泡材料を備えた生検支持体 |
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GB2011178B (en) * | 1977-12-15 | 1982-03-17 | Philips Electronic Associated | Fieldeffect devices |
JPS5552262A (en) * | 1978-10-12 | 1980-04-16 | Fujitsu Ltd | Mos semiconductor device |
JPS5961182A (ja) * | 1982-09-30 | 1984-04-07 | Toshiba Corp | 半導体装置の製造方法 |
JPS59231864A (ja) * | 1983-06-15 | 1984-12-26 | Hitachi Ltd | 半導体装置 |
US4502202A (en) * | 1983-06-17 | 1985-03-05 | Texas Instruments Incorporated | Method for fabricating overlaid device in stacked CMOS |
EP0240781A3 (de) * | 1986-04-08 | 1989-12-06 | Siemens Aktiengesellschaft | Verfahren zum Herstellen von Flankenmaskierschichten an den Gate-Elektroden von MOS-Transistoren mit schwach-dotierten Drain-Anschlussgebieten |
JPS62248256A (ja) * | 1986-04-21 | 1987-10-29 | Nec Corp | 半導体装置 |
JPS63177471A (ja) * | 1987-01-16 | 1988-07-21 | Mitsubishi Electric Corp | Mos形半導体装置 |
-
1988
- 1988-02-12 JP JP63028680A patent/JP2667857B2/ja not_active Expired - Fee Related
-
1989
- 1989-02-09 KR KR1019890001460A patent/KR0135607B1/ko not_active IP Right Cessation
- 1989-02-09 US US07/308,777 patent/US5132758A/en not_active Expired - Lifetime
- 1989-02-13 DE DE68923629T patent/DE68923629T2/de not_active Expired - Fee Related
- 1989-02-13 EP EP89102412A patent/EP0329047B1/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100569716B1 (ko) * | 1998-08-21 | 2006-08-11 | 삼성전자주식회사 | 액정 표시 장치의 박막 트랜지스터 구조 |
Also Published As
Publication number | Publication date |
---|---|
KR0135607B1 (ko) | 1998-04-22 |
JP2667857B2 (ja) | 1997-10-27 |
JPH01205470A (ja) | 1989-08-17 |
EP0329047A2 (en) | 1989-08-23 |
US5132758A (en) | 1992-07-21 |
DE68923629D1 (de) | 1995-09-07 |
DE68923629T2 (de) | 1996-03-21 |
EP0329047A3 (en) | 1990-10-10 |
EP0329047B1 (en) | 1995-08-02 |
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