KR920022505A - 보호 소자를 갖고있는 반도체 집적회로 - Google Patents

보호 소자를 갖고있는 반도체 집적회로 Download PDF

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Publication number
KR920022505A
KR920022505A KR1019920009257A KR920009257A KR920022505A KR 920022505 A KR920022505 A KR 920022505A KR 1019920009257 A KR1019920009257 A KR 1019920009257A KR 920009257 A KR920009257 A KR 920009257A KR 920022505 A KR920022505 A KR 920022505A
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KR
South Korea
Prior art keywords
power supply
channel mos
supply wiring
semiconductor integrated
mos fet
Prior art date
Application number
KR1019920009257A
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English (en)
Other versions
KR960003858B1 (ko
Inventor
모리히사 히라따
Original Assignee
세끼모또 타다히로
닛본덴기 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 세끼모또 타다히로, 닛본덴기 가부시끼가이샤 filed Critical 세끼모또 타다히로
Publication of KR920022505A publication Critical patent/KR920022505A/ko
Application granted granted Critical
Publication of KR960003858B1 publication Critical patent/KR960003858B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors

Abstract

내용 없음.

Description

보호 소자를 갖고있는 반도체 집적회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 제1실시예에 따른 반도체 칩을 개략적으로 도시한 평면도.
제2도는 제1실시예의 회로도.
제3도는 제1실시예에 따른 보호 회로 부분을 도시한 반도체 칩의 평면도.

Claims (4)

  1. 제1전원 본딩 패드 및 반도체 칩의 선정된 층간 절연막을 선택적으로 피복함으로써 제공되고, 제1전원 전압과 제2전원 전압에 각각 접속된 제2전원 본딩 패드, 상기 제1전원 본딩 패드에 접속된 제1전원 배선과 상기 제2전원 본딩 패드에 접속된 제2전원 배선 사이에 접속되고, N채널 MOS FET와로 P채너 MOS FET를 포함하는 내부회로 및 상기 제1전원 배선과 상기 제2전원 배선 사이에 접속되고, 게이트 전극이 상기 제2전원 배선에 접속되는 N채널 MOS FET 및 상기 제1전원 배선과 상기 제2전원 배선 사이에 접속되고, 게이트 전극이 상기 제2전원 배선에 접속되는 P채널 MOS FET를 포함하는 보호회로를 포함하는 것을 특징으로 하는 반도체 집적 회로.
  2. 제1항에 있어서, 상기 보호 회로의 N채널 MOS FET의 상기 게이트 전극이 막 저항 소자를 통해 상기 제2전원 배선에 접속되고, 상기 P채널 MOS FET의 상기 게이트 전극이 막 저항 소자를 통해 상기 전원 배선에 접속되는 것을 특징으로 하는 반도체 집적 회로.
  3. 제1항에 있어서, 상기 보호회로의 상기 N및 P채널 MOS FET중 적어도 어느 하나의 드레인 전압의 파괴 전압이 상기 내부 회로인 상기 N및 P채널 MOS FET의 드레인 영역의 파괴 전압보다 낮은 값으로 설정되는 것을 특징으로 하는 반도체 집적 회로.
  4. 제3항에 있어서, 상기 내부회로의 상기 N및 P채널 MOS FET가 각각 LDD 구조를 갖는 것을 특징으로 하는 반도체 집적 회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920009257A 1991-05-29 1992-05-29 보호 소자를 갖고 있는 반도체 집적 회로 KR960003858B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP12424191 1991-05-29
JP91-124241 1991-05-29

Publications (2)

Publication Number Publication Date
KR920022505A true KR920022505A (ko) 1992-12-19
KR960003858B1 KR960003858B1 (ko) 1996-03-23

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920009257A KR960003858B1 (ko) 1991-05-29 1992-05-29 보호 소자를 갖고 있는 반도체 집적 회로

Country Status (4)

Country Link
US (1) US5449940A (ko)
EP (1) EP0516146A1 (ko)
JP (1) JP2953192B2 (ko)
KR (1) KR960003858B1 (ko)

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KR0145476B1 (ko) * 1995-04-06 1998-08-17 김광호 칩면적을 줄일 수 있는 패드구조를 가지는 반도체 메모리 장치
JPH08316426A (ja) * 1995-05-16 1996-11-29 Nittetsu Semiconductor Kk Mos型半導体装置およびその製造方法
JPH09321225A (ja) * 1996-05-30 1997-12-12 Nec Corp 半導体集積回路装置
JP3082720B2 (ja) * 1997-09-05 2000-08-28 日本電気株式会社 半導体集積回路の保護回路
US6137143A (en) * 1998-06-30 2000-10-24 Intel Corporation Diode and transistor design for high speed I/O
US6211001B1 (en) * 1998-07-24 2001-04-03 Sharp Laboratories Of America, Inc. Electrostatic discharge protection for salicided devices and method of making same
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JP3708764B2 (ja) * 1999-09-07 2005-10-19 Necエレクトロニクス株式会社 半導体装置
JP3430080B2 (ja) * 1999-10-08 2003-07-28 Necエレクトロニクス株式会社 半導体装置及びその製造方法
US6380570B1 (en) 2000-04-21 2002-04-30 International Business Machines Corporation Gate overvoltage control networks
JP2003031669A (ja) * 2001-07-13 2003-01-31 Ricoh Co Ltd 半導体装置
WO2003094241A1 (en) * 2002-04-29 2003-11-13 Koninklijke Philips Electronics N.V. Esd-robust power switch and method of using same
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US7038280B2 (en) * 2003-10-28 2006-05-02 Analog Devices, Inc. Integrated circuit bond pad structures and methods of making
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JP5586819B2 (ja) * 2006-04-06 2014-09-10 ピーエスフォー ルクスコ エスエイアールエル 半導体装置
JP5234717B2 (ja) * 2007-03-20 2013-07-10 ローム株式会社 半導体集積回路装置
JP5975322B2 (ja) * 2012-01-11 2016-08-23 Necスペーステクノロジー株式会社 固体撮像素子の駆動装置
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Also Published As

Publication number Publication date
JP2953192B2 (ja) 1999-09-27
US5449940A (en) 1995-09-12
EP0516146A1 (en) 1992-12-02
KR960003858B1 (ko) 1996-03-23
JPH05283630A (ja) 1993-10-29

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