KR970024162A - 풀업 또는 풀다운 저항을 갖는 반도체 장치(a semiconductor device having pull-up or pull-down resistance) - Google Patents

풀업 또는 풀다운 저항을 갖는 반도체 장치(a semiconductor device having pull-up or pull-down resistance) Download PDF

Info

Publication number
KR970024162A
KR970024162A KR1019960043751A KR19960043751A KR970024162A KR 970024162 A KR970024162 A KR 970024162A KR 1019960043751 A KR1019960043751 A KR 1019960043751A KR 19960043751 A KR19960043751 A KR 19960043751A KR 970024162 A KR970024162 A KR 970024162A
Authority
KR
South Korea
Prior art keywords
pull
type mosfet
semiconductor substrate
series
semiconductor device
Prior art date
Application number
KR1019960043751A
Other languages
English (en)
Other versions
KR100226508B1 (ko
Inventor
도시히데 쓰보이
Original Assignee
가네꼬 히사시
닛뽕덴끼 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가네꼬 히사시, 닛뽕덴끼 가부시끼가이샤 filed Critical 가네꼬 히사시
Publication of KR970024162A publication Critical patent/KR970024162A/ko
Application granted granted Critical
Publication of KR100226508B1 publication Critical patent/KR100226508B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0802—Resistors only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0921—Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

본 발명의 반도체 장치는 CMOSFET(110), P 형 MOSFET(107)의 드레인과 N 형 MOSFET(108)의 드레인을 접속하는 노드에 접속된 단자(101), 상기 CMOSFET를 구성하는 2 개의 MOSFET, 및 상기 단자와 구동 전원(102) 사이에 접속된 풀업 또는 풀다운 저항체를 구비하며, 풀업 또는 풀다운 저항체는 직렬로 접속된 2 개의 저항(103, 109)을 구비한다. 직렬로 접속된 2 개의 저항중에서, 단자(101)에 접속된 저항(109)은 반도체 기판과 PN 접합을 형성하지 않는 저항 재료로 형성되고, 다른 저항(103)은 반도체 기판과 PN 접합을 형성하는 도통형의 확산층으로 형성된다.

Description

풀업 또는 풀다운 저항을 갖는 반도체 장치(A SEMICONDUCTOR DEVICE HAVING PULL-UP OR PULL-DOWN RESISTANCE)
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도 9는 본 발명의 실시예를 나타내는 회로도.

Claims (6)

  1. 단자와 구동 전원 사이에 풀업 또는 풀다운 저항체를 갖는 반도체 장치에 있어서, 상기 풀업 또는 풀다운 저항체는 직렬로 접속된 2 개의 저항을 구비하며, 상기 직렬로 접속된 2 개의 저항중에서 상기 단자에 접속된 저항은 반도체 기판과 PN 접합을 형성하지 않는 저항 재료로 형성되고, 다른 저항은 반도체 기판과 PN 접합을 형성하는 도통형의 확산층으로 형성된 것을 특징으로 하는 반도체 장치.
  2. CMOSFET, P 형 MOSFET의 드레인과 N 형 MOSFET의 드레인을 접속하는 노드에 접속된 단자, 상기CMOSFET를 구성하는 P 형과 N 형 MOSFET, 및 상기 단자와 구동 전원 사이에 접속된 풀업 또는 풀다운 저항체를 구비하는 반도체 장치에 있어서, 상기 풀업 또는 풀다운 저항체는 직렬로 접속된 2 개의 저항을 구비하며, 상기 직렬로 접속된 2 개의 저항중에서, 상기 단자에 접속된 저항은 반도체 기판과 PN 접합을 형성하지 않는 저항 재료로 형성되고, 다른 저항은 반도체 기판과 PN 접합을 형성하는 도통형의 확산층으로 형성된 것을 특징으로 하는 반도체 장치.
  3. 제2항에 있어서, 상기 직렬로 접속된 2 개의 저항은 반도체 기판상의 상기 P 형 MOSFET와 상기 N 형 MOSFET 사이에 배치되는 것을 특징으로 하는 반도체 장치.
  4. 입출력 버퍼 회로를 갖는 반도체 장치에 있어서, 상기 입출력 버퍼 회로는 CMOSFET, P 형 MOSFET 의 드레인과 N 형 MOSFET의 드레인을 접속하는 노드에 접속된 단자, 상기 CMOSFET를 구성하는 P 형과 N 형 MOSFET, 상기 입출력 단자와 구동 전원 사이에 접속된 풀업 또는 풀다운 저항체, 및 상기 노드와 내부 회로 사이에 접속된 입력 버퍼 회로를 구비하며, 상기 입출력 단자를 통해 상기 내부 회로로부터 외부 회로로 신호가 전송될 때 전송될 신호에 해당하는 동일 신호가 상기 P 형 MOSFET와 상기 N 형 MOSFET 의 게이트에 인가되고, 상기 입출력 단자를 통해 외부 회로로부터 신호가 입력될때에는, 고레벨과 저레벨 신호가 각각 상 기 P 형 MOSFET 의 게이트와 상기 N 형 MOSFET 의 게이트에 인가되고, 상기 풀업 또는 풀다운 저항체는 직렬로 접속된 2 개의 저항을 구비하며, 상기 직렬로 접속된 2 개의 저항중에서, 상기 입출력 단자에 접속된 저항은 반도체 기판과 PN 접합을 형성하지 않는 저항 재료로 형성되고, 다른 저항은 반도체 기판과 PN 접합을 형성하는 도통형의 확산층으로 형성된 것을 특징으로 하는 반도체 장치.
  5. 제 4 항에 있어서, 상기 CMOSFET를 구성하는 상기 P 형 MOSFET 와 N 형 MOSFET는, 과전압이 상기 입출력 단자에 인가될 때, 상기 반도체 기판과 상기 CMOSFET에 의해 형성된 기생 사이리스터에 의해 발생되는 래치업을 방지할 수 있는 최소의 공간으로 상기 반도체 기판상에 배치되고, 상기 풀업 또는 풀다운 저항 체로서 직렬로 접속된 상기 2 개의 저항은 상기 반도체 기판상의 P 형 MOSFET와 상기 N 형 MOSFET 사이 에 배치되는 것을 특징으로 하는 반도체 장치.
  6. 제 4 항에 있어서, 상기 풀업 또는 풀다운 저항으로서 직렬로 접속된 상기 2 개의 저항이 상기 반도체 기판상의 상기 내부 회로와 상기 CMOSFET 사이에 배치되는 것을 특징으로 하는 반도체 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960043751A 1995-10-04 1996-10-02 풀업 또는 풀다운 저항을 갖는 반도체 장치 KR100226508B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP95-257727 1995-10-04
JP7257727A JP2904071B2 (ja) 1995-10-04 1995-10-04 半導体装置

Publications (2)

Publication Number Publication Date
KR970024162A true KR970024162A (ko) 1997-05-30
KR100226508B1 KR100226508B1 (ko) 1999-10-15

Family

ID=17310262

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960043751A KR100226508B1 (ko) 1995-10-04 1996-10-02 풀업 또는 풀다운 저항을 갖는 반도체 장치

Country Status (4)

Country Link
US (1) US5760447A (ko)
EP (1) EP0767497A1 (ko)
JP (1) JP2904071B2 (ko)
KR (1) KR100226508B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100842472B1 (ko) * 2006-12-27 2008-07-01 동부일렉트로닉스 주식회사 칩 면적 축소를 위한 반도체 소자의 구조 및 제조 방법

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100248509B1 (ko) * 1997-12-30 2000-03-15 김영환 매몰 채널 nmos 트랜지스터를 구비하는 반도체 장치의cmos 논리 게이트 및 그 제조방법
AU2002213441B2 (en) 2000-10-12 2006-10-26 Genentech, Inc. Reduced-viscosity concentrated protein formulations
JP2006165468A (ja) * 2004-12-10 2006-06-22 Nec Electronics Corp 半導体集積回路
US7268613B2 (en) * 2005-10-31 2007-09-11 International Business Machines Corporation Transistor switch with integral body connection to prevent latchup
JP5082309B2 (ja) * 2005-11-25 2012-11-28 セイコーエプソン株式会社 集積回路装置及び電子機器
JP5082527B2 (ja) * 2005-11-25 2012-11-28 セイコーエプソン株式会社 集積回路装置及び電子機器
US7939894B2 (en) * 2008-08-04 2011-05-10 International Business Machines Corporation Isolated high performance FET with a controllable body resistance
US9194912B2 (en) * 2012-11-29 2015-11-24 International Business Machines Corporation Circuits for self-reconfiguration or intrinsic functional changes of chips before vs. after stacking

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3967295A (en) * 1975-04-03 1976-06-29 Rca Corporation Input transient protection for integrated circuit element
US4143391A (en) * 1975-09-12 1979-03-06 Tokyo Shibaura Electric Co., Ltd. Integrated circuit device
JPS5243376A (en) * 1975-10-01 1977-04-05 Mitsubishi Electric Corp Semiconductor device
US4264941A (en) * 1979-02-14 1981-04-28 National Semiconductor Corporation Protective circuit for insulated gate field effect transistor integrated circuits
JPS6066049U (ja) * 1983-10-12 1985-05-10 日本電気株式会社 Ｃ−ｍｏｓ型電界効果トランジスタ
US4757363A (en) * 1984-09-14 1988-07-12 Harris Corporation ESD protection network for IGFET circuits with SCR prevention guard rings
US4763184A (en) * 1985-04-30 1988-08-09 Waferscale Integration, Inc. Input circuit for protecting against damage caused by electrostatic discharge
US4725875A (en) * 1985-10-01 1988-02-16 General Electric Co. Memory cell with diodes providing radiation hardness
US4819047A (en) * 1987-05-15 1989-04-04 Advanced Micro Devices, Inc. Protection system for CMOS integrated circuits
JPH01102954A (ja) * 1987-10-16 1989-04-20 Nissan Motor Co Ltd 半導体装置の入力保護回路
US4963505A (en) * 1987-10-27 1990-10-16 Nippondenso Co., Ltd. Semiconductor device and method of manufacturing same
US5028819A (en) * 1990-06-08 1991-07-02 Zilog, Inc. High CMOS open-drain output buffer
US5489547A (en) * 1994-05-23 1996-02-06 Texas Instruments Incorporated Method of fabricating semiconductor device having polysilicon resistor with low temperature coefficient
US5581105A (en) * 1994-07-14 1996-12-03 Vlsi Technology, Inc. CMOS input buffer with NMOS gate coupled to VSS through undoped gate poly resistor
US5637900A (en) * 1995-04-06 1997-06-10 Industrial Technology Research Institute Latchup-free fully-protected CMOS on-chip ESD protection circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100842472B1 (ko) * 2006-12-27 2008-07-01 동부일렉트로닉스 주식회사 칩 면적 축소를 위한 반도체 소자의 구조 및 제조 방법

Also Published As

Publication number Publication date
US5760447A (en) 1998-06-02
KR100226508B1 (ko) 1999-10-15
JP2904071B2 (ja) 1999-06-14
EP0767497A1 (en) 1997-04-09
JPH09102551A (ja) 1997-04-15

Similar Documents

Publication Publication Date Title
KR880010500A (ko) 절연게이트형 세미카스텀 집적회로
KR950030487A (ko) 래치-업을 방지한 씨모스형 데이타 출력버퍼
KR930005371A (ko) 반도체 집적회로의 출력회로
KR890013862A (ko) 전압레벨 변환회로
KR950012707A (ko) 반도체 장치
KR880012008A (ko) 전원절환회로
KR890012398A (ko) Mos형 반도체장치의 입력보호회로
KR920015365A (ko) 입출력 버퍼회로
KR840002176A (ko) 반도체 집적회로 장치
KR930001585A (ko) 출력 회로 및 반도체 집적 회로 장치
KR880012014A (ko) Bimos 논리회로
KR860000719A (ko) 상보형(相補型)Bi-MIS 게이트회로
KR830006822A (ko) 반도체집적회로장치
KR970024162A (ko) 풀업 또는 풀다운 저항을 갖는 반도체 장치(a semiconductor device having pull-up or pull-down resistance)
KR910016146A (ko) 반도체 릴레이 회로
KR960035626A (ko) 파워 온 리셋 회로
KR950010367A (ko) 대칭적인 스위칭 지연을 갖는 트랜슬레이터 회로
KR940006258A (ko) 반도체장치 및 고체촬상장치의 수평레지스터
KR910005448A (ko) 반도체 집적회로
KR890009000A (ko) 디지탈 집적 회로
KR970072681A (ko) 기판 바이어스가 분리된 회로에서의 정전기 보호회로
KR920001523A (ko) 검출 회로를 포함하는 반도체 집적회로
KR940020669A (ko) 바이어스 회로(bias circuit)
KR930006875A (ko) 집적회로
KR960027331A (ko) 버퍼회로 및 바이어스회로

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
G170 Re-publication after modification of scope of protection [patent]
FPAY Annual fee payment

Payment date: 20020723

Year of fee payment: 4

LAPS Lapse due to unpaid annual fee