KR920017126A - 복수의 인터페이스 레벨을 출력 가능한 반도체 집적 회로장치 - Google Patents

복수의 인터페이스 레벨을 출력 가능한 반도체 집적 회로장치 Download PDF

Info

Publication number
KR920017126A
KR920017126A KR1019920001135A KR920001135A KR920017126A KR 920017126 A KR920017126 A KR 920017126A KR 1019920001135 A KR1019920001135 A KR 1019920001135A KR 920001135 A KR920001135 A KR 920001135A KR 920017126 A KR920017126 A KR 920017126A
Authority
KR
South Korea
Prior art keywords
circuit
output
semiconductor integrated
integrated circuit
input
Prior art date
Application number
KR1019920001135A
Other languages
English (en)
Other versions
KR100218843B1 (ko
Inventor
미끼오 야마기시
가즈오 고이데
데쯔오 나까노
Original Assignee
가나이 쓰또무
가부시끼가이샤 히다찌세이샤꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 쓰또무, 가부시끼가이샤 히다찌세이샤꾸쇼 filed Critical 가나이 쓰또무
Publication of KR920017126A publication Critical patent/KR920017126A/ko
Application granted granted Critical
Publication of KR100218843B1 publication Critical patent/KR100218843B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11898—Input and output buffer/driver structures

Abstract

내용 없음

Description

복수의 인터페이스 레벨을 출력 가능한 반도체 집적 회로장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 관련된 반도체 집적 회로 장치의 1실시예를 나타내는 블록도, 제3도는 본 발명에 관련된 반도체 집적 회로 장치가 사용되는 멀티 마이크로 컴퓨터 시스템의 1실시예를 나타내는 블록도.

Claims (4)

  1. 비교적 높은 신호 레벨에 대응한 입력회로 및/또는 출력회로와, 비교적 낮은 신호 레벨에 대응한 입력회로 및/또는 출력회로와, 상기 어느 한쪽의 입력회로의 출력신호를 받아서, 다른쪽의 출력회로의 입력신호를 형성하는 내부 논리회로를 포함하고, 비교적 높은 레벨에 대응한 상기 입력회로 및/또는 상기 출력회로와, 상기 내부논리회로, 그리고 비교적 낮은 레벨에 대응한 상기 입력회로와 상기 출력회로 중의 구동제어 회로와는 상기 비교적 높은 레벨에 대응한 동작 전압에 의해 회로 동작을 시키고, 비교적 낮은 레벨에 대응한 상기 출력회로 중 상기 구동제어회로에 의해 구동되는 출력소자는 상기 비교적 낮은 레벨에 대응한 동작전압에 의해 동작이 이루어짐을 특징으로 하는 반도체 집적회로.
  2. 제1항에 있어서, 상기 반도체 집적 회로장치는 N형 기판위에 형성된 P채널형 MOSFET와 P형 웰 영역내에 형성된 N채널형 MOSFET를 사용하여 구성되며, 비교적 낮은 레벨의 출력신호를 형성하는 출력회로는 독립된 웰 영역 내에 형성된 푸쉬풀 형태의 N채널형 MOSFET에 의해 구성됨을 특징으로 하는 반도체 집적회로 장치.
  3. 제2항에 있어서, 상기 출력회로에 주어지는 동작 전압 및 회로의 접지 전압은 독립된 내부배선에 의해 공급됨을 특징으로 하는 반도체 집적회로.
  4. 제1항에 있어서, 상기 입력회로 및/또는 출력회로에는 미리 칩의 외주에 마련된 루프 형상의 전원 배선이 적당히 절단되어 하나의 독립된 전원 배선이 형성되고, 상기 루프 형상의 전원 배선에는 복수의 본딩 패드가 마련되어 있으며, 상기 절단에 의해 독립된 전원 배선에는 적어도 하나의 본딩 패드가 접속되어 출력 레벨에 대응한 동작 전압이나 비교적 높은 레벨에 대응한 동작 전압이 주어짐을 특징으로 하는 반도체 집적회로 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920001135A 1991-02-25 1992-01-27 복수의 인터페이스 레벨을 출력 가능한 반도체 집적 회로 장치 KR100218843B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP91-053345 1991-02-25
JP05334591A JP3256554B2 (ja) 1991-02-25 1991-02-25 半導体集積回路装置

Publications (2)

Publication Number Publication Date
KR920017126A true KR920017126A (ko) 1992-09-26
KR100218843B1 KR100218843B1 (ko) 1999-09-01

Family

ID=12940185

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920001135A KR100218843B1 (ko) 1991-02-25 1992-01-27 복수의 인터페이스 레벨을 출력 가능한 반도체 집적 회로 장치

Country Status (3)

Country Link
US (1) US5387809A (ko)
JP (1) JP3256554B2 (ko)
KR (1) KR100218843B1 (ko)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL109491A (en) * 1994-05-01 1999-11-30 Quick Tech Ltd Customizable logic array device
US5521530A (en) * 1994-08-31 1996-05-28 Oki Semiconductor America, Inc. Efficient method and resulting structure for integrated circuits with flexible I/O interface and power supply voltages
US5787291A (en) * 1996-02-05 1998-07-28 Motorola, Inc. Low power data processing system for interfacing with an external device and method therefor
US5838631A (en) 1996-04-19 1998-11-17 Integrated Device Technology, Inc. Fully synchronous pipelined ram
US6683336B1 (en) 1996-12-27 2004-01-27 Kabushiki Kaisha Toshiba Semiconductor integrated circuit, supply method for supplying multiple supply voltages in semiconductor integrated circuit, and record medium for storing program of supply method for supplying multiple supply voltages in semiconductor integrated circuit
JPH10189749A (ja) * 1996-12-27 1998-07-21 Toshiba Corp 半導体集積回路装置、半導体集積回路装置の多電源供給方法、半導体集積回路装置の多電源供給プログラムを記録した機械読み取り可能な記録媒体
US5870347A (en) 1997-03-11 1999-02-09 Micron Technology, Inc. Multi-bank memory input/output line selection
US6014759A (en) * 1997-06-13 2000-01-11 Micron Technology, Inc. Method and apparatus for transferring test data from a memory array
US6044429A (en) 1997-07-10 2000-03-28 Micron Technology, Inc. Method and apparatus for collision-free data transfers in a memory device with selectable data or address paths
US5923594A (en) * 1998-02-17 1999-07-13 Micron Technology, Inc. Method and apparatus for coupling data from a memory device using a single ended read data path
US6115320A (en) 1998-02-23 2000-09-05 Integrated Device Technology, Inc. Separate byte control on fully synchronous pipelined SRAM
US6405280B1 (en) 1998-06-05 2002-06-11 Micron Technology, Inc. Packet-oriented synchronous DRAM interface supporting a plurality of orderings for data block transfers within a burst sequence
US6157051A (en) * 1998-07-10 2000-12-05 Hilevel Technology, Inc. Multiple function array based application specific integrated circuit
JP2001053155A (ja) * 1999-06-04 2001-02-23 Seiko Epson Corp 半導体集積回路装置
US7069406B2 (en) * 1999-07-02 2006-06-27 Integrated Device Technology, Inc. Double data rate synchronous SRAM with 100% bus utilization
JP2008065872A (ja) * 2006-09-05 2008-03-21 Sharp Corp 検査用半導体集積回路及び検査システム並びに検査方法
JP5412662B2 (ja) * 2008-03-31 2014-02-12 独立行政法人産業技術総合研究所 低容量貫通電極を持つ３次元積層構造体コンピュータシステム
US9812960B2 (en) * 2015-12-29 2017-11-07 Texas Instruments Incorporated Methods and apparatus for a low standby current DC-DC power controller with improved transient response

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5360188A (en) * 1976-11-10 1978-05-30 Epson Corp Ic for electronic device having complex functions
JPS57176585A (en) * 1981-04-24 1982-10-29 Hitachi Ltd Ram input and output circuit
JPS57199250A (en) * 1981-06-02 1982-12-07 Nec Corp Semiconductor integrated circuit
JPS61264747A (ja) * 1985-05-20 1986-11-22 Matsushita Electronics Corp 半導体装置
JPS6431438A (en) * 1987-07-28 1989-02-01 Seiko Epson Corp Plural power supply voltages corresponding gate array device
JPH0239455A (ja) * 1988-07-28 1990-02-08 Toshiba Corp 大規模集積回路
JPH0247843A (ja) * 1988-08-10 1990-02-16 Nec Corp 集積回路の製造方法

Also Published As

Publication number Publication date
JPH04269861A (ja) 1992-09-25
JP3256554B2 (ja) 2002-02-12
US5387809A (en) 1995-02-07
KR100218843B1 (ko) 1999-09-01

Similar Documents

Publication Publication Date Title
KR920017126A (ko) 복수의 인터페이스 레벨을 출력 가능한 반도체 집적 회로장치
KR890012398A (ko) Mos형 반도체장치의 입력보호회로
KR850005059A (ko) 스위칭 잡음을 감소시킨 lsi 게이트 어레이
KR950030487A (ko) 래치-업을 방지한 씨모스형 데이타 출력버퍼
KR880010500A (ko) 절연게이트형 세미카스텀 집적회로
KR970067335A (ko) 반도체 출력 회로
KR920015365A (ko) 입출력 버퍼회로
KR920022505A (ko) 보호 소자를 갖고있는 반도체 집적회로
KR890007424A (ko) 반도체집적회로
KR970072681A (ko) 기판 바이어스가 분리된 회로에서의 정전기 보호회로
EP0687068A2 (en) Output driver for use in semiconductor integrated circuit
KR970024162A (ko) 풀업 또는 풀다운 저항을 갖는 반도체 장치(a semiconductor device having pull-up or pull-down resistance)
KR940001384A (ko) 반도체 장치
KR910001969A (ko) 반도체집적회로
KR960042745A (ko) 다수개의 스위칭 수단을 가지는 다용도 패드를 구비한 반도체 메모리장치
KR940018965A (ko) Cmos 집적회로장치 및 그것을 사용한 데이터 처리시스템
JPH11145397A (ja) 半導体集積回路装置
KR940004833A (ko) 씨엠오에스(cmos)회로의 래치업 저감출력 드라이버 및 래치업 저감방법
KR920001711A (ko) 반도체집적회로
KR0132374B1 (ko) 반도체 집적장치의 입력버퍼
KR890016769A (ko) 바이폴라트랜지스터와 mosfet의 복합으로 형성된 논리회로
KR850003069A (ko) 반도체 집적회로 장치
KR900013655A (ko) 반도체 회로
KR19980064026A (ko) 다른 회로들 간에 공유될 수 있는 전류 제한 회로 및 방법
KR930011244A (ko) 반도체 집적 회로장치

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20040601

Year of fee payment: 6

LAPS Lapse due to unpaid annual fee