KR920001711A - 반도체집적회로 - Google Patents

반도체집적회로 Download PDF

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Publication number
KR920001711A
KR920001711A KR1019910010151A KR910010151A KR920001711A KR 920001711 A KR920001711 A KR 920001711A KR 1019910010151 A KR1019910010151 A KR 1019910010151A KR 910010151 A KR910010151 A KR 910010151A KR 920001711 A KR920001711 A KR 920001711A
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KR
South Korea
Prior art keywords
semiconductor integrated
integrated circuit
digital circuit
power
guide well
Prior art date
Application number
KR1019910010151A
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English (en)
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KR940000895B1 (ko
Inventor
가오루 데라시마
가즈오 이시카와
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
다케다이 마사다카
도시바 마이크로 일렉트로닉스 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 아오이 죠이치, 가부시키가이샤 도시바, 다케다이 마사다카, 도시바 마이크로 일렉트로닉스 가부시키가이샤 filed Critical 아오이 죠이치
Publication of KR920001711A publication Critical patent/KR920001711A/ko
Application granted granted Critical
Publication of KR940000895B1 publication Critical patent/KR940000895B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0214Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

내용 없음.

Description

반도체 집적회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 반도체집적회로의 1실시예를 나타낸 구성설명도.
제2도와 제3도 및 제4도는 각각 본 발명에 따른 반도체집적회로의 다른 실시예를 나타낸 구성설명도,
제5도는 종래의 반도체집적회로를 나타낸 구성설명도이다.
* 도면의 주요부분에 대한 부호의 설명
10 : 디지탈회로부 11 : 제1Vcc배선
12 : 제 2Vcc배선 13,20 : 접촉부
14 : N형 반도체기판의 N+영역 15 : P챈널 MOS트랜지스터영역
16 : P웰 17 : N챈널 MOS트랜지스터영역
18 : 제1Vcc배선 19 : 제2Vcc배선
21 : P웰의 P+영역 30 : 디지탈회로부의 일부
31 : 가이드링용 웰 32 : 다른 디지탈회로부
33 : 디지탈회로부 34 : 아날로그회로부

Claims (4)

  1. 아날로그회로와 디지탈회로가 혼재된 반도체집적회로에 있어서, 디지탈회로부( 10)의 회로소자(15, 17)에 접속된 제1전원배선(11,18)과 디지탈회로부의 기판(14,2 1)에 접속된 제2전원배선(12,19)이 최소한 디지탈회로부영역내에서는 분리되어 형성된 것을 특징으로 하는 반도체집적회로.
  2. 제1항에 있어서, 상기 제1전원배선(11,18)과 제 2전원배선(12, 19)은 반도체칩상에서 분리된 채 상호 별개의 전원패드에 접속된 것을 특징으로 하는 반도체집적회로.
  3. 제1항 또는 제2항에 있어서, 상기 디지탈회로부의 일부(30)는 그 기판영역이 가이드링용 웰(31)에 의해 에워싸이고, 이 가이드링용 웰(31)에 제2전원배선(12,19)중 1개가 접속된 것을 특징으로 하는 반도체 집적회로.
  4. 제1항 또는 제2항에 있어서, 상기 디지탈회로부(33)는 그 기판영역이 가이드링용 웰(31)에 의해 에워싸이고, 이 가이드링용 웰(31)에 상기 제2전원배선(12,19)중 1개가 접속된 것을 특징으로 하는 반도체 집적회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910010151A 1990-06-21 1991-06-19 반도체 집적회로 KR940000895B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP02-161416 1990-06-21
JP161416 1990-06-21
JP2161416A JP2619119B2 (ja) 1990-06-21 1990-06-21 半導体集積回路

Publications (2)

Publication Number Publication Date
KR920001711A true KR920001711A (ko) 1992-01-30
KR940000895B1 KR940000895B1 (ko) 1994-02-03

Family

ID=15734684

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910010151A KR940000895B1 (ko) 1990-06-21 1991-06-19 반도체 집적회로

Country Status (5)

Country Link
US (1) US5231300A (ko)
EP (1) EP0464452B1 (ko)
JP (1) JP2619119B2 (ko)
KR (1) KR940000895B1 (ko)
DE (1) DE69131898T2 (ko)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3228589B2 (ja) * 1993-03-15 2001-11-12 株式会社東芝 マルチチップモジュール
US5811882A (en) * 1996-09-24 1998-09-22 Philips Electronics North America Corporation On-chip shielding coaxial conductors for mixed-signal IC
US6744112B2 (en) * 2002-10-01 2004-06-01 International Business Machines Corporation Multiple chip guard rings for integrated circuit and chip guard ring interconnect
JP2009088328A (ja) * 2007-10-01 2009-04-23 Nec Electronics Corp 半導体集積回路
JP5372578B2 (ja) 2009-04-09 2013-12-18 ルネサスエレクトロニクス株式会社 半導体装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3002894C2 (de) * 1980-01-28 1982-03-18 Siemens AG, 1000 Berlin und 8000 München Monolithisch integrierte Halbleiterschaltung mit Transistoren
US4442529A (en) * 1981-02-04 1984-04-10 At&T Bell Telephone Laboratories, Incorporated Power supply rejection characteristics of CMOS circuits
JPS5922357A (ja) * 1982-07-28 1984-02-04 Toshiba Corp Cmos形半導体集積回路
JPS5923558A (ja) * 1982-07-30 1984-02-07 Hitachi Ltd 半導体集積回路
JPS5943563A (ja) * 1982-09-03 1984-03-10 Olympus Optical Co Ltd 半導体集積回路装置
US4727518A (en) * 1984-02-17 1988-02-23 Intel Corporation Apparatus for limiting minority carrier injection in CMOS memories
JPH0693497B2 (ja) * 1986-07-30 1994-11-16 日本電気株式会社 相補型mis集積回路
US5060044A (en) * 1987-05-28 1991-10-22 Texas Instruments Incorporated Integrated bipolar-CMOS circuit isolation for providing different backgate and substrate bias
JPS648659A (en) * 1987-06-30 1989-01-12 Mitsubishi Electric Corp Supplementary semiconductor integrated circuit device
DE3886283T2 (de) * 1987-07-10 1994-05-11 Toshiba Kawasaki Kk Halbleiterbauelement mit Bereichen unterschiedlicher Störstellenkonzentration.
JPH01258461A (ja) * 1988-04-08 1989-10-16 Hitachi Ltd 集積回路
JPH02110963A (ja) * 1988-10-19 1990-04-24 Matsushita Electric Ind Co Ltd 半導体装置
JP2771233B2 (ja) * 1989-03-24 1998-07-02 日本電気株式会社 半導体集積回路装置
US5099239A (en) * 1989-09-21 1992-03-24 Xerox Corporation Multi-channel analogue to digital convertor

Also Published As

Publication number Publication date
DE69131898D1 (de) 2000-02-17
EP0464452B1 (en) 2000-01-12
JPH0453255A (ja) 1992-02-20
DE69131898T2 (de) 2000-07-06
US5231300A (en) 1993-07-27
KR940000895B1 (ko) 1994-02-03
EP0464452A2 (en) 1992-01-08
EP0464452A3 (en) 1992-04-01
JP2619119B2 (ja) 1997-06-11

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