KR910015039A - 반도체웨이퍼 - Google Patents
반도체웨이퍼 Download PDFInfo
- Publication number
- KR910015039A KR910015039A KR1019910000768A KR910000768A KR910015039A KR 910015039 A KR910015039 A KR 910015039A KR 1019910000768 A KR1019910000768 A KR 1019910000768A KR 910000768 A KR910000768 A KR 910000768A KR 910015039 A KR910015039 A KR 910015039A
- Authority
- KR
- South Korea
- Prior art keywords
- integrated circuit
- pattern
- wiring patterns
- dicing line
- semiconductor wafer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Dicing (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 반도체웨이퍼의 1실시예의 일부를 나타낸 패턴도, 제2도는 제1도에 도시된 반도체웨이퍼가 다이싱라인(dicing line)에 의해 각각의 집적회로칩영역으로 분할된 상태에 대한 일부를 나타낸 패턴도.
Claims (1)
- 다이싱라인(11)에 의해 각각의 집적회로칩으로 분할된 칩영역(12)중 적어도 일부의 칩영역상에 복수의 출력패드(13)에 대해 선택적으로 출력신호를 공급하기 위한 출력절환제어회로를 갖춘 소정의 집적회로의 패턴이 형성된 상태의 반도체웨이퍼에 있어서, 상기 소정의 집적회로패턴이 형성되어 있는 칩영역상에서 선택적으로 출력신호가 공급되는 하나의 세트된 복수의 출력패드마다 이 복수의 출력패드로부터 상기 다이싱라인(11)영역상까지 각각 인출되는 복수의 배선패턴(14)이 형성되고, 상기 다이싱라인(11)영역상에서 상기 복수의 배선패턴(14)을 공통으로 접속하는 배선패턴(14) 및 테스트용 패드(15)가 형성되어 있는 것을 특징으로 하는 반도체웨이퍼.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP02-009582 | 1990-01-19 | ||
JP958290A JPH0758725B2 (ja) | 1990-01-19 | 1990-01-19 | 半導体ウェハ |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910015039A true KR910015039A (ko) | 1991-08-31 |
KR940010641B1 KR940010641B1 (ko) | 1994-10-24 |
Family
ID=11724307
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910000768A KR940010641B1 (ko) | 1990-01-19 | 1991-01-18 | 반도체 웨이퍼 |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0438127B1 (ko) |
JP (1) | JPH0758725B2 (ko) |
KR (1) | KR940010641B1 (ko) |
DE (1) | DE69105530T2 (ko) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0678904A1 (en) * | 1994-04-12 | 1995-10-25 | Lsi Logic Corporation | Multicut wafer saw process |
JPH07302773A (ja) * | 1994-05-06 | 1995-11-14 | Texas Instr Japan Ltd | 半導体ウエハ及び半導体装置 |
EP0767492A3 (en) * | 1995-10-02 | 1998-09-09 | Altera Corporation | Integrated circuit test system |
US6020758A (en) * | 1996-03-11 | 2000-02-01 | Altera Corporation | Partially reconfigurable programmable logic device |
JPH09252034A (ja) * | 1996-03-18 | 1997-09-22 | Mitsubishi Electric Corp | 半導体ウエハ,半導体装置及び半導体装置の製造方法 |
JP2001135597A (ja) * | 1999-08-26 | 2001-05-18 | Fujitsu Ltd | 半導体装置の製造方法 |
JP2004505442A (ja) * | 2000-07-21 | 2004-02-19 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 改善されたいわゆるソーボーを有する集積回路を製造する方法 |
JP4631572B2 (ja) * | 2005-07-14 | 2011-02-16 | セイコーエプソン株式会社 | 液滴吐出ヘッド |
JP2013187402A (ja) | 2012-03-08 | 2013-09-19 | Mitsubishi Electric Corp | 半導体ウェハ及びその検査方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3849872A (en) * | 1972-10-24 | 1974-11-26 | Ibm | Contacting integrated circuit chip terminal through the wafer kerf |
JPH0530361Y2 (ko) * | 1988-02-23 | 1993-08-03 | ||
JPH01276735A (ja) * | 1988-04-28 | 1989-11-07 | Fuji Electric Co Ltd | 集積回路素子ウエハ |
-
1990
- 1990-01-19 JP JP958290A patent/JPH0758725B2/ja not_active Expired - Lifetime
-
1991
- 1991-01-16 EP EP91100434A patent/EP0438127B1/en not_active Expired - Lifetime
- 1991-01-16 DE DE69105530T patent/DE69105530T2/de not_active Expired - Fee Related
- 1991-01-18 KR KR1019910000768A patent/KR940010641B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0438127A3 (en) | 1992-03-04 |
DE69105530D1 (de) | 1995-01-19 |
JPH0758725B2 (ja) | 1995-06-21 |
EP0438127A2 (en) | 1991-07-24 |
DE69105530T2 (de) | 1995-05-04 |
KR940010641B1 (ko) | 1994-10-24 |
EP0438127B1 (en) | 1994-12-07 |
JPH03214638A (ja) | 1991-09-19 |
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FPAY | Annual fee payment |
Payment date: 20030930 Year of fee payment: 10 |
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