KR860002866A - 반도체 집적회로장치 - Google Patents

반도체 집적회로장치 Download PDF

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Publication number
KR860002866A
KR860002866A KR1019850004137A KR850004137A KR860002866A KR 860002866 A KR860002866 A KR 860002866A KR 1019850004137 A KR1019850004137 A KR 1019850004137A KR 850004137 A KR850004137 A KR 850004137A KR 860002866 A KR860002866 A KR 860002866A
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KR
South Korea
Prior art keywords
integrated circuit
circuit device
semiconductor integrated
clock
signal lines
Prior art date
Application number
KR1019850004137A
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English (en)
Other versions
KR900000105B1 (ko
Inventor
유끼히로 우시꾸
Original Assignee
사바 쇼오이찌
가부시끼 가이샤 도오시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 사바 쇼오이찌, 가부시끼 가이샤 도오시바 filed Critical 사바 쇼오이찌
Publication of KR860002866A publication Critical patent/KR860002866A/ko
Application granted granted Critical
Publication of KR900000105B1 publication Critical patent/KR900000105B1/ko

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

내용 없음

Description

반도체 집적회로장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예를 나타내는 회로구성도.]
제2도와 제3도는 본 발명의 다른 실시예를 나타내는 회로구성도.
1,11 : 클록발생기, 21∼N,121,122,201,202 : 클록드라이버, 31∼3N, 131,132 : 클록신호선, 4 : 부하회로, 5 : 공통접속 금속배선, 6 : CMOS셀, 7 : 배선영역, 9 : 레지스터, 10 : 메모리.

Claims (1)

  1. 반도체기판에 클록발생기와, 상기 클록발생기의 한 출력을 복수의 클록신호선에 공급시키도록 분할 배치된 복수의 클록드라이버, 상기 각 클록신호선을 매개하여 클록신호가 공급되는 복수의 부하회로등을 집적 형성시킨 반도체집적회로장치에 있어서, 상기 복수의 클록신호선을 공통접속시킨 것을 특징으로 하는 반도체 집적회로장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019850004137A 1984-09-29 1985-06-12 반도체 집적회로 장치 KR900000105B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59204451A JPS6182525A (ja) 1984-09-29 1984-09-29 半導体集積回路装置
JP59-204451 1984-09-29

Publications (2)

Publication Number Publication Date
KR860002866A true KR860002866A (ko) 1986-04-30
KR900000105B1 KR900000105B1 (ko) 1990-01-19

Family

ID=16490742

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850004137A KR900000105B1 (ko) 1984-09-29 1985-06-12 반도체 집적회로 장치

Country Status (5)

Country Link
US (1) US4661721A (ko)
EP (1) EP0181059B1 (ko)
JP (1) JPS6182525A (ko)
KR (1) KR900000105B1 (ko)
DE (1) DE3581754D1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100303533B1 (ko) * 1998-03-30 2001-11-22 윤종용 전자렌지

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EP0218121B1 (de) * 1985-09-25 1991-04-17 Siemens Aktiengesellschaft Netzwerk zur Verarbeitung von Daten grosser Bitbreite mit einem Sender und einer Vielzahl von Empfängern
US4769558A (en) * 1986-07-09 1988-09-06 Eta Systems, Inc. Integrated circuit clock bus layout delay system
JPS63238714A (ja) * 1986-11-26 1988-10-04 Hitachi Ltd クロック供給システム
US5133064A (en) * 1987-04-27 1992-07-21 Hitachi, Ltd. Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
US5012427A (en) * 1988-01-30 1991-04-30 Kabushiki Kaisha Toshiba Semiconductor integrated circuit and method of manufacturing the same
JPH077809B2 (ja) * 1988-03-29 1995-01-30 株式会社東芝 集積回路
JPH0736422B2 (ja) * 1988-08-19 1995-04-19 株式会社東芝 クロック供給回路
US4860322A (en) * 1988-10-05 1989-08-22 Intel Corporation Anti-clock skew distribution apparatus
JPH02205908A (ja) * 1989-02-03 1990-08-15 Nec Corp データ処理装置
JPH0824143B2 (ja) * 1989-02-08 1996-03-06 株式会社東芝 集積回路の配置配線方式
JPH07101788B2 (ja) * 1989-06-16 1995-11-01 富士通株式会社 電波放射抑制機能を有する二重化装置
KR940010542B1 (ko) * 1989-09-22 1994-10-24 가부시키가이샤 도시바 반도체 집적회로장치
US5304826A (en) * 1989-09-22 1994-04-19 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
US5032743A (en) * 1990-05-09 1991-07-16 National Semiconductor Corporation Skew clamp
US5396129A (en) * 1992-05-25 1995-03-07 Matsushita Electronics Corporation Semiconductor integrated circuit apparatus comprising clock signal line formed in a ring shape
US5444407A (en) * 1992-12-28 1995-08-22 Advanced Micro Devices, Inc. Microprocessor with distributed clock generators
US5438297A (en) * 1992-12-30 1995-08-01 Intel Corporation Electrical trace having a closed loop configuration
DE4447848B4 (de) * 1993-06-30 2005-10-27 Intel Corporation, Santa Clara Taktverteilungssystem für einen Mikroprozessor
DE4422456B4 (de) * 1993-06-30 2004-07-01 Intel Corporation, Santa Clara Taktverteilungssystem für einen Mikroprozessor
JP3112784B2 (ja) * 1993-09-24 2000-11-27 日本電気株式会社 クロック信号分配回路
US5570053A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for averaging clock skewing in clock distribution network
US5570054A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for adaptive clock deskewing
JPH10242396A (ja) * 1997-03-03 1998-09-11 Mitsubishi Electric Corp クロックドライバ回路及び半導体集積回路装置
US6052012A (en) * 1998-06-29 2000-04-18 Cisco Technology, Inc. Method and apparatus for clock uncertainly minimization
US6513149B1 (en) 2000-03-31 2003-01-28 International Business Machines Corporation Routing balanced clock signals
DE102010048160A1 (de) * 2010-10-11 2012-04-12 Aaa Water Technologies Ag Mehrstufige Membrandestillationsvorrichtung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3104330A (en) * 1960-02-11 1963-09-17 Gen Electric Clock pulse distribution system for synchronously driving a plurality of flip-flops
US3479603A (en) * 1966-07-28 1969-11-18 Bell Telephone Labor Inc A plurality of sources connected in parallel to produce a timing pulse output while any source is operative
US3751591A (en) * 1972-06-20 1973-08-07 Ibm Zero skew clock distribution system
JPS55136726A (en) * 1979-04-11 1980-10-24 Nec Corp High voltage mos inverter and its drive method
JPS58166422A (ja) * 1982-03-29 1983-10-01 Fujitsu Ltd クロツク発生方式
US4504745A (en) * 1982-06-14 1985-03-12 Rockwell International Corporation Clocked tri-state driver circuit
JPS5924324A (ja) * 1982-07-30 1984-02-08 Nec Corp 集積回路装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100303533B1 (ko) * 1998-03-30 2001-11-22 윤종용 전자렌지

Also Published As

Publication number Publication date
DE3581754D1 (de) 1991-03-21
EP0181059A3 (en) 1987-11-25
KR900000105B1 (ko) 1990-01-19
EP0181059A2 (en) 1986-05-14
JPS6182525A (ja) 1986-04-26
US4661721A (en) 1987-04-28
EP0181059B1 (en) 1991-02-13

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