DE3581754D1 - Integrierte halbleiterschaltung fuer taktimpulsverteilung. - Google Patents

Integrierte halbleiterschaltung fuer taktimpulsverteilung.

Info

Publication number
DE3581754D1
DE3581754D1 DE8585305969T DE3581754T DE3581754D1 DE 3581754 D1 DE3581754 D1 DE 3581754D1 DE 8585305969 T DE8585305969 T DE 8585305969T DE 3581754 T DE3581754 T DE 3581754T DE 3581754 D1 DE3581754 D1 DE 3581754D1
Authority
DE
Germany
Prior art keywords
clock pulse
semiconductor circuit
integrated semiconductor
pulse distribution
distribution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585305969T
Other languages
English (en)
Inventor
Yukihiro C O Patent Div Ushiku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3581754D1 publication Critical patent/DE3581754D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
DE8585305969T 1984-09-29 1985-08-22 Integrierte halbleiterschaltung fuer taktimpulsverteilung. Expired - Lifetime DE3581754D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59204451A JPS6182525A (ja) 1984-09-29 1984-09-29 半導体集積回路装置

Publications (1)

Publication Number Publication Date
DE3581754D1 true DE3581754D1 (de) 1991-03-21

Family

ID=16490742

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585305969T Expired - Lifetime DE3581754D1 (de) 1984-09-29 1985-08-22 Integrierte halbleiterschaltung fuer taktimpulsverteilung.

Country Status (5)

Country Link
US (1) US4661721A (de)
EP (1) EP0181059B1 (de)
JP (1) JPS6182525A (de)
KR (1) KR900000105B1 (de)
DE (1) DE3581754D1 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE62774T1 (de) * 1985-09-25 1991-05-15 Siemens Ag Netzwerk zur verarbeitung von daten grosser bitbreite mit einem sender und einer vielzahl von empfaengern.
US4769558A (en) * 1986-07-09 1988-09-06 Eta Systems, Inc. Integrated circuit clock bus layout delay system
JPS63238714A (ja) * 1986-11-26 1988-10-04 Hitachi Ltd クロック供給システム
US5133064A (en) * 1987-04-27 1992-07-21 Hitachi, Ltd. Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
US5012427A (en) * 1988-01-30 1991-04-30 Kabushiki Kaisha Toshiba Semiconductor integrated circuit and method of manufacturing the same
JPH077809B2 (ja) * 1988-03-29 1995-01-30 株式会社東芝 集積回路
JPH0736422B2 (ja) * 1988-08-19 1995-04-19 株式会社東芝 クロック供給回路
US4860322A (en) * 1988-10-05 1989-08-22 Intel Corporation Anti-clock skew distribution apparatus
JPH02205908A (ja) * 1989-02-03 1990-08-15 Nec Corp データ処理装置
JPH0824143B2 (ja) * 1989-02-08 1996-03-06 株式会社東芝 集積回路の配置配線方式
JPH07101788B2 (ja) * 1989-06-16 1995-11-01 富士通株式会社 電波放射抑制機能を有する二重化装置
DE69023728T2 (de) * 1989-09-22 1996-05-02 Toshiba Kawasaki Kk Integrierte Halbleiterschaltungsanordnung.
US5304826A (en) * 1989-09-22 1994-04-19 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device
US5032743A (en) * 1990-05-09 1991-07-16 National Semiconductor Corporation Skew clamp
US5396129A (en) * 1992-05-25 1995-03-07 Matsushita Electronics Corporation Semiconductor integrated circuit apparatus comprising clock signal line formed in a ring shape
US5444407A (en) * 1992-12-28 1995-08-22 Advanced Micro Devices, Inc. Microprocessor with distributed clock generators
US5438297A (en) * 1992-12-30 1995-08-01 Intel Corporation Electrical trace having a closed loop configuration
DE4447848B4 (de) * 1993-06-30 2005-10-27 Intel Corporation, Santa Clara Taktverteilungssystem für einen Mikroprozessor
DE4422456B4 (de) * 1993-06-30 2004-07-01 Intel Corporation, Santa Clara Taktverteilungssystem für einen Mikroprozessor
JP3112784B2 (ja) * 1993-09-24 2000-11-27 日本電気株式会社 クロック信号分配回路
US5570053A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for averaging clock skewing in clock distribution network
US5570054A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for adaptive clock deskewing
JPH10242396A (ja) * 1997-03-03 1998-09-11 Mitsubishi Electric Corp クロックドライバ回路及び半導体集積回路装置
KR100303533B1 (ko) * 1998-03-30 2001-11-22 윤종용 전자렌지
US6052012A (en) * 1998-06-29 2000-04-18 Cisco Technology, Inc. Method and apparatus for clock uncertainly minimization
US6513149B1 (en) 2000-03-31 2003-01-28 International Business Machines Corporation Routing balanced clock signals
DE102010048160A1 (de) * 2010-10-11 2012-04-12 Aaa Water Technologies Ag Mehrstufige Membrandestillationsvorrichtung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3104330A (en) * 1960-02-11 1963-09-17 Gen Electric Clock pulse distribution system for synchronously driving a plurality of flip-flops
US3479603A (en) * 1966-07-28 1969-11-18 Bell Telephone Labor Inc A plurality of sources connected in parallel to produce a timing pulse output while any source is operative
US3751591A (en) * 1972-06-20 1973-08-07 Ibm Zero skew clock distribution system
JPS55136726A (en) * 1979-04-11 1980-10-24 Nec Corp High voltage mos inverter and its drive method
JPS58166422A (ja) * 1982-03-29 1983-10-01 Fujitsu Ltd クロツク発生方式
US4504745A (en) * 1982-06-14 1985-03-12 Rockwell International Corporation Clocked tri-state driver circuit
JPS5924324A (ja) * 1982-07-30 1984-02-08 Nec Corp 集積回路装置

Also Published As

Publication number Publication date
JPS6182525A (ja) 1986-04-26
EP0181059B1 (de) 1991-02-13
US4661721A (en) 1987-04-28
KR860002866A (ko) 1986-04-30
EP0181059A3 (en) 1987-11-25
KR900000105B1 (ko) 1990-01-19
EP0181059A2 (de) 1986-05-14

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Legal Events

Date Code Title Description
8363 Opposition against the patent
8331 Complete revocation