KR900701045A - 상보형 mos 회로기술을 이용한 래치업 방지회로를 가진 집적회로 - Google Patents

상보형 mos 회로기술을 이용한 래치업 방지회로를 가진 집적회로

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Publication number
KR900701045A
KR900701045A KR1019890701576A KR890701576A KR900701045A KR 900701045 A KR900701045 A KR 900701045A KR 1019890701576 A KR1019890701576 A KR 1019890701576A KR 890701576 A KR890701576 A KR 890701576A KR 900701045 A KR900701045 A KR 900701045A
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South Korea
Prior art keywords
doped
bypass transistor
terminal
semiconductor region
circuit
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KR1019890701576A
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English (en)
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KR0133204B1 (ko
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베르너 렉체크
볼프강 프리빌
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드로스트, 후흐스
지멘스 악티엔게젤샤프트
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Application filed by 드로스트, 후흐스, 지멘스 악티엔게젤샤프트 filed Critical 드로스트, 후흐스
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0921—Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)

Abstract

내용 없음

Description

상보형 MOS 회로기술을 이용한 래치업 방지회로를 가진 집적회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1도는 바이패스트랜지스터를 가진 출력단의 회로도,
제 2도는 요형반도체 구역이 고정전위와 접속되어 있는 CMOS 출력 트랜지스터를 가진 CMOS 출력단의 횡단면도,
제 3도는 다이오드 또는 부하소자로서 접속된 P채널 MOS 트랜지스터와 바이패스트랜지슬의 회로도,
제 4도는 요형 반도체 구역이 고정전위와 접속되어 있지 않은 바이패스트랜지스터 및 다이오드 또는 부하소자로서 접속된 P채널 MOS 트랜지스터의 횡단면도,
제 5도는 제 3 및 4도에 도시된 회로에 따른 바이패스트랜지스터 및 다이오드 또는 부하소자로서 접속된 P채널 MOS 트랜지스터의 실시예.

Claims (7)

  1. 제 1도 전형의, 도핑된 반도체기판(Psub)과 상기 도핑된 기판(Ssub) 내에 삽입된 요형의, 제 2도 전형 반도체 구역을 가지는, 상보형 MOS 회로기술을 이용한 "래치업" 방지회로를 가진 집적 회로에 있어서, "래치업" 방지회로는 바이패스트랜지스터(BT)를 포함하고, 바이패스트랜지스터의 게이트 단자 및 제 1 단자는 단자(KL)와 접속되며 바이패스트랜지스터의 제 2 단자는 "래치업" 방지회로의 출력(OUT)과 접속되는 것을 특징으로 하는 래치업 방지회로를 가진 집적 회로.
  2. 제 1항에 있어서, 바이패스트랜지스터(BT)는 P 채널 FET이고, 제 1도전형의, 도핑된 반도체 기판은 P도핑되며, 제 2도 전형의, 요형 반도체구역은 n도핑되고, 단자(KL) 및 제 2도 전형의 요형 반도체구역(Nw)은 공급전압(VDD)과 접속되는 것을 특징으로하는 래치업 방지회로를 가진 집적회로.
  3. 제 1항에 있어서, 바이패스트랜지스터는 n 채널 FET이고, 제 1도 전형의, 도핑된 반도체기판은 n 도핑되며, 제 2도 전형의, 요형 반도체구역은 P 도핑되고, 단자(KL) 및 제 2도 전형의 요형 반도체구역은 접지(Vss)와 접속되는 것을 특징으로 하는 래치업 방지회로를 가진 집적회로.
  4. 제 1항에 있어서, 바이패스트랜지스터(BT)는 P채널 FET이고, 제 1도 전형의, 도핑된 반도체기판은 P 도핑되며, 제 2도 전형의, 요형반도체구역은 n 도핑되고, 단자(KL) 및 제 2도 전형의, 요형반도체 구역은 가변전압에 접속되는 것을 특징으로 하는 래치업 방지회로를 가진 집적 회로.
  5. 제 1항에 있어서, 바이패스트랜지스터는 n 채널 FET이고, 제 1도 전형의, 도핑된 반도체기판은 n 도핑되며 제 2도 전형의 , 요형 반도체 구역은 n 도핑되고 단자(KL) 및 제 2도 전형의, 요형 반도체구역은 가변전압에 접속되는 것을 특징으로 하는 래치업 방지회로를 가진 집적회로.
  6. 제 1항 내지 5항 중 어느 한 항에 있어서, 바이패스트랜지스터(BT)의 제 2단자(P2)는 집적회로의 FET의 한 단자를 형성하는 반도체 구역으로 구현되는 것을 특징으로 하는 래치업 방지회로를 가진 집적회로.
  7. 제 1항 내지 6항 중 어느 한 항에 있어서, 바이패스트랜지스터의 제 1 단자는 제 1도 전형의, 스트립형 반도체구역(P1)으로 그리고 제 2단자는 스트립형 반도체구역(P1)을 둘러싸고 있는 제 1도 전형의 반도체구역(P2)으로 구현되고, 제 1도 전형의, 스트립형 반도체 구역(P1)과 제 1도 전형 반도체구역(P2) 사이에는 FET의 게이트 폭에 상응하는 간격이 있으며, 게이트 단자(G)는 바이패스 트랜지스터의 제 1 및 제 2 단자의 상부에 절연되어 배치되어 있는 게이트 물질로 구성되는 것을 특징으로 하는 래치업 방지회로를 가진 집적회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019890701576A 1888-10-24 1989-08-22 상보형 mos 회로기술을 이용한 래치업 방지회로를 가진 집적회로 KR0133204B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
ATPDE88/00651 1888-10-24
DE19873743930 DE3743930A1 (de) 1987-12-23 1987-12-23 Integrierte schaltung mit "latch-up"-schutzschaltung in komplementaerer mos-schaltungstechnik
DEP3743930.8 1987-12-23
DE3743930.8 1987-12-23
PCT/DE1988/000651 WO1989006048A1 (en) 1987-12-23 1988-10-24 Integrated circuit with anti ''latch-up'' circuit obtained using complementary mos circuit technology

Publications (2)

Publication Number Publication Date
KR900701045A true KR900701045A (ko) 1990-08-17
KR0133204B1 KR0133204B1 (ko) 1998-04-16

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Country Status (8)

Country Link
US (1) US5041894A (ko)
EP (1) EP0396553B1 (ko)
JP (1) JP3174043B2 (ko)
KR (1) KR0133204B1 (ko)
AT (1) ATE106609T1 (ko)
DE (2) DE3743930A1 (ko)
HK (1) HK59596A (ko)
WO (1) WO1989006048A1 (ko)

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KR100726092B1 (ko) * 2006-08-31 2007-06-08 동부일렉트로닉스 주식회사 반도체소자 및 그 제조방법

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Also Published As

Publication number Publication date
KR0133204B1 (ko) 1998-04-16
EP0396553A1 (de) 1990-11-14
DE3889921D1 (de) 1994-07-07
HK59596A (en) 1996-04-12
DE3743930A1 (de) 1989-07-06
JP3174043B2 (ja) 2001-06-11
EP0396553B1 (de) 1994-06-01
US5041894A (en) 1991-08-20
ATE106609T1 (de) 1994-06-15
WO1989006048A1 (en) 1989-06-29
JPH03501669A (ja) 1991-04-11

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