HK59596A - Integrated circuit with anti "latch-up" circuit obtained using complementary mos circuit technology - Google Patents

Integrated circuit with anti "latch-up" circuit obtained using complementary mos circuit technology

Info

Publication number
HK59596A
HK59596A HK59596A HK59596A HK59596A HK 59596 A HK59596 A HK 59596A HK 59596 A HK59596 A HK 59596A HK 59596 A HK59596 A HK 59596A HK 59596 A HK59596 A HK 59596A
Authority
HK
Hong Kong
Prior art keywords
pct
circuit
latch
output
bypass transistor
Prior art date
Application number
HK59596A
Other languages
English (en)
Inventor
Werner Reczek
Wolfgang Pribyl
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=6343498&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=HK59596(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of HK59596A publication Critical patent/HK59596A/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0921Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
  • Semiconductor Integrated Circuits (AREA)
HK59596A 1987-12-23 1996-04-03 Integrated circuit with anti "latch-up" circuit obtained using complementary mos circuit technology HK59596A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19873743930 DE3743930A1 (de) 1987-12-23 1987-12-23 Integrierte schaltung mit "latch-up"-schutzschaltung in komplementaerer mos-schaltungstechnik

Publications (1)

Publication Number Publication Date
HK59596A true HK59596A (en) 1996-04-12

Family

ID=6343498

Family Applications (1)

Application Number Title Priority Date Filing Date
HK59596A HK59596A (en) 1987-12-23 1996-04-03 Integrated circuit with anti "latch-up" circuit obtained using complementary mos circuit technology

Country Status (8)

Country Link
US (1) US5041894A (xx)
EP (1) EP0396553B1 (xx)
JP (1) JP3174043B2 (xx)
KR (1) KR0133204B1 (xx)
AT (1) ATE106609T1 (xx)
DE (2) DE3743930A1 (xx)
HK (1) HK59596A (xx)
WO (1) WO1989006048A1 (xx)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5055903A (en) * 1989-06-22 1991-10-08 Siemens Aktiengesellschaft Circuit for reducing the latch-up sensitivity of a cmos circuit
JP3184298B2 (ja) * 1992-05-28 2001-07-09 沖電気工業株式会社 Cmos出力回路
JP2822881B2 (ja) * 1994-03-30 1998-11-11 日本電気株式会社 半導体集積回路装置
KR0120565B1 (ko) * 1994-04-18 1997-10-30 김주용 래치-업을 방지한 씨모스형 데이타 출력버퍼
KR100211537B1 (ko) * 1995-11-13 1999-08-02 김영환 정전기 방지기능을 갖는 트랜지스터 및 그 제조방법과 이를 이용한 데이타 출력버퍼
DE19624474C2 (de) * 1996-06-19 1998-04-23 Sgs Thomson Microelectronics Monolithisch integrierte Mehrfachbetriebsartenschaltung
US6414360B1 (en) * 1998-06-09 2002-07-02 Aeroflex Utmc Microelectronic Systems, Inc. Method of programmability and an architecture for cold sparing of CMOS arrays
US5990523A (en) * 1999-05-06 1999-11-23 United Integrated Circuits Corp. Circuit structure which avoids latchup effect
KR100726092B1 (ko) * 2006-08-31 2007-06-08 동부일렉트로닉스 주식회사 반도체소자 및 그 제조방법
DE102009028049B3 (de) * 2009-07-28 2011-02-24 Infineon Technologies Ag Leistungshalbleiterbauelement mit Potenzialsonde, Leistungshalbleiteranordnung mit einem eine Potenzialsonde aufweisenden Leistungshalbleiterbauelement und Verfahren zum Betrieb eines Leistungshalbleiterbauelements mit einer Potenzialsonde
WO2017019064A1 (en) 2015-07-29 2017-02-02 Schober Robert C Complementary current field-effect transistor devices and amplifiers
US10514716B2 (en) 2015-07-30 2019-12-24 Circuit Seed, Llc Reference generator and current source transistor based on complementary current field-effect transistor devices
CN108141181A (zh) * 2015-07-30 2018-06-08 电路种子有限责任公司 多级式且前馈补偿的互补电流场效应晶体管放大器
CN108141180A (zh) 2015-07-30 2018-06-08 电路种子有限责任公司 基于互补电流场效应晶体管装置的低噪声跨阻抗放大器
CN108140613B (zh) 2015-12-14 2020-07-28 电路种子有限责任公司 过饱和电流场效应晶体管和跨阻抗mos装置

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5632758A (en) * 1979-08-27 1981-04-02 Fujitsu Ltd Substrate bias generating circuit
JPS5758351A (en) * 1980-09-24 1982-04-08 Toshiba Corp Substrate biasing device
US4559548A (en) * 1981-04-07 1985-12-17 Tokyo Shibaura Denki Kabushiki Kaisha CMOS Charge pump free of parasitic injection
JPS58225664A (ja) * 1982-06-22 1983-12-27 Sanyo Electric Co Ltd C−mos集積回路
US4485433A (en) * 1982-12-22 1984-11-27 Ncr Corporation Integrated circuit dual polarity high voltage multiplier for extended operating temperature range
JPS59198749A (ja) * 1983-04-25 1984-11-10 Mitsubishi Electric Corp 相補形電界効果トランジスタ
EP0166386A3 (de) * 1984-06-29 1987-08-05 Siemens Aktiengesellschaft Integrierte Schaltung in komplementärer Schaltungstechnik
US4670669A (en) * 1984-08-13 1987-06-02 International Business Machines Corporation Charge pumping structure for a substrate bias generator
JPS61115349A (ja) * 1984-11-09 1986-06-02 Mitsubishi Electric Corp 半導体集積回路装置
JPS61154157A (ja) * 1984-12-27 1986-07-12 Nec Corp 半導体集積回路
US4670668A (en) * 1985-05-09 1987-06-02 Advanced Micro Devices, Inc. Substrate bias generator with power supply control means to sequence application of bias and power to prevent CMOS SCR latch-up
JPS6240697A (ja) * 1985-08-16 1987-02-21 Fujitsu Ltd 半導体記憶装置
JPS6266656A (ja) * 1985-09-19 1987-03-26 Toshiba Corp 基板電位生成回路
JPS62152155A (ja) * 1985-12-25 1987-07-07 Seiko Epson Corp C−mos lsiの保護回路
US4791316A (en) * 1986-09-26 1988-12-13 Siemens Aktiengesellschaft Latch-up protection circuit for integrated circuits using complementary MOS circuit technology
KR960012249B1 (ko) * 1987-01-12 1996-09-18 지멘스 악티엔게젤샤프트 래치업 방지회로를 가진 cmos 집적회로장치
US4991317A (en) * 1987-05-26 1991-02-12 Nikola Lakic Inflatable sole lining for shoes and boots

Also Published As

Publication number Publication date
JPH03501669A (ja) 1991-04-11
JP3174043B2 (ja) 2001-06-11
ATE106609T1 (de) 1994-06-15
US5041894A (en) 1991-08-20
EP0396553A1 (de) 1990-11-14
WO1989006048A1 (en) 1989-06-29
KR900701045A (ko) 1990-08-17
EP0396553B1 (de) 1994-06-01
KR0133204B1 (ko) 1998-04-16
DE3889921D1 (de) 1994-07-07
DE3743930A1 (de) 1989-07-06

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)