JPS6484917A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To obtain a semiconductor integrated circuit having a high speed property, and also, a low power consumption property by providing first and second bipolar transistors and two field effect transistors for forming current paths to the respective bases. CONSTITUTION:When an input 100 is at an L level, a PMOS 11 and an NMOS 21 become ON and OFF, respectively. Accordingly, a current supplied through the MOS 11 is obstructed by the MOS 21, therefore, said current does not flow to other part than a base B of an NPN 31 and the base potential rises, and the NPN 31 turns on. Accordingly, its emitter current charges a load connected to an output terminal 101, and an output 101 goes to quickly an H level. When the input 100 is at an H level, the MOS 11 and the MOS 21 are turned on, respectively. In such a case, an accumulated charge being a parasitic capacity accumulated in the base B of the NPN 31 and the MOS 11 is sampled to a drain D of the MOS 21, and the NPN 31 is turned off quickly. Also, as for the MOS 21, a current of the accumulated charge is supplied since the drain D and the source S are short-circuited, and the NPN 32 is turned on quickly. Accordingly, the output 101 goes to quickly to L level.