JPS57180159A - Mos integrated circuit device - Google Patents
Mos integrated circuit deviceInfo
- Publication number
- JPS57180159A JPS57180159A JP56064029A JP6402981A JPS57180159A JP S57180159 A JPS57180159 A JP S57180159A JP 56064029 A JP56064029 A JP 56064029A JP 6402981 A JP6402981 A JP 6402981A JP S57180159 A JPS57180159 A JP S57180159A
- Authority
- JP
- Japan
- Prior art keywords
- regions
- type
- transistors
- logic circuit
- external electric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 abstract 3
- 230000000295 complement effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0927—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To reduce operating voltage of logic circuit regions and to enhance operating speed of an MOS integrated circuit device by a method wherein the logic circuit regions consisting of plural number of MOS transistors, and reversely conductive regions having the P-N junctions are provided in a uniconductive Si substrate, and external electric power source potential is applied to the logic circuit regions through the P-N junctions. CONSTITUTION:The plural number of complementary logic circuit regions 12 consisting of P type MOS transistors Q1 and N type MOS transistors Q2 are provided in the N type Si substrate 1, and application of external electric power source potential VDD to P<+> type source regions 2 constituting the transistors Q1 thereof is performed through the P-N junction parts 8 consisting of P type regions 6, N type regions 7 formed in the same substrate 1. By this consitution, the transistors Q1 are constituted of the P<+> type source regions 2 and drain regions 5, and the transistors Q2 are constituted of P-well regions 4 and N<+> type source regions 3 inside thereof, etc. Accordingly external electric potential VDD is reduced through the junction parts 8, and reduced potential is applied to the circuit regions 12 to avoid variation of threshold voltage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56064029A JPS57180159A (en) | 1981-04-30 | 1981-04-30 | Mos integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56064029A JPS57180159A (en) | 1981-04-30 | 1981-04-30 | Mos integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57180159A true JPS57180159A (en) | 1982-11-06 |
Family
ID=13246289
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56064029A Pending JPS57180159A (en) | 1981-04-30 | 1981-04-30 | Mos integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57180159A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0084000A2 (en) * | 1982-01-11 | 1983-07-20 | FAIRCHILD CAMERA & INSTRUMENT CORPORATION | CMOS device |
EP0126184A2 (en) * | 1982-12-23 | 1984-11-28 | Motorola, Inc. | Input protection circuit and bias method for scaled CMOS devices |
JPH03116864A (en) * | 1989-09-29 | 1991-05-17 | Nec Corp | Cmos semiconductor integrated circuit device |
-
1981
- 1981-04-30 JP JP56064029A patent/JPS57180159A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0084000A2 (en) * | 1982-01-11 | 1983-07-20 | FAIRCHILD CAMERA & INSTRUMENT CORPORATION | CMOS device |
EP0084000A3 (en) * | 1982-01-11 | 1985-07-10 | FAIRCHILD CAMERA & INSTRUMENT CORPORATION | Cmos device |
EP0126184A2 (en) * | 1982-12-23 | 1984-11-28 | Motorola, Inc. | Input protection circuit and bias method for scaled CMOS devices |
JPH03116864A (en) * | 1989-09-29 | 1991-05-17 | Nec Corp | Cmos semiconductor integrated circuit device |
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