JPS57180159A - Mos integrated circuit device - Google Patents

Mos integrated circuit device

Info

Publication number
JPS57180159A
JPS57180159A JP56064029A JP6402981A JPS57180159A JP S57180159 A JPS57180159 A JP S57180159A JP 56064029 A JP56064029 A JP 56064029A JP 6402981 A JP6402981 A JP 6402981A JP S57180159 A JPS57180159 A JP S57180159A
Authority
JP
Japan
Prior art keywords
regions
type
transistors
logic circuit
external electric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56064029A
Other languages
Japanese (ja)
Inventor
Yukio Sato
Yutaka Kumagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP56064029A priority Critical patent/JPS57180159A/en
Publication of JPS57180159A publication Critical patent/JPS57180159A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0927Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce operating voltage of logic circuit regions and to enhance operating speed of an MOS integrated circuit device by a method wherein the logic circuit regions consisting of plural number of MOS transistors, and reversely conductive regions having the P-N junctions are provided in a uniconductive Si substrate, and external electric power source potential is applied to the logic circuit regions through the P-N junctions. CONSTITUTION:The plural number of complementary logic circuit regions 12 consisting of P type MOS transistors Q1 and N type MOS transistors Q2 are provided in the N type Si substrate 1, and application of external electric power source potential VDD to P<+> type source regions 2 constituting the transistors Q1 thereof is performed through the P-N junction parts 8 consisting of P type regions 6, N type regions 7 formed in the same substrate 1. By this consitution, the transistors Q1 are constituted of the P<+> type source regions 2 and drain regions 5, and the transistors Q2 are constituted of P-well regions 4 and N<+> type source regions 3 inside thereof, etc. Accordingly external electric potential VDD is reduced through the junction parts 8, and reduced potential is applied to the circuit regions 12 to avoid variation of threshold voltage.
JP56064029A 1981-04-30 1981-04-30 Mos integrated circuit device Pending JPS57180159A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56064029A JPS57180159A (en) 1981-04-30 1981-04-30 Mos integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56064029A JPS57180159A (en) 1981-04-30 1981-04-30 Mos integrated circuit device

Publications (1)

Publication Number Publication Date
JPS57180159A true JPS57180159A (en) 1982-11-06

Family

ID=13246289

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56064029A Pending JPS57180159A (en) 1981-04-30 1981-04-30 Mos integrated circuit device

Country Status (1)

Country Link
JP (1) JPS57180159A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0084000A2 (en) * 1982-01-11 1983-07-20 FAIRCHILD CAMERA &amp; INSTRUMENT CORPORATION CMOS device
EP0126184A2 (en) * 1982-12-23 1984-11-28 Motorola, Inc. Input protection circuit and bias method for scaled CMOS devices
JPH03116864A (en) * 1989-09-29 1991-05-17 Nec Corp Cmos semiconductor integrated circuit device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0084000A2 (en) * 1982-01-11 1983-07-20 FAIRCHILD CAMERA &amp; INSTRUMENT CORPORATION CMOS device
EP0084000A3 (en) * 1982-01-11 1985-07-10 FAIRCHILD CAMERA &amp; INSTRUMENT CORPORATION Cmos device
EP0126184A2 (en) * 1982-12-23 1984-11-28 Motorola, Inc. Input protection circuit and bias method for scaled CMOS devices
JPH03116864A (en) * 1989-09-29 1991-05-17 Nec Corp Cmos semiconductor integrated circuit device

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