JPS5482178A - Electrostatic inductive intergrated circuit device - Google Patents

Electrostatic inductive intergrated circuit device

Info

Publication number
JPS5482178A
JPS5482178A JP15005577A JP15005577A JPS5482178A JP S5482178 A JPS5482178 A JP S5482178A JP 15005577 A JP15005577 A JP 15005577A JP 15005577 A JP15005577 A JP 15005577A JP S5482178 A JPS5482178 A JP S5482178A
Authority
JP
Japan
Prior art keywords
region
terminal
plus
type
attached
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15005577A
Other languages
Japanese (ja)
Other versions
JPS5733874B2 (en
Inventor
Junichi Nishizawa
Teruo Noguchi
Yasutaka Horiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Semiconductor Research Foundation
Original Assignee
Mitsubishi Electric Corp
Semiconductor Research Foundation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp, Semiconductor Research Foundation filed Critical Mitsubishi Electric Corp
Priority to JP15005577A priority Critical patent/JPS5482178A/en
Publication of JPS5482178A publication Critical patent/JPS5482178A/en
Publication of JPS5733874B2 publication Critical patent/JPS5733874B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0225—Charge injection in static induction transistor logic structures [SITL]

Abstract

PURPOSE:To give versatility to the logic function by adding the NOR logic newly to the AND and NOT logics which are all provided on the same semiconductor substrate forming the electrostatic inductive transistor logic. CONSTITUTION:N-type layer 12 is epitaxial-grown on N<+>-type semiconductor sub- strate 11, and then P-type region 13a and 13b to become injectors later, divided P-type gate region 13c and 13d plus N<+>-type drain region 14 positioning the above mentioned regions are formed through diffusion. Injector terminal IS is attached to region 13a and 13b each; input terminal G1 and G2 are attached to region 13c and 13d; and output terminal D is attached to region 14 respectively. And a lateral PNP transistor is constituted with region 13a and 13c, layer 12, region 13d and 13b plus layer 12 to be used for the contant current source. Furthermore, the switching element featuring the similar function to FET is formed with region 14 plus divided region 13c and 13d. Thus, the two-input NOR function can be obtained at the swiching element with terminal G1 and G2 used as the input terminals plus terminal D used as the output terminal restpectively.
JP15005577A 1977-12-14 1977-12-14 Electrostatic inductive intergrated circuit device Granted JPS5482178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15005577A JPS5482178A (en) 1977-12-14 1977-12-14 Electrostatic inductive intergrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15005577A JPS5482178A (en) 1977-12-14 1977-12-14 Electrostatic inductive intergrated circuit device

Publications (2)

Publication Number Publication Date
JPS5482178A true JPS5482178A (en) 1979-06-30
JPS5733874B2 JPS5733874B2 (en) 1982-07-20

Family

ID=15488512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15005577A Granted JPS5482178A (en) 1977-12-14 1977-12-14 Electrostatic inductive intergrated circuit device

Country Status (1)

Country Link
JP (1) JPS5482178A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56500991A (en) * 1979-08-10 1981-07-16
JPS56158469A (en) * 1980-05-10 1981-12-07 Nippon Telegr & Teleph Corp <Ntt> Semiconductor logic device
JPS57181168A (en) * 1981-05-01 1982-11-08 Nippon Telegr & Teleph Corp <Ntt> Junction type field effect logical circuit element
US5032538A (en) * 1979-08-10 1991-07-16 Massachusetts Institute Of Technology Semiconductor embedded layer technology utilizing selective epitaxial growth methods

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS545681A (en) * 1977-06-15 1979-01-17 Mitsubishi Electric Corp Semiconductor memory cell

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS545681A (en) * 1977-06-15 1979-01-17 Mitsubishi Electric Corp Semiconductor memory cell

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56500991A (en) * 1979-08-10 1981-07-16
US5032538A (en) * 1979-08-10 1991-07-16 Massachusetts Institute Of Technology Semiconductor embedded layer technology utilizing selective epitaxial growth methods
JPS56158469A (en) * 1980-05-10 1981-12-07 Nippon Telegr & Teleph Corp <Ntt> Semiconductor logic device
JPS57181168A (en) * 1981-05-01 1982-11-08 Nippon Telegr & Teleph Corp <Ntt> Junction type field effect logical circuit element

Also Published As

Publication number Publication date
JPS5733874B2 (en) 1982-07-20

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