JPS54132179A - Complementary insulating gate field effect semiconductor device - Google Patents

Complementary insulating gate field effect semiconductor device

Info

Publication number
JPS54132179A
JPS54132179A JP4097978A JP4097978A JPS54132179A JP S54132179 A JPS54132179 A JP S54132179A JP 4097978 A JP4097978 A JP 4097978A JP 4097978 A JP4097978 A JP 4097978A JP S54132179 A JPS54132179 A JP S54132179A
Authority
JP
Japan
Prior art keywords
region
type
substrate
diffusion
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4097978A
Other languages
Japanese (ja)
Other versions
JPS6237537B2 (en
Inventor
Moichi Matsukuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4097978A priority Critical patent/JPS54132179A/en
Publication of JPS54132179A publication Critical patent/JPS54132179A/en
Publication of JPS6237537B2 publication Critical patent/JPS6237537B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0927Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To increase the circuit density by forming the uni-conducting guard region between the reverse conducting IGFET and the uni-conducting IGFET provided within the same semiconductor substrate and then setting the guard region to the same potential as the substrate. CONSTITUTION:P-type well region 12 is formed by diffusion on N-type Si substrate 11, and then N<+>-type source and drain region 13 and 14 are provided within region 12. Thus, N-channel transistor Q1 is obtained. Then N+-type region 15 is formed enclosing transistor Q1 and with contact to substrate 11, and diffusion region 15' to be the guard ring is formed within region 15 to prevent the parasitic current. At the same time, P<+>-type source and drain regions 16 and 17 are formed by diffusion within substrate 11 and being adjacent to Q1 to obtain P-channel transistor Q2 along with N<+>-type guard ring 18 provided adjacently to region 16. Then gate G1 and G2 are provided to transistor Q1 and Q2 respectively, which are connected in common to obtain input IN. The common connection is also given to region 14 and 17 to obtain output OUT, and regions 15, 16 and 18 are connected in common to be then connected to power source VDD.
JP4097978A 1978-04-06 1978-04-06 Complementary insulating gate field effect semiconductor device Granted JPS54132179A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4097978A JPS54132179A (en) 1978-04-06 1978-04-06 Complementary insulating gate field effect semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4097978A JPS54132179A (en) 1978-04-06 1978-04-06 Complementary insulating gate field effect semiconductor device

Publications (2)

Publication Number Publication Date
JPS54132179A true JPS54132179A (en) 1979-10-13
JPS6237537B2 JPS6237537B2 (en) 1987-08-13

Family

ID=12595549

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4097978A Granted JPS54132179A (en) 1978-04-06 1978-04-06 Complementary insulating gate field effect semiconductor device

Country Status (1)

Country Link
JP (1) JPS54132179A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1984001241A1 (en) * 1982-09-20 1984-03-29 Semi Processes Inc Cmos integrated circuit with guard bands for latch-up protection
US4805008A (en) * 1986-06-23 1989-02-14 Nissan Motor Co., Ltd. Semiconductor device having MOSFET and deep polycrystalline silicon region

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1984001241A1 (en) * 1982-09-20 1984-03-29 Semi Processes Inc Cmos integrated circuit with guard bands for latch-up protection
US4805008A (en) * 1986-06-23 1989-02-14 Nissan Motor Co., Ltd. Semiconductor device having MOSFET and deep polycrystalline silicon region

Also Published As

Publication number Publication date
JPS6237537B2 (en) 1987-08-13

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