JPS553602A - Negative resistance device - Google Patents
Negative resistance deviceInfo
- Publication number
- JPS553602A JPS553602A JP7411178A JP7411178A JPS553602A JP S553602 A JPS553602 A JP S553602A JP 7411178 A JP7411178 A JP 7411178A JP 7411178 A JP7411178 A JP 7411178A JP S553602 A JPS553602 A JP S553602A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- transistor
- source
- gate
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Networks Using Active Elements (AREA)
Abstract
PURPOSE: To reduce operating currents by utilizing substrate biasing effect that is obtanied through a source-to-source connection as well as a gate-to-gate connection of respective dual channel MOS transistors of N and P and also an interconnection between the drain of one transistor and the substrate of the other transistor.
CONSTITUTION: The device is composed of dual channel MOS transistors Q1 and Q2 of N and P having a shallow drain region D, and a source region S and a gate electrode G of one tsansistor is coupled to those of the other transistor, respectively. In addition, the drain region D of one of them is connected to the substrate of the other, and the drain regions D of the transistors Q1 and Q2 are connected to an input terminal K and an earthed output point A, respectively. In these configuration, both the Q1 and Q2 will be conducted when the potential at P is low, and then returned to its non-conductive state due to substrate bias effected when the potential becomes high. Therefore, the device can operate with a small current of the order ranging from mA. to μA.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7411178A JPS553602A (en) | 1978-06-21 | 1978-06-21 | Negative resistance device |
US06/254,117 US4384300A (en) | 1978-06-21 | 1981-04-14 | Negative resistance device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7411178A JPS553602A (en) | 1978-06-21 | 1978-06-21 | Negative resistance device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS553602A true JPS553602A (en) | 1980-01-11 |
Family
ID=13537752
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7411178A Pending JPS553602A (en) | 1978-06-21 | 1978-06-21 | Negative resistance device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS553602A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4547790A (en) * | 1980-05-20 | 1985-10-15 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor device having contacting but electrically isolated regions of opposite conductivity types |
JPH0730130A (en) * | 1993-07-14 | 1995-01-31 | Nec Corp | Differentiated negative resistance diode and static memory |
JPH07113510A (en) * | 1993-10-19 | 1995-05-02 | Fuji Kensetsu Kogyo Kk | Cremating furnace |
-
1978
- 1978-06-21 JP JP7411178A patent/JPS553602A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4547790A (en) * | 1980-05-20 | 1985-10-15 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor device having contacting but electrically isolated regions of opposite conductivity types |
JPH0730130A (en) * | 1993-07-14 | 1995-01-31 | Nec Corp | Differentiated negative resistance diode and static memory |
JPH07113510A (en) * | 1993-10-19 | 1995-05-02 | Fuji Kensetsu Kogyo Kk | Cremating furnace |
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