JPS5482179A - Electrostatic inductive integrated circuit device - Google Patents

Electrostatic inductive integrated circuit device

Info

Publication number
JPS5482179A
JPS5482179A JP15005677A JP15005677A JPS5482179A JP S5482179 A JPS5482179 A JP S5482179A JP 15005677 A JP15005677 A JP 15005677A JP 15005677 A JP15005677 A JP 15005677A JP S5482179 A JPS5482179 A JP S5482179A
Authority
JP
Japan
Prior art keywords
regions
logic
type
layer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15005677A
Other languages
Japanese (ja)
Other versions
JPS5620707B2 (en
Inventor
Junichi Nishizawa
Teruo Noguchi
Yasutaka Horiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Semiconductor Research Foundation
Original Assignee
Mitsubishi Electric Corp
Semiconductor Research Foundation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp, Semiconductor Research Foundation filed Critical Mitsubishi Electric Corp
Priority to JP15005677A priority Critical patent/JPS5482179A/en
Publication of JPS5482179A publication Critical patent/JPS5482179A/en
Publication of JPS5620707B2 publication Critical patent/JPS5620707B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0225—Charge injection in static induction transistor logic structures [SITL]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To give variety to a logical function by providing NOR logic, in addition to AND logic and NOT logic, to the same semiconductor susbtrate constituting electrostatic-induction transistor logic. CONSTITUTION:On P-type semiconductor substrate 11, N-type layer 12 is epitaxy- grown, where P-type gate regions 13a to 13d, and N<+>-type drain regions 14a to 14c are diffusion-formed. Next, gate regions 13a to 13d are fitted with input terminals G1 to G4, regions 14a to 14c are with output terminals D1 to D3, and the reverse surface of substrate 11 is with injector terminal Is. In the contituton like this, regions 13a to 13d are operated as a longitudinal PNP transistor together with substrate 11 and layer 12 respectively to be used as a constant current supply, and regions 14a to 14c are operated as a switching element, which operates similarly with a FET, together with regions 13a to 13d and layer 12 respecitvely. Then, respecitve outputs D1 to D3 are connected to constitute wired AND, and a four-input NoR circuit is formed between these and input terminals G1 to G4.
JP15005677A 1977-12-14 1977-12-14 Electrostatic inductive integrated circuit device Granted JPS5482179A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15005677A JPS5482179A (en) 1977-12-14 1977-12-14 Electrostatic inductive integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15005677A JPS5482179A (en) 1977-12-14 1977-12-14 Electrostatic inductive integrated circuit device

Publications (2)

Publication Number Publication Date
JPS5482179A true JPS5482179A (en) 1979-06-30
JPS5620707B2 JPS5620707B2 (en) 1981-05-15

Family

ID=15488534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15005677A Granted JPS5482179A (en) 1977-12-14 1977-12-14 Electrostatic inductive integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5482179A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57181168A (en) * 1981-05-01 1982-11-08 Nippon Telegr & Teleph Corp <Ntt> Junction type field effect logical circuit element
JPH04111931U (en) * 1991-03-15 1992-09-29 日信工業株式会社 Brake shoe for vehicle drum brakes

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57181168A (en) * 1981-05-01 1982-11-08 Nippon Telegr & Teleph Corp <Ntt> Junction type field effect logical circuit element
JPH04111931U (en) * 1991-03-15 1992-09-29 日信工業株式会社 Brake shoe for vehicle drum brakes

Also Published As

Publication number Publication date
JPS5620707B2 (en) 1981-05-15

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