KR920010462B1 - 다이내믹 ram 및 그 제조방법 - Google Patents
다이내믹 ram 및 그 제조방법 Download PDFInfo
- Publication number
- KR920010462B1 KR920010462B1 KR1019890014127A KR890014127A KR920010462B1 KR 920010462 B1 KR920010462 B1 KR 920010462B1 KR 1019890014127 A KR1019890014127 A KR 1019890014127A KR 890014127 A KR890014127 A KR 890014127A KR 920010462 B1 KR920010462 B1 KR 920010462B1
- Authority
- KR
- South Korea
- Prior art keywords
- electrode
- insulating film
- capacitor
- mos transistor
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
- H10B12/0385—Making a connection between the transistor and the capacitor, e.g. buried strap
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0147—Manufacturing their gate sidewall spacers
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63-243871 | 1988-09-30 | ||
| JP63243871A JPH0294471A (ja) | 1988-09-30 | 1988-09-30 | 半導体記憶装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR900005597A KR900005597A (ko) | 1990-04-14 |
| KR920010462B1 true KR920010462B1 (ko) | 1992-11-28 |
Family
ID=17110218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019890014127A Expired KR920010462B1 (ko) | 1988-09-30 | 1989-09-30 | 다이내믹 ram 및 그 제조방법 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US5138412A (enExample) |
| JP (1) | JPH0294471A (enExample) |
| KR (1) | KR920010462B1 (enExample) |
| DE (1) | DE3929129A1 (enExample) |
Families Citing this family (40)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02304968A (ja) * | 1989-05-19 | 1990-12-18 | Oki Electric Ind Co Ltd | 半導体記憶装置及びその製造方法 |
| KR940005729B1 (ko) * | 1989-06-13 | 1994-06-23 | 삼성전자 주식회사 | 디램셀의 제조방법 및 구조 |
| JP2524842B2 (ja) * | 1989-11-08 | 1996-08-14 | 三菱電機株式会社 | 半導体記憶装置 |
| KR930005741B1 (ko) * | 1990-11-01 | 1993-06-24 | 삼성전자 주식회사 | 터널구조의 디램 셀 및 그의 제조방법 |
| US5217914A (en) * | 1990-04-10 | 1993-06-08 | Matsushita Electric Industrial Co., Ltd. | Method for making semiconductor integration circuit with stacked capacitor cells |
| JPH03296262A (ja) * | 1990-04-13 | 1991-12-26 | Mitsubishi Electric Corp | 半導体メモリセル |
| EP0463741B1 (en) * | 1990-05-31 | 1997-07-23 | Canon Kabushiki Kaisha | Method of manufacturing a semiconductor memory device containing a capacitor |
| KR920009748B1 (ko) * | 1990-05-31 | 1992-10-22 | 삼성전자 주식회사 | 적층형 캐패시터셀의 구조 및 제조방법 |
| KR920001716A (ko) * | 1990-06-05 | 1992-01-30 | 김광호 | 디램셀의 적층형 캐패시터의 구조 및 제조방법 |
| KR930007194B1 (ko) * | 1990-08-14 | 1993-07-31 | 삼성전자 주식회사 | 반도체 장치 및 그 제조방법 |
| JP2599495B2 (ja) * | 1990-09-05 | 1997-04-09 | シャープ株式会社 | 半導体装置の製造方法 |
| JP2601022B2 (ja) * | 1990-11-30 | 1997-04-16 | 日本電気株式会社 | 半導体装置の製造方法 |
| JP3126739B2 (ja) * | 1990-12-06 | 2001-01-22 | 三菱電機株式会社 | 半導体記憶装置およびその製造方法 |
| US5108943A (en) * | 1991-01-02 | 1992-04-28 | Micron Technology, Inc. | Mushroom double stacked capacitor |
| US5202278A (en) * | 1991-09-10 | 1993-04-13 | Micron Technology, Inc. | Method of forming a capacitor in semiconductor wafer processing |
| JP2905642B2 (ja) * | 1992-01-18 | 1999-06-14 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| US5206183A (en) * | 1992-02-19 | 1993-04-27 | Micron Technology, Inc. | Method of forming a bit line over capacitor array of memory cells |
| DE4221433A1 (de) * | 1992-06-30 | 1994-01-05 | Siemens Ag | Halbleiterspeicheranordnung und Verfahren zu ihrer Herstellung |
| WO1994003898A1 (de) * | 1992-08-10 | 1994-02-17 | Siemens Aktiengesellschaft | Dram-zellenanordnung |
| US5864181A (en) | 1993-09-15 | 1999-01-26 | Micron Technology, Inc. | Bi-level digit line architecture for high density DRAMs |
| JPH07161832A (ja) * | 1993-12-08 | 1995-06-23 | Oki Electric Ind Co Ltd | 半導体記憶装置およびその製造方法 |
| JPH0888335A (ja) * | 1994-09-20 | 1996-04-02 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP2797994B2 (ja) * | 1995-02-17 | 1998-09-17 | ヤマハ株式会社 | 半導体装置 |
| US6043562A (en) | 1996-01-26 | 2000-03-28 | Micron Technology, Inc. | Digit line architecture for dynamic memory |
| FR2752336B1 (fr) * | 1996-08-09 | 1999-05-14 | Sgs Thomson Microelectronics | Condensateur dans un circuit integre |
| US5712813A (en) * | 1996-10-17 | 1998-01-27 | Zhang; Guobiao | Multi-level storage capacitor structure with improved memory density |
| JP3749776B2 (ja) * | 1997-02-28 | 2006-03-01 | 株式会社東芝 | 半導体装置 |
| US5851875A (en) * | 1997-07-14 | 1998-12-22 | Micron Technology, Inc. | Process for forming capacitor array structure for semiconductor devices |
| US5858829A (en) * | 1998-06-29 | 1999-01-12 | Vanguard International Semiconductor Corporation | Method for fabricating dynamic random access memory (DRAM) cells with minimum active cell areas using sidewall-spacer bit lines |
| US6303956B1 (en) | 1999-02-26 | 2001-10-16 | Micron Technology, Inc. | Conductive container structures having a dielectric cap |
| JP2001077327A (ja) | 1999-09-02 | 2001-03-23 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
| US6232168B1 (en) * | 2000-08-25 | 2001-05-15 | Micron Technology, Inc. | Memory circuitry and method of forming memory circuitry |
| US6376380B1 (en) | 2000-08-30 | 2002-04-23 | Micron Technology, Inc. | Method of forming memory circuitry and method of forming memory circuitry comprising a buried bit line array of memory cells |
| KR100389032B1 (ko) * | 2000-11-21 | 2003-06-25 | 삼성전자주식회사 | 강유전체 메모리 장치 및 그의 제조 방법 |
| US6706608B2 (en) * | 2001-02-28 | 2004-03-16 | Micron Technology, Inc. | Memory cell capacitors having an over/under configuration |
| US6423609B1 (en) | 2001-05-18 | 2002-07-23 | Micron Technology, Inc. | Methods of forming capacitors on a wafer, photolithographic methods of forming capacitors on a wafer, and semiconductor wafer |
| JP2003152105A (ja) * | 2001-11-15 | 2003-05-23 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| US6962840B2 (en) * | 2002-09-11 | 2005-11-08 | Samsung Electronics Co., Ltd. | Method of forming MOS transistor |
| JP3944455B2 (ja) * | 2003-01-31 | 2007-07-11 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
| US8084841B2 (en) * | 2009-05-05 | 2011-12-27 | Georgia Tech Research | Systems and methods for providing high-density capacitors |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL173572C (nl) * | 1976-02-12 | 1984-02-01 | Philips Nv | Halfgeleiderinrichting. |
| JPS568871A (en) * | 1979-07-04 | 1981-01-29 | Mitsubishi Electric Corp | Semiconductor memory device |
| JPS59104161A (ja) * | 1982-12-07 | 1984-06-15 | Nec Corp | 1トランジスタ型半導体記憶装置 |
| ATE41267T1 (de) * | 1984-04-25 | 1989-03-15 | Siemens Ag | Ein-transistor-speicherzelle fuer hochintegrierte dynamische halbleiterspeicher und verfahren zu ihrer herstellung. |
| EP0194682B1 (en) * | 1985-03-13 | 1991-01-23 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| JPH0682783B2 (ja) * | 1985-03-29 | 1994-10-19 | 三菱電機株式会社 | 容量およびその製造方法 |
| JPH0746700B2 (ja) * | 1986-02-18 | 1995-05-17 | 松下電子工業株式会社 | 1トランジスタ型dram装置 |
| JPS6395657A (ja) * | 1986-10-09 | 1988-04-26 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JPS63146461A (ja) * | 1986-12-10 | 1988-06-18 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP2659723B2 (ja) * | 1987-09-19 | 1997-09-30 | 株式会社日立製作所 | 半導体集積回路装置 |
| JPS6479963A (en) * | 1987-09-21 | 1989-03-24 | Otani Denki Kk | Tape traveling device |
| JP2755591B2 (ja) * | 1988-03-25 | 1998-05-20 | 株式会社東芝 | 半導体記憶装置 |
| US5053351A (en) * | 1991-03-19 | 1991-10-01 | Micron Technology, Inc. | Method of making stacked E-cell capacitor DRAM cell |
-
1988
- 1988-09-30 JP JP63243871A patent/JPH0294471A/ja active Pending
-
1989
- 1989-09-01 DE DE3929129A patent/DE3929129A1/de active Granted
- 1989-09-30 KR KR1019890014127A patent/KR920010462B1/ko not_active Expired
-
1991
- 1991-01-07 US US07/636,556 patent/US5138412A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| KR900005597A (ko) | 1990-04-14 |
| US5138412A (en) | 1992-08-11 |
| JPH0294471A (ja) | 1990-04-05 |
| DE3929129C2 (enExample) | 1992-02-20 |
| DE3929129A1 (de) | 1990-04-05 |
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