KR920006985A - 스테이틱램의 부하 조절회로 - Google Patents

스테이틱램의 부하 조절회로 Download PDF

Info

Publication number
KR920006985A
KR920006985A KR1019900014828A KR900014828A KR920006985A KR 920006985 A KR920006985 A KR 920006985A KR 1019900014828 A KR1019900014828 A KR 1019900014828A KR 900014828 A KR900014828 A KR 900014828A KR 920006985 A KR920006985 A KR 920006985A
Authority
KR
South Korea
Prior art keywords
power supply
supply voltage
voltage terminal
load element
high resistance
Prior art date
Application number
KR1019900014828A
Other languages
English (en)
Korean (ko)
Inventor
이수철
곽충근
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019900014828A priority Critical patent/KR920006985A/ko
Priority to DE4037207A priority patent/DE4037207A1/de
Priority to FR9014733A priority patent/FR2666913B1/fr
Priority to JP2323353A priority patent/JPH04132080A/ja
Priority to GB9111468A priority patent/GB2248131A/en
Priority to ITRM910698A priority patent/IT1250098B/it
Publication of KR920006985A publication Critical patent/KR920006985A/ko

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
KR1019900014828A 1990-09-19 1990-09-19 스테이틱램의 부하 조절회로 KR920006985A (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019900014828A KR920006985A (ko) 1990-09-19 1990-09-19 스테이틱램의 부하 조절회로
DE4037207A DE4037207A1 (de) 1990-09-19 1990-11-22 Stromeinstellschaltkreis fuer ein statisches ram
FR9014733A FR2666913B1 (fr) 1990-09-19 1990-11-26 Circuit de regulation de courant dans une ram statique.
JP2323353A JPH04132080A (ja) 1990-09-19 1990-11-28 スタテイツクｒａｍの電流調節回路
GB9111468A GB2248131A (en) 1990-09-19 1991-05-28 Current limiting circuit for a static ram
ITRM910698A IT1250098B (it) 1990-09-19 1991-09-18 Circuito di regolazione dell'assorbimento per memorie statiche del tipo ram.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900014828A KR920006985A (ko) 1990-09-19 1990-09-19 스테이틱램의 부하 조절회로

Publications (1)

Publication Number Publication Date
KR920006985A true KR920006985A (ko) 1992-04-28

Family

ID=19303774

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900014828A KR920006985A (ko) 1990-09-19 1990-09-19 스테이틱램의 부하 조절회로

Country Status (6)

Country Link
JP (1) JPH04132080A (it)
KR (1) KR920006985A (it)
DE (1) DE4037207A1 (it)
FR (1) FR2666913B1 (it)
GB (1) GB2248131A (it)
IT (1) IT1250098B (it)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001143476A (ja) 1999-11-15 2001-05-25 Mitsubishi Electric Corp スタティック型半導体記憶装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5828679B2 (ja) * 1979-04-25 1983-06-17 富士通株式会社 半導体記憶装置の書込み回路
DE3004565C2 (de) * 1980-02-07 1984-06-14 Siemens AG, 1000 Berlin und 8000 München Integrierte digitale Halbleiterschaltung
JPS57162181A (en) * 1981-03-31 1982-10-05 Fujitsu Ltd Semiconductor memory device
JPS58161195A (ja) * 1982-03-19 1983-09-24 Fujitsu Ltd スタテイツク型半導体記憶装置
JPS5922295A (ja) * 1982-06-30 1984-02-04 Fujitsu Ltd 半導体記憶装置
US4758994A (en) * 1986-01-17 1988-07-19 Texas Instruments Incorporated On chip voltage regulator for common collector matrix programmable memory array
US4857772A (en) * 1987-04-27 1989-08-15 Fairchild Semiconductor Corporation BIPMOS decoder circuit
US4874967A (en) * 1987-12-15 1989-10-17 Xicor, Inc. Low power voltage clamp circuit
KR910004736B1 (ko) * 1988-12-15 1991-07-10 삼성전자 주식회사 스테이틱 메모리장치의 전원전압 조절회로
JPH02177084A (ja) * 1988-12-27 1990-07-10 Mitsubishi Electric Corp 半導体集積回路

Also Published As

Publication number Publication date
ITRM910698A1 (it) 1993-03-18
GB9111468D0 (en) 1991-07-17
ITRM910698A0 (it) 1991-09-18
GB2248131A (en) 1992-03-25
FR2666913A1 (fr) 1992-03-20
JPH04132080A (ja) 1992-05-06
DE4037207A1 (de) 1992-04-02
IT1250098B (it) 1995-03-30
DE4037207C2 (it) 1993-08-19
FR2666913B1 (fr) 1993-12-10

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Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
SUBM Surrender of laid-open application requested