KR920006985A - Static load control circuit - Google Patents

Static load control circuit Download PDF

Info

Publication number
KR920006985A
KR920006985A KR1019900014828A KR900014828A KR920006985A KR 920006985 A KR920006985 A KR 920006985A KR 1019900014828 A KR1019900014828 A KR 1019900014828A KR 900014828 A KR900014828 A KR 900014828A KR 920006985 A KR920006985 A KR 920006985A
Authority
KR
South Korea
Prior art keywords
power supply
supply voltage
voltage terminal
load element
high resistance
Prior art date
Application number
KR1019900014828A
Other languages
Korean (ko)
Inventor
이수철
곽충근
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019900014828A priority Critical patent/KR920006985A/en
Priority to DE4037207A priority patent/DE4037207A1/en
Priority to FR9014733A priority patent/FR2666913B1/en
Priority to JP2323353A priority patent/JPH04132080A/en
Priority to GB9111468A priority patent/GB2248131A/en
Priority to ITRM910698A priority patent/IT1250098B/en
Publication of KR920006985A publication Critical patent/KR920006985A/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)

Abstract

내용 없음No content

Description

스테이틱램의 부하 조절회로Static load control circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도는 본 발명에 따른 메모리셀어레이의 구성도.3 is a block diagram of a memory cell array according to the present invention.

제4도는 본 발명에 따른 부하 조절 회로도.4 is a load regulation circuit diagram according to the present invention.

Claims (4)

전원전압과 접속된 고저항을 부하소자로 사용하는 다수개의 셀들을 구비하는 스테이틱램에 있어서, 상기 전원전압단과 접지전압단 사이에 직렬연결된 전압 강하수단 및 풀다운 저항과, 상기 전압강하수단 및 풀다운 저항 사이에 위치한 노드와, 상기 노드에 게이트가 연결되고 상기 고저항과 전원전압단 사이에 채널이 연결된 절연게이트 전계효과 트랜지스터로 구성된 전류조절회로가 상기 전원전압단과 부하소자 사이에 연결되어 있음을 특징으로 하는 스테이틱 램의 부하 조절회로.A static ram having a plurality of cells using a high resistance connected to a power supply voltage as a load element, comprising: a voltage drop means and a pull-down resistor connected in series between the power supply voltage terminal and a ground voltage terminal, and the voltage drop means and a pull-down resistor; And a current regulation circuit composed of a node located between and a gate-connected node and an insulated gate field effect transistor having a channel connected between the high resistance and the power supply voltage terminal between the power supply voltage terminal and the load element. Static ram load control circuit. 제1항에 있어서, 상기 절연게이트 전계효과 트랜지스터가 피형 또는 엔형 모오스 트랜지스터임을 특징으로 하는 스테이틱 램의 전류 조절회로.The current control circuit of claim 1, wherein the insulated gate field effect transistor is a p-type or en-type MOS transistor. 스테이틱 램의 셀어레이에 있어서, 전원전압과 접속된 고저항을 부하소자로 사용하는 복수개의 메모리셀과, 상기 전원전압과 부하소자 사이에 연결된 전류 조절회로로 구성됨을 특징으로 하는 스테이틱 램의 셀어레어.A cell array of a static RAM, comprising: a plurality of memory cells using a high resistance connected to a power supply voltage as a load element, and a current regulation circuit connected between the power supply voltage and the load element. Celare. 제3항에 있어서, 상기 전류 조절회로가 상기 전원전압단과 접지전압단 사이에 직렬로 연결된 전압강하수단 및 풀다운 저항과, 상기 전압강하수단 및 풀다운 저항 사이에 위치한 노드와, 상기 노드에 게이트가 연결되고 상기 고저항의 부하소자와 전원전압단 사이에 채널이 연결된 피모오스 트랜지스터로 구성됨을 특징으로 하는 스테이틱 램의 셀 어레이.4. The power supply circuit of claim 3, wherein the current regulation circuit comprises a voltage drop means and a pull down resistor connected in series between the power supply voltage terminal and a ground voltage terminal, a node positioned between the voltage drop means and the pull down resistor, and a gate connected to the node. And a PMOS transistor having a channel connected between the high resistance load element and a power supply voltage terminal. ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019900014828A 1990-09-19 1990-09-19 Static load control circuit KR920006985A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019900014828A KR920006985A (en) 1990-09-19 1990-09-19 Static load control circuit
DE4037207A DE4037207A1 (en) 1990-09-19 1990-11-22 Current limiting circuit for static RAM
FR9014733A FR2666913B1 (en) 1990-09-19 1990-11-26 CURRENT REGULATION CIRCUIT IN A STATIC RAM.
JP2323353A JPH04132080A (en) 1990-09-19 1990-11-28 Electric current adjustment circuit for static ram
GB9111468A GB2248131A (en) 1990-09-19 1991-05-28 Current limiting circuit for a static ram
ITRM910698A IT1250098B (en) 1990-09-19 1991-09-18 RAM ABSORPTION REGULATION CIRCUIT FOR STATIC MEMORIES OF THE RAM TYPE.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900014828A KR920006985A (en) 1990-09-19 1990-09-19 Static load control circuit

Publications (1)

Publication Number Publication Date
KR920006985A true KR920006985A (en) 1992-04-28

Family

ID=19303774

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900014828A KR920006985A (en) 1990-09-19 1990-09-19 Static load control circuit

Country Status (6)

Country Link
JP (1) JPH04132080A (en)
KR (1) KR920006985A (en)
DE (1) DE4037207A1 (en)
FR (1) FR2666913B1 (en)
GB (1) GB2248131A (en)
IT (1) IT1250098B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001143476A (en) 1999-11-15 2001-05-25 Mitsubishi Electric Corp Static semiconductor memory

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5828679B2 (en) * 1979-04-25 1983-06-17 富士通株式会社 Write circuit for semiconductor memory device
DE3004565C2 (en) * 1980-02-07 1984-06-14 Siemens AG, 1000 Berlin und 8000 München Integrated digital semiconductor circuit
JPS57162181A (en) * 1981-03-31 1982-10-05 Fujitsu Ltd Semiconductor memory device
JPS58161195A (en) * 1982-03-19 1983-09-24 Fujitsu Ltd Static type semiconductor storage device
JPS5922295A (en) * 1982-06-30 1984-02-04 Fujitsu Ltd Semiconductor storage device
US4758994A (en) * 1986-01-17 1988-07-19 Texas Instruments Incorporated On chip voltage regulator for common collector matrix programmable memory array
US4857772A (en) * 1987-04-27 1989-08-15 Fairchild Semiconductor Corporation BIPMOS decoder circuit
US4874967A (en) * 1987-12-15 1989-10-17 Xicor, Inc. Low power voltage clamp circuit
KR910004736B1 (en) * 1988-12-15 1991-07-10 삼성전자 주식회사 Power voltage control circuit of static memory device
JPH02177084A (en) * 1988-12-27 1990-07-10 Mitsubishi Electric Corp Semiconductor integrated circuit

Also Published As

Publication number Publication date
DE4037207C2 (en) 1993-08-19
GB2248131A (en) 1992-03-25
JPH04132080A (en) 1992-05-06
FR2666913A1 (en) 1992-03-20
GB9111468D0 (en) 1991-07-17
FR2666913B1 (en) 1993-12-10
ITRM910698A0 (en) 1991-09-18
DE4037207A1 (en) 1992-04-02
ITRM910698A1 (en) 1993-03-18
IT1250098B (en) 1995-03-30

Similar Documents

Publication Publication Date Title
KR860000659A (en) M0S Static RAM
KR900002463A (en) Semiconductor Cells for Neuural Networks
KR850006277A (en) How to increase input buffer and threshold voltage
KR870008243A (en) Reference voltage generation circuit
KR950001771A (en) Oscillation circuit for generating a clock signal having a period according to temperature and a semiconductor memory device including the same
KR960005602A (en) Semiconductor memory device that operates stably under low power supply with low power consumption
KR870005393A (en) Semiconductor memory
TW353806B (en) Intermediate voltage generator and nonvolatile semiconductor memory including the same
KR880001108A (en) CMOS input circuit
KR880001109A (en) Integrated Logic Circuit
JPS6435799A (en) Semiconductor integrated circuit
KR880004579A (en) CMOS integrated circuit device
KR860003712A (en) Logic Gate Circuit
KR850007170A (en) Power-On Detection Circuit
KR910010707A (en) Reference voltage generator
KR890011216A (en) Power resupply circuit of MOS integrated circuit
KR920006985A (en) Static load control circuit
KR960039604A (en) Clamp semiconductor circuit
KR910014942A (en) Output circuit
KR910001775A (en) Semiconductor memory
KR970077963A (en) Current transfer circuit and current voltage conversion circuit using the same
CA1312956C (en) Cmos digital to analog signal converter circuit
KR890012445A (en) Push-pull output circuit
KR960027331A (en) Buffer circuit and bias circuit
EP0081208A3 (en) Static memory cell

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
SUBM Surrender of laid-open application requested