KR890011027A - 반도체장치의 제조방법 - Google Patents

반도체장치의 제조방법 Download PDF

Info

Publication number
KR890011027A
KR890011027A KR1019880015348A KR880015348A KR890011027A KR 890011027 A KR890011027 A KR 890011027A KR 1019880015348 A KR1019880015348 A KR 1019880015348A KR 880015348 A KR880015348 A KR 880015348A KR 890011027 A KR890011027 A KR 890011027A
Authority
KR
South Korea
Prior art keywords
introducing
arsenic
manufacturing
semiconductor device
phosphorus
Prior art date
Application number
KR1019880015348A
Other languages
English (en)
Other versions
KR930000607B1 (ko
Inventor
히데키 시바타
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=17963929&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=KR890011027(A) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by 아오이 죠이치, 가부시키가이샤 도시바 filed Critical 아오이 죠이치
Publication of KR890011027A publication Critical patent/KR890011027A/ko
Application granted granted Critical
Publication of KR930000607B1 publication Critical patent/KR930000607B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
    • H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

내용 없음

Description

반도체장치의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도(a) 내지 제3도(c)는 본 발명의 1실시예에 관한 반도체장치의 제조방법을 도시해 놓은 공정단면도.
제4도는 본 발명 반도체장치의 제조방법에 따른 불순물 농도의 분포를 도시해 놓은 특성도.
제5도(a) 내지 제5도(d)는 본 발명의 다른 실시예에 관한 반도체장치의 제조방법을 도시해 놓은 공정단면도이다.

Claims (11)

  1. 실리콘기판의 미리 정해진 부분에 비소를 도입시키는 공정을 거친 다음, 상기 미리 정해진 부분에다 인을 도입시키는 공정을 거치도록 해서, 상기 비소와 인을 함유한 N형 불순물영역을 실리콘기판내에 형성시키도록 된 것을 특징으로 하는 반도체장치의 제조방법.
  2. 제 1 항에 있어서, 상기 비소를 도입시키는 공정이 이온주입으로 이루어지고, 상기 인을 도입시키는 공정이 확산으로 이루어진 것을 특징으로 하는 반도체장치의 제조방법.
  3. 제 1 항에 있어서, 상기 비소를 도입시키는 공정과 상기 인을 도입시키는 공정이 각각 미리 정해진 가속전압에서 이온주입으로 이루어지도록 된 것을 특징으로 하는 반도체 장치의 제조방법.
  4. 제 3 항에 있어서, 사기 비소 및 인이온주입의 미리 정해진 가속전압이, 비소농도의 피이크 깊이보다 인농도의 피이크깊이가 얕아지도록 선택되어진 것을 특징으로 하는 반도체장치의 제조방법.
  5. 실리콘기판(11)상에 절연막(13)을 형성시키는 공정과, 이 실리콘기판(11)의 미리 정해진 부분상에 상기 절연막(13)을 선택적으로 제거하는 공정, 상기 미리 정해진 부분에 비소를 도입시키는 공정, 상기 절연막(13)을 선택적으로 제거하는 공정에 이어 적어도 미리 정해진 부분에 다결정실리콘(20)을 형성시키는 공정 및, 상기 비소를 도입시키는 공정에 이어 상기 미리 정해진 부분에 인을 도입시키는 공정으로 이루어진 것을 특징으로 하는 반도체장치의 제조방법.
  6. 제 5 항에 있어서, 상기 비소를 도입시키는 공정이 상기 다결정실리콘층(20)을 형성시키는 공정이전에 이루어지도록 된 것을 특징으로 하는 반도체장치의 제조방법.
  7. 제 5 항에 있어서, 상기 비소를 도입시키는 공정이 상기 다결정실리콘층(20)을 형성시키는 공정 다음에 이루어지도록 된 것을 특징으로 하는 반도체장치의 제조방법.
  8. 제 5 항에 있어서, 상기 인을 도입시키는 공정이 상기 다결정실리콘층(20)을 형성시키는 공정 다음에 이루어지도록 된 것을 특징으로 하는 반도체장치의 제조방법.
  9. 실리콘기판(21)상에 절연막(23)을 형성시키는 공정과, 이 절연막(23)상에 게이트전극(24)을 형성시키는 공정, 이 게이트전극(24)에 인접한 실리콘기판(21)의 미리 정해진 부분으로 비소를 도입시키는 공정 및, 상기 비소를 도입시키는 공정다음에 미리 정해진 부분으로 인을 도입시키는 공정으로 이루어진 것을 특징으로 하는 반도체장치의 제조방법.
  10. 제 9 항에 있어서, 상기 비소를 도입시키는 공정과 상기 인을 도입시키는 공정이, 각각 미리 정해진 가속전압에서 이온주입으로 이루어지도록 된 것을 특징으로 하는 반도체장치의 제조방법.
  11. 제10항에 있어서, 상기 비소 및 인이온주입의 미리 정해진 가속전압이, 비소농도의 피이크깊이보다 인농도의 피이크가 얕아지도록 선택되어진 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019880015348A 1987-12-04 1988-11-22 반도체장치의 제조방법 KR930000607B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP62-307010 1987-12-04
JP87-307010 1987-12-04
JP62307010A JPH01147829A (ja) 1987-12-04 1987-12-04 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR890011027A true KR890011027A (ko) 1989-08-12
KR930000607B1 KR930000607B1 (ko) 1993-01-25

Family

ID=17963929

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880015348A KR930000607B1 (ko) 1987-12-04 1988-11-22 반도체장치의 제조방법

Country Status (4)

Country Link
US (1) US5814541A (ko)
EP (2) EP0328819A3 (ko)
JP (1) JPH01147829A (ko)
KR (1) KR930000607B1 (ko)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047357A (en) * 1989-02-03 1991-09-10 Texas Instruments Incorporated Method for forming emitters in a BiCMOS process
US5096840A (en) * 1990-08-15 1992-03-17 At&T Bell Laboratories Method of making a polysilicon emitter bipolar transistor
JP3144000B2 (ja) * 1990-11-28 2001-03-07 セイコーエプソン株式会社 半導体装置およびその製造方法
US6180494B1 (en) * 1999-03-11 2001-01-30 Micron Technology, Inc. Integrated circuitry, methods of fabricating integrated circuitry, methods of forming local interconnects, and methods of forming conductive lines
KR100440078B1 (ko) * 1999-12-28 2004-07-15 주식회사 하이닉스반도체 반도체소자의 제조방법
JP2003031797A (ja) * 2001-07-12 2003-01-31 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6750482B2 (en) * 2002-04-30 2004-06-15 Rf Micro Devices, Inc. Highly conductive semiconductor layer having two or more impurities
US20040121524A1 (en) 2002-12-20 2004-06-24 Micron Technology, Inc. Apparatus and method for controlling diffusion
US7297617B2 (en) * 2003-04-22 2007-11-20 Micron Technology, Inc. Method for controlling diffusion in semiconductor regions
KR100657142B1 (ko) * 2005-06-03 2006-12-13 매그나칩 반도체 유한회사 이미지센서의 픽셀 쉬링크를 위한 콘택 구조 및 그 제조방법
US8110469B2 (en) 2005-08-30 2012-02-07 Micron Technology, Inc. Graded dielectric layers
US9976437B2 (en) 2006-08-15 2018-05-22 United Technologies Corporation Epicyclic gear train
US8753243B2 (en) 2006-08-15 2014-06-17 United Technologies Corporation Ring gear mounting arrangement with oil scavenge scheme
CN102315121A (zh) * 2010-07-02 2012-01-11 上海镭芯微电子有限公司 高频晶体管的制造方法

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51135362A (en) * 1975-05-19 1976-11-24 Matsushita Electronics Corp Method of manufacturing silicon semiconductor element
JPS5327372A (en) * 1976-08-27 1978-03-14 Hitachi Ltd Production of s emiconductor device
JPS53147473A (en) * 1977-05-27 1978-12-22 Mitsubishi Electric Corp Production of mis type semiconductor device
US4333099A (en) * 1978-02-27 1982-06-01 Rca Corporation Use of silicide to bridge unwanted polycrystalline silicon P-N junction
JPS5519857A (en) * 1978-07-28 1980-02-12 Nec Corp Semiconductor
GB2056168A (en) * 1979-08-01 1981-03-11 Gen Instrument Corp Method of fabricating P-N junction with high breakdown voltage
US4276688A (en) * 1980-01-21 1981-07-07 Rca Corporation Method for forming buried contact complementary MOS devices
JPS5736844A (en) * 1980-08-15 1982-02-27 Hitachi Ltd Semiconductor device
JPS5787174A (en) * 1980-11-20 1982-05-31 Seiko Epson Corp Semiconductor integrated circuit device
US4374700A (en) * 1981-05-29 1983-02-22 Texas Instruments Incorporated Method of manufacturing silicide contacts for CMOS devices
JPS592191A (ja) * 1982-06-29 1984-01-07 Fujitsu Ltd 手書き日本語文の認識処理方式
JPS59135767A (ja) * 1983-01-24 1984-08-04 Hitachi Ltd 半導体装置とその製造方法
JPS6063961A (ja) * 1983-08-30 1985-04-12 Fujitsu Ltd 半導体装置の製造方法
JPS60132373A (ja) * 1983-12-20 1985-07-15 Toshiba Corp 半導体装置の製造方法
JPS61137369A (ja) * 1984-12-10 1986-06-25 Hitachi Ltd 半導体装置の製造方法
US4666557A (en) * 1984-12-10 1987-05-19 Ncr Corporation Method for forming channel stops in vertical semiconductor surfaces
JPS6212125A (ja) * 1985-07-10 1987-01-21 Fujitsu Ltd 半導体装置の製造方法
JPS6237967A (ja) * 1985-08-12 1987-02-18 Sony Corp 半導体装置の製造方法
JPS62193118A (ja) * 1986-02-19 1987-08-25 Sanyo Electric Co Ltd 半導体装置の製造方法
JPH0732192B2 (ja) * 1987-05-26 1995-04-10 日本電気株式会社 半導体装置の製造方法
JPH03109736A (ja) * 1989-09-25 1991-05-09 Sony Corp 半導体装置の製造方法
EP0430166A3 (en) * 1989-12-01 1993-05-12 Seiko Instruments Inc. Method of doping impurity into semiconductor films and patterned semiconductor strip
US5376577A (en) * 1994-06-30 1994-12-27 Micron Semiconductor, Inc. Method of forming a low resistive current path between a buried contact and a diffusion region
US5525552A (en) * 1995-06-08 1996-06-11 Taiwan Semiconductor Manufacturing Company Method for fabricating a MOSFET device with a buried contact
US5536683A (en) * 1995-06-15 1996-07-16 United Microelectronics Corporation Method for interconnecting semiconductor devices
US5554549A (en) * 1995-07-03 1996-09-10 Taiwan Semiconductor Manufacturing Company Ltd. Salicide process for FETs

Also Published As

Publication number Publication date
EP0328819A2 (en) 1989-08-23
US5814541A (en) 1998-09-29
EP1011129A3 (en) 2000-12-06
EP0328819A3 (en) 1989-11-29
JPH01147829A (ja) 1989-06-09
EP1011129A2 (en) 2000-06-21
KR930000607B1 (ko) 1993-01-25

Similar Documents

Publication Publication Date Title
KR870000763A (ko) 반도체 장치 및 그 제조방법
KR920017245A (ko) 반도체장치와 그의 제조방법
KR970703616A (ko) 바이폴라 트랜지스터 및 모스 트랜지스터를 구비한 반도체 장치의 제조 방법(method of manufacturing a semiconductor device with bicmos circuit)
KR890011027A (ko) 반도체장치의 제조방법
KR970013402A (ko) 플래쉬 메모리장치 및 그 제조방법
KR890008988A (ko) 전하저지층을 갖는 반도체 기억장치 및 그 제조방법
KR890003028A (ko) 고저항 다결정 실리콘의 제조방법
GB1335814A (en) Transistor and method of manufacturing the same
GB1486099A (en) Planar diffusion method for making integrated circuits
KR960026463A (ko) 모스 전계 효과 트랜지스터(mosfet) 제조 방법
KR980006542A (ko) 반도체소자 제조방법
KR890011097A (ko) 반도체장치의 제조방법
US3892609A (en) Production of mis integrated devices with high inversion voltage to threshold voltage ratios
KR900019128A (ko) 금속산화물 반도체 장치와 그 제조방법
JPH0548110A (ja) 半導体素子の製造方法
KR960026459A (ko) 트랜지스터 제조방법
KR890005885A (ko) 바이폴라 트랜지스터의 제조방법
KR960009015A (ko) 반도체 소자의 게이트 전극 형성방법
KR940006277A (ko) 반도체 장치
JPS6348865A (ja) 半導体装置
JPH0277135A (ja) 半導体装置の製造方法
JPH023915A (ja) 半導体装置の製造方法
KR960009066A (ko) 반도체 소자의 트랜지스터 제조방법
KR890005888A (ko) Ldd구조 반도체 장치의 제조방법
JPH04283966A (ja) Ｍｏｓ型半導体装置の製造方法

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20021231

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee