KR920017245A - 반도체장치와 그의 제조방법 - Google Patents

반도체장치와 그의 제조방법 Download PDF

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Publication number
KR920017245A
KR920017245A KR1019920001286A KR920001286A KR920017245A KR 920017245 A KR920017245 A KR 920017245A KR 1019920001286 A KR1019920001286 A KR 1019920001286A KR 920001286 A KR920001286 A KR 920001286A KR 920017245 A KR920017245 A KR 920017245A
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South Korea
Prior art keywords
source
gate electrode
semiconductor substrate
substrate
offset step
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KR1019920001286A
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English (en)
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KR960000716B1 (ko
Inventor
히또시 아오끼
Original Assignee
쓰지 하루오
샤프 가부시끼가이샤
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Publication of KR920017245A publication Critical patent/KR920017245A/ko
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Publication of KR960000716B1 publication Critical patent/KR960000716B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음

Description

반도체장치와 그의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 1실시예에 의한 장치제조공정의 제1스텝을 표시하는 약도, 제2도는 본 발명의 실시예에 의한 장치제조공정의 제2스텝을 표시하는 약도.

Claims (5)

  1. 반도체기판, 그 기판상에 형성되는 게이트전극과, 그 기판에 제공되는 한쌍의 소스/드레인영역과, 그리고 적어도 하나의 소스/드레인영역에 형성되고 그리고 게이트전극 근접에서 기판으로 아래쪽으로 늘어나는 오프세트 스텝부분을 포함하는 반도체장치.
  2. 제1항에 있어서, 상기 오프세트 스텝부분의 깊이는 소스/드레인 영역을 형성하는 불순물확산이 상기 반도체기판에 확산될 수 있는 깊이보다 더 작게되게 프리세트되는 반도체장치.
  3. (Ⅰ)정보-기록영역을 제공하는 게이트전극을 가지는 반도체 기판상에 레지스트패턴을 형성하고, (Ⅱ)마스크로서 게이트전극과 레지스트패턴의 사용으로, 형성되는 적어도 하나의 소스/드레인영역에서 반도체 기판에 아래쪽으로 차단하여 게이트전극의 인근에 오프세트 스텝부분을 형성하고, 그리고 (Ⅲ)레지스트패턴을 제거하고 그리고나서 한쌍의 소스/드레인영역을 형성하도록 마스크로서 게이트전극의 사용으로 형성되는 소스/드레인영역에 불순물이온을 주입하는 스텝을 포함하고, 그것에 의해 적어도 하나의 소스/드레인영역은 전극 인근 장소에 오프세트 스텝부분을 가지는 반도체장치 제조방법.
  4. 제3항에 있어서, 불순물이온 주입은 불순물이온이 반도체기판에 대하여서 정상에 따라 주입되는 0°-각 주입에 따라서 실행되는 반도체장치 제조방법.
  5. 제3항에 있어서, 오프세트 스텝부분은 소스/드레인영역을 형성하는 불순물 이온확산의 그것보다 더 작은 깊이를 가지게 만들어지는 반도체장치 제조방법.
    ※참고사항:최초출원 내용에 의하여 공개하는 것임.
KR1019920001286A 1991-02-08 1992-01-29 반도체장치와 그의 제조방법 KR960000716B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP3017788A JP2612969B2 (ja) 1991-02-08 1991-02-08 半導体装置の製造方法
JP91-017788 1991-02-08
JP91-17788 1991-02-08

Publications (2)

Publication Number Publication Date
KR920017245A true KR920017245A (ko) 1992-09-26
KR960000716B1 KR960000716B1 (ko) 1996-01-11

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920001286A KR960000716B1 (ko) 1991-02-08 1992-01-29 반도체장치와 그의 제조방법

Country Status (3)

Country Link
US (1) US5214303A (ko)
JP (1) JP2612969B2 (ko)
KR (1) KR960000716B1 (ko)

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Also Published As

Publication number Publication date
JP2612969B2 (ja) 1997-05-21
KR960000716B1 (ko) 1996-01-11
US5214303A (en) 1993-05-25
JPH04256360A (ja) 1992-09-11

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