KR20020016855A - 인터포저 및 그 제조 방법 - Google Patents

인터포저 및 그 제조 방법 Download PDF

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Publication number
KR20020016855A
KR20020016855A KR1020017016740A KR20017016740A KR20020016855A KR 20020016855 A KR20020016855 A KR 20020016855A KR 1020017016740 A KR1020017016740 A KR 1020017016740A KR 20017016740 A KR20017016740 A KR 20017016740A KR 20020016855 A KR20020016855 A KR 20020016855A
Authority
KR
South Korea
Prior art keywords
interposer
layer
integrated circuit
copper
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020017016740A
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English (en)
Korean (ko)
Inventor
보어마크티.
Original Assignee
피터 엔. 데트킨
인텔 코오퍼레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 피터 엔. 데트킨, 인텔 코오퍼레이션 filed Critical 피터 엔. 데트킨
Publication of KR20020016855A publication Critical patent/KR20020016855A/ko
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H10W20/2125—Top-view shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020017016740A 1999-06-28 2000-05-26 인터포저 및 그 제조 방법 Ceased KR20020016855A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/340,530 1999-06-28
US09/340,530 US6617681B1 (en) 1999-06-28 1999-06-28 Interposer and method of making same
PCT/US2000/014588 WO2001001486A1 (en) 1999-06-28 2000-05-26 Interposer and method of making same

Publications (1)

Publication Number Publication Date
KR20020016855A true KR20020016855A (ko) 2002-03-06

Family

ID=23333787

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020017016740A Ceased KR20020016855A (ko) 1999-06-28 2000-05-26 인터포저 및 그 제조 방법

Country Status (9)

Country Link
US (3) US6617681B1 (https=)
EP (1) EP1190449A1 (https=)
JP (1) JP5285829B2 (https=)
KR (1) KR20020016855A (https=)
CN (1) CN1199264C (https=)
AU (1) AU5166500A (https=)
IL (2) IL147304A0 (https=)
TW (1) TWI247563B (https=)
WO (1) WO2001001486A1 (https=)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100712517B1 (ko) * 2005-07-14 2007-04-30 삼성전자주식회사 에어 갭 구조를 갖는 반도체 소자의 인터포저
KR100858075B1 (ko) * 2004-07-06 2008-09-11 도쿄엘렉트론가부시키가이샤 인터포저
KR101225450B1 (ko) * 2012-05-02 2013-01-24 (주) 이피웍스 다마신 실리콘 인터포저
KR101299875B1 (ko) * 2010-06-25 2013-08-23 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 임베디드 3ｄ 인터포저 구조물
KR20140099316A (ko) * 2012-01-06 2014-08-11 도판 인사츠 가부시키가이샤 반도체 장치 및 그 제조 방법

Families Citing this family (176)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8352400B2 (en) 1991-12-23 2013-01-08 Hoffberg Steven M Adaptive pattern recognition based controller apparatus and method and human-factored interface therefore
GB2289983B (en) 1994-06-01 1996-10-16 Simage Oy Imaging devices,systems and methods
US9029793B2 (en) 1998-11-05 2015-05-12 Siemens Aktiengesellschaft Imaging device
US6495442B1 (en) * 2000-10-18 2002-12-17 Magic Corporation Post passivation interconnection schemes on top of the IC chips
US7966078B2 (en) 1999-02-01 2011-06-21 Steven Hoffberg Network media appliance system and method
US6617681B1 (en) * 1999-06-28 2003-09-09 Intel Corporation Interposer and method of making same
JP2001044589A (ja) * 1999-07-30 2001-02-16 Nitto Denko Corp 回路基板
JP4454814B2 (ja) * 2000-08-29 2010-04-21 Ｎｅｃエレクトロニクス株式会社 樹脂封止型半導体装置及びその製造方法
US6593644B2 (en) * 2001-04-19 2003-07-15 International Business Machines Corporation System of a package fabricated on a semiconductor or dielectric wafer with wiring on one face, vias extending through the wafer, and external connections on the opposing face
US20020170897A1 (en) * 2001-05-21 2002-11-21 Hall Frank L. Methods for preparing ball grid array substrates via use of a laser
US7189595B2 (en) * 2001-05-31 2007-03-13 International Business Machines Corporation Method of manufacture of silicon based package and devices manufactured thereby
TW560017B (en) * 2001-07-12 2003-11-01 Hitachi Ltd Semiconductor connection substrate
US20030059976A1 (en) * 2001-09-24 2003-03-27 Nathan Richard J. Integrated package and methods for making same
US6580611B1 (en) * 2001-12-21 2003-06-17 Intel Corporation Dual-sided heat removal system
JP2003283086A (ja) * 2002-01-21 2003-10-03 Hitachi Cable Ltd 配線基板、配線基板の製造方法及び配線基板を用いた電子部品
US6960837B2 (en) * 2002-02-26 2005-11-01 International Business Machines Corporation Method of connecting core I/O pins to backside chip I/O pads
DE10215654A1 (de) * 2002-04-09 2003-11-06 Infineon Technologies Ag Elektronisches Bauteil mit mindestens einem Halbleiterchip und Flip-Chip-Kontakten sowie Verfahren zu seiner Herstellung
JP4285629B2 (ja) * 2002-04-25 2009-06-24 富士通株式会社 集積回路を搭載するインターポーザ基板の作製方法
TWI229435B (en) * 2002-06-18 2005-03-11 Sanyo Electric Co Manufacture of semiconductor device
US6933597B1 (en) * 2002-07-09 2005-08-23 National Semiconductor Corporation Spacer with passive components for use in multi-chip modules
US6902872B2 (en) * 2002-07-29 2005-06-07 Hewlett-Packard Development Company, L.P. Method of forming a through-substrate interconnect
US6593221B1 (en) * 2002-08-13 2003-07-15 Micron Technology, Inc. Selective passivation of exposed silicon
JP2004079701A (ja) * 2002-08-14 2004-03-11 Sony Corp 半導体装置及びその製造方法
JP2004095849A (ja) * 2002-08-30 2004-03-25 Fujikura Ltd 貫通電極付き半導体基板の製造方法、貫通電極付き半導体デバイスの製造方法
GB0224689D0 (en) 2002-10-23 2002-12-04 Simage Oy Formation of contacts on semiconductor substrates
EP1554760B1 (en) 2002-10-25 2009-08-19 Ipl Intellectual Property Licensing Limited Circuit substrate and method
TW569416B (en) * 2002-12-19 2004-01-01 Via Tech Inc High density multi-chip module structure and manufacturing method thereof
US7056131B1 (en) * 2003-04-11 2006-06-06 Neoconix, Inc. Contact grid array system
US7597561B2 (en) * 2003-04-11 2009-10-06 Neoconix, Inc. Method and system for batch forming spring elements in three dimensions
US7113408B2 (en) * 2003-06-11 2006-09-26 Neoconix, Inc. Contact grid array formed on a printed circuit board
US20100167561A1 (en) * 2003-04-11 2010-07-01 Neoconix, Inc. Structure and process for a contact grid array formed in a circuitized substrate
US8584353B2 (en) * 2003-04-11 2013-11-19 Neoconix, Inc. Method for fabricating a contact grid array
US20050120553A1 (en) * 2003-12-08 2005-06-09 Brown Dirk D. Method for forming MEMS grid array connector
US6916181B2 (en) * 2003-06-11 2005-07-12 Neoconix, Inc. Remountable connector for land grid array packages
US7114961B2 (en) * 2003-04-11 2006-10-03 Neoconix, Inc. Electrical connector on a flexible carrier
US20070020960A1 (en) * 2003-04-11 2007-01-25 Williams John D Contact grid array system
US7628617B2 (en) * 2003-06-11 2009-12-08 Neoconix, Inc. Structure and process for a contact grid array formed in a circuitized substrate
US7758351B2 (en) * 2003-04-11 2010-07-20 Neoconix, Inc. Method and system for batch manufacturing of spring elements
US7244125B2 (en) 2003-12-08 2007-07-17 Neoconix, Inc. Connector for making electrical contact at semiconductor scales
JP2004363380A (ja) * 2003-06-05 2004-12-24 Sanyo Electric Co Ltd 光半導体装置およびその製造方法
US6869290B2 (en) * 2003-06-11 2005-03-22 Neoconix, Inc. Circuitized connector for land grid array
US7070419B2 (en) * 2003-06-11 2006-07-04 Neoconix Inc. Land grid array connector including heterogeneous contact elements
KR101086520B1 (ko) 2003-06-20 2011-11-23 엔엑스피 비 브이 전자 장치, 조립체 및 전자 장치 제조 방법
TWI245381B (en) * 2003-08-14 2005-12-11 Via Tech Inc Electrical package and process thereof
US7566960B1 (en) 2003-10-31 2009-07-28 Xilinx, Inc. Interposing structure
US7233061B1 (en) 2003-10-31 2007-06-19 Xilinx, Inc Interposer for impedance matching
KR100513422B1 (ko) * 2003-11-13 2005-09-09 삼성전자주식회사 집적회로 모듈의 구조
US20050227510A1 (en) * 2004-04-09 2005-10-13 Brown Dirk D Small array contact with precision working range
JP3896112B2 (ja) * 2003-12-25 2007-03-22 エルピーダメモリ株式会社 半導体集積回路装置
JP4587676B2 (ja) * 2004-01-29 2010-11-24 ルネサスエレクトロニクス株式会社 チップ積層構成の３次元半導体装置
US7383632B2 (en) * 2004-03-19 2008-06-10 Neoconix, Inc. Method for fabricating a connector
JP4377269B2 (ja) * 2004-03-19 2009-12-02 Ｎｅｃエレクトロニクス株式会社 半導体装置
US7347698B2 (en) * 2004-03-19 2008-03-25 Neoconix, Inc. Deep drawn electrical contacts and method for making
US7025601B2 (en) * 2004-03-19 2006-04-11 Neoconix, Inc. Interposer and method for making same
US20050205988A1 (en) * 2004-03-19 2005-09-22 Epic Technology Inc. Die package with higher useable die contact pad area
US7090503B2 (en) * 2004-03-19 2006-08-15 Neoconix, Inc. Interposer with compliant pins
JP4439976B2 (ja) * 2004-03-31 2010-03-24 Ｎｅｃエレクトロニクス株式会社 半導体装置およびその製造方法
US7241680B2 (en) * 2004-04-30 2007-07-10 Intel Corporation Electronic packaging using conductive interposer connector
JP4844392B2 (ja) * 2004-05-21 2011-12-28 日本電気株式会社 半導体装置及び配線基板
JP2008504711A (ja) * 2004-06-29 2008-02-14 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 発光ダイオードモジュール
US20060000542A1 (en) * 2004-06-30 2006-01-05 Yongki Min Metal oxide ceramic thin film on base metal electrode
JP4343044B2 (ja) * 2004-06-30 2009-10-14 新光電気工業株式会社 インターポーザ及びその製造方法並びに半導体装置
JP4865197B2 (ja) * 2004-06-30 2012-02-01 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US20060000642A1 (en) * 2004-07-01 2006-01-05 Epic Technology Inc. Interposer with compliant pins
JP2006024653A (ja) * 2004-07-06 2006-01-26 Tokyo Electron Ltd 貫通基板および貫通基板の製造方法
US7354276B2 (en) * 2004-07-20 2008-04-08 Neoconix, Inc. Interposer with compliant pins
TWI250596B (en) * 2004-07-23 2006-03-01 Ind Tech Res Inst Wafer-level chip scale packaging method
US7413995B2 (en) * 2004-08-23 2008-08-19 Intel Corporation Etched interposer for integrated circuit devices
US7049208B2 (en) 2004-10-11 2006-05-23 Intel Corporation Method of manufacturing of thin based substrate
US7358444B2 (en) * 2004-10-13 2008-04-15 Intel Corporation Folded substrate with interposer package for integrated circuit devices
US7290315B2 (en) * 2004-10-21 2007-11-06 Intel Corporation Method for making a passive device structure
US20060091495A1 (en) * 2004-10-29 2006-05-04 Palanduz Cengiz A Ceramic thin film on base metal electrode
TWI246384B (en) * 2004-11-22 2005-12-21 Benq Corp Multi-layer printed circuit board layout and manufacturing method thereof
TWI313914B (en) * 2005-01-31 2009-08-21 Sanyo Electric Co Semiconductor device and a method for manufacturing thereof
US7160798B2 (en) * 2005-02-24 2007-01-09 Freescale Semiconductor, Inc. Method of making reinforced semiconductor package
US7375412B1 (en) * 2005-03-31 2008-05-20 Intel Corporation iTFC with optimized C(T)
US20060220177A1 (en) * 2005-03-31 2006-10-05 Palanduz Cengiz A Reduced porosity high-k thin film mixed grains for thin film capacitor applications
US7629269B2 (en) * 2005-03-31 2009-12-08 Intel Corporation High-k thin film grain size control
US7371676B2 (en) * 2005-04-08 2008-05-13 Micron Technology, Inc. Method for fabricating semiconductor components with through wire interconnects
US7292055B2 (en) * 2005-04-21 2007-11-06 Endicott Interconnect Technologies, Inc. Interposer for use with test apparatus
US7393770B2 (en) * 2005-05-19 2008-07-01 Micron Technology, Inc. Backside method for fabricating semiconductor components with conductive interconnects
US7510907B2 (en) * 2005-06-22 2009-03-31 Intel Corporation Through-wafer vias and surface metallization for coupling thereto
US7453144B2 (en) * 2005-06-29 2008-11-18 Intel Corporation Thin film capacitors and methods of making the same
US7495330B2 (en) * 2005-06-30 2009-02-24 Intel Corporation Substrate connector for integrated circuit devices
US9601474B2 (en) * 2005-07-22 2017-03-21 Invensas Corporation Electrically stackable semiconductor wafer and chip packages
US7435627B2 (en) * 2005-08-11 2008-10-14 International Business Machines Corporation Techniques for providing decoupling capacitance
US20070050738A1 (en) * 2005-08-31 2007-03-01 Dittmann Larry E Customer designed interposer
TWI272728B (en) * 2005-09-02 2007-02-01 Touch Micro System Tech Three-dimensional interconnect interposer adapted for use in system in package and method of making the same
US7307348B2 (en) * 2005-12-07 2007-12-11 Micron Technology, Inc. Semiconductor components having through wire interconnects (TWI)
US7357644B2 (en) * 2005-12-12 2008-04-15 Neoconix, Inc. Connector having staggered contact architecture for enhanced working range
US7402912B2 (en) * 2005-12-15 2008-07-22 International Business Machines Corporation Method and power control structure for managing plurality of voltage islands
US8003479B2 (en) * 2006-03-27 2011-08-23 Intel Corporation Low temperature deposition and ultra fast annealing of integrated circuit thin film capacitor
US7759776B2 (en) * 2006-03-28 2010-07-20 Taiwan Semiconductor Manufacturing Co., Ltd. Space transformer having multi-layer pad structures
US20070246821A1 (en) * 2006-04-20 2007-10-25 Lu Szu W Utra-thin substrate package technology
US7659612B2 (en) 2006-04-24 2010-02-09 Micron Technology, Inc. Semiconductor components having encapsulated through wire interconnects (TWI)
US7510928B2 (en) * 2006-05-05 2009-03-31 Tru-Si Technologies, Inc. Dielectric trenches, nickel/tantalum oxide structures, and chemical mechanical polishing techniques
AT9551U1 (de) * 2006-05-16 2007-11-15 Austria Tech & System Tech Verfahren zum festlegen eines elektronischen bauteils auf einer leiterplatte sowie system bestehend aus einer leiterplatte und wenigstens einem elektronischen bauteil
JP5394617B2 (ja) * 2006-06-16 2014-01-22 新光電気工業株式会社 半導体装置及び半導体装置の製造方法及び基板
US8067840B2 (en) 2006-06-20 2011-11-29 Nxp B.V. Power amplifier assembly
DE102006034679A1 (de) 2006-07-24 2008-01-31 Infineon Technologies Ag Halbleitermodul mit Leistungshalbleiterchip und passiven Bauelement sowie Verfahren zur Herstellung desselben
US7804177B2 (en) * 2006-07-26 2010-09-28 Taiwan Semiconductor Manufacturing Company, Ltd. Silicon-based thin substrate and packaging schemes
US7473577B2 (en) * 2006-08-11 2009-01-06 International Business Machines Corporation Integrated chip carrier with compliant interconnect
JP5117698B2 (ja) * 2006-09-27 2013-01-16 ルネサスエレクトロニクス株式会社 半導体装置
US7989895B2 (en) * 2006-11-15 2011-08-02 Avx Corporation Integration using package stacking with multi-layer organic substrates
DE102007023666A1 (de) * 2006-12-01 2008-06-05 Infineon Technologies Ag Halbleiterbaustein und Verfahren zur Herstellung eines Halbleiterbausteins
JP2008160019A (ja) * 2006-12-26 2008-07-10 Shinko Electric Ind Co Ltd 電子部品
US7528492B2 (en) * 2007-05-24 2009-05-05 Taiwan Semiconductor Manufacturing Company, Ltd. Test patterns for detecting misalignment of through-wafer vias
US8476735B2 (en) 2007-05-29 2013-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Programmable semiconductor interposer for electronic package and method of forming
US7982137B2 (en) * 2007-06-27 2011-07-19 Hamilton Sundstrand Corporation Circuit board with an attached die and intermediate interposer
US7939941B2 (en) * 2007-06-27 2011-05-10 Taiwan Semiconductor Manufacturing Company, Ltd. Formation of through via before contact processing
JP2009021433A (ja) * 2007-07-12 2009-01-29 Fujikura Ltd 配線基板及びその製造方法
US7935408B2 (en) * 2007-10-26 2011-05-03 International Business Machines Corporation Substrate anchor structure and method
US8273603B2 (en) * 2008-04-04 2012-09-25 The Charles Stark Draper Laboratory, Inc. Interposers, electronic modules, and methods for forming the same
US8017451B2 (en) 2008-04-04 2011-09-13 The Charles Stark Draper Laboratory, Inc. Electronic modules and methods for forming the same
US8853830B2 (en) 2008-05-14 2014-10-07 Taiwan Semiconductor Manufacturing Company, Ltd. System, structure, and method of manufacturing a semiconductor substrate stack
US9159679B2 (en) * 2008-09-15 2015-10-13 International Rectifier Corporation Semiconductor package with integrated passives and method for fabricating same
US8030780B2 (en) * 2008-10-16 2011-10-04 Micron Technology, Inc. Semiconductor substrates with unitary vias and via terminals, and associated systems and methods
JP5537016B2 (ja) * 2008-10-27 2014-07-02 株式会社東芝 半導体装置および半導体装置の製造方法
US7859099B2 (en) * 2008-12-11 2010-12-28 Stats Chippac Ltd. Integrated circuit packaging system having through silicon via with direct interconnects and method of manufacture thereof
US8907462B2 (en) * 2009-02-05 2014-12-09 Hewlett-Packard Development Company, L. P. Integrated circuit package
JP2009111433A (ja) * 2009-02-18 2009-05-21 Fujikura Ltd 貫通電極付き半導体基板の製造方法、貫通電極付き半導体デバイスの製造方法
TWI394253B (zh) * 2009-03-25 2013-04-21 日月光半導體製造股份有限公司 具有凸塊之晶片及具有凸塊之晶片之封裝結構
US7936060B2 (en) * 2009-04-29 2011-05-03 International Business Machines Corporation Reworkable electronic device assembly and method
WO2010131391A1 (ja) * 2009-05-14 2010-11-18 パナソニック株式会社 半導体装置及びそれを有する電子機器
JP2011061132A (ja) * 2009-09-14 2011-03-24 Zycube:Kk インターポーザ
US8334202B2 (en) * 2009-11-03 2012-12-18 Infineon Technologies Ag Device fabricated using an electroplating process
JP5590869B2 (ja) * 2009-12-07 2014-09-17 新光電気工業株式会社 配線基板及びその製造方法並びに半導体パッケージ
JP5514559B2 (ja) 2010-01-12 2014-06-04 新光電気工業株式会社 配線基板及びその製造方法並びに半導体パッケージ
US10297550B2 (en) * 2010-02-05 2019-05-21 Taiwan Semiconductor Manufacturing Company, Ltd. 3D IC architecture with interposer and interconnect structure for bonding dies
US8324511B1 (en) * 2010-04-06 2012-12-04 Amkor Technology, Inc. Through via nub reveal method and structure
US9293366B2 (en) 2010-04-28 2016-03-22 Taiwan Semiconductor Manufacturing Company, Ltd. Through-substrate vias with improved connections
US8913402B1 (en) 2010-05-20 2014-12-16 American Semiconductor, Inc. Triple-damascene interposer
JP5608430B2 (ja) * 2010-06-07 2014-10-15 新光電気工業株式会社 配線基板及び配線基板の製造方法
JP2011009781A (ja) * 2010-09-29 2011-01-13 Fujikura Ltd 貫通電極付き半導体デバイスの製造方法
JP2012089566A (ja) * 2010-10-15 2012-05-10 Elpida Memory Inc 半導体装置及びその製造方法、並びにデータ処理システム
JP5565272B2 (ja) * 2010-10-29 2014-08-06 富士通株式会社 貫通電極基板
US8710623B1 (en) 2010-11-18 2014-04-29 Xilinx, Inc. Integrated circuit having a discrete capacitor mounted on a semiconductor die
US9412708B2 (en) * 2011-01-19 2016-08-09 Taiwan Semiconductor Manufacturing Company, Ltd. Enhanced ESD protection of integrated circuit in 3DIC package
US8373252B1 (en) * 2011-03-07 2013-02-12 Xilinx, Inc. Integrated circuit having capacitor on back surface
US8587127B2 (en) * 2011-06-15 2013-11-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structures and methods of forming the same
US8779553B2 (en) * 2011-06-16 2014-07-15 Xilinx, Inc. Stress-aware design for integrated circuits comprising a stress inducing structure and keep out zone
US8872345B2 (en) * 2011-07-07 2014-10-28 Taiwan Semiconductor Manufacturing Company, Ltd. Forming grounded through-silicon vias in a semiconductor substrate
KR20130026920A (ko) * 2011-09-06 2013-03-14 삼성전자주식회사 질화물계 반도체 패키지 및 그의 제조 방법, 접합 기판
US9236278B2 (en) 2011-09-23 2016-01-12 Stats Chippac Ltd. Integrated circuit packaging system with a substrate embedded dummy-die paddle and method of manufacture thereof
US10475759B2 (en) * 2011-10-11 2019-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure having dies with connectors of different sizes
US8641428B2 (en) 2011-12-02 2014-02-04 Neoconix, Inc. Electrical connector and method of making it
US20130288474A1 (en) * 2012-04-27 2013-10-31 Applied Materials, Inc. Methods for fabricating dual damascene interconnect structures
US9275933B2 (en) 2012-06-19 2016-03-01 United Microelectronics Corp. Semiconductor device
KR101401988B1 (ko) * 2012-09-07 2014-05-30 주식회사 동부하이텍 반도체 패키지 및 반도체 패키지 형성 방법
JP2014060185A (ja) 2012-09-14 2014-04-03 Toshiba Corp 半導体装置の製造方法および半導体装置
US8803287B2 (en) * 2012-10-17 2014-08-12 Texas Instruments Deutschland Gmbh Electronic device comprising a semiconductor structure having an integrated circuit back end capacitor and thin film resistor and method of manufacturing the same
TW201417225A (zh) * 2012-10-25 2014-05-01 財團法人工業技術研究院 封裝基板及其製法
KR101366461B1 (ko) 2012-11-20 2014-02-26 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 및 그 제조 방법
US9799592B2 (en) 2013-11-19 2017-10-24 Amkor Technology, Inc. Semicondutor device with through-silicon via-less deep wells
US9679615B2 (en) 2013-03-15 2017-06-13 Micron Technology, Inc. Flexible memory system with a controller and a stack of memory
US9304272B2 (en) * 2013-03-15 2016-04-05 Compass Electro Optical Systems Ltd. EO device for processing data signals
US9680273B2 (en) 2013-03-15 2017-06-13 Neoconix, Inc Electrical connector with electrical contacts protected by a layer of compressible material and method of making it
US9214433B2 (en) * 2013-05-21 2015-12-15 Xilinx, Inc. Charge damage protection on an interposer for a stacked die assembly
US9581639B2 (en) 2013-12-28 2017-02-28 Intel Corporation Organic space transformer attachment and assembly
US9510454B2 (en) 2014-02-28 2016-11-29 Qualcomm Incorporated Integrated interposer with embedded active devices
US9632251B2 (en) 2014-04-02 2017-04-25 International Business Machines Corporation Integration of photonic, electronic, and sensor devices with SOI VLSI microprocessor technology
EP3035385A1 (en) 2014-12-16 2016-06-22 IMEC vzw Semiconductor interposer comprising a schottky diode and a method for fabricating the interposer
JP2017073472A (ja) 2015-10-07 2017-04-13 株式会社ディスコ 半導体装置の製造方法
KR20170046344A (ko) 2015-10-21 2017-05-02 삼성전자주식회사 반도체 장치 및 이를 포함하는 반도체 패키지
US10720339B2 (en) 2016-05-10 2020-07-21 Agency For Science, Technology And Research Fan-out wafer-level packaging method and the package produced thereof
US9960328B2 (en) 2016-09-06 2018-05-01 Amkor Technology, Inc. Semiconductor device and manufacturing method thereof
JP6790771B2 (ja) * 2016-12-01 2020-11-25 株式会社村田製作所 コンデンサの実装構造
JP6779574B2 (ja) 2016-12-14 2020-11-04 株式会社ディスコ インターポーザの製造方法
JP6808282B2 (ja) 2016-12-14 2021-01-06 株式会社ディスコ インターポーザの製造方法
US10383225B1 (en) 2018-08-10 2019-08-13 Seagate Technology Llc Interposer with offset-stacked traces
MY202540A (en) * 2019-06-11 2024-05-06 Intel Corp Multi-faceted integrated-circuit dice and packages
US11315831B2 (en) 2019-07-22 2022-04-26 International Business Machines Corporation Dual redistribution layer structure
JP7351266B2 (ja) * 2020-07-07 2023-09-27 信越半導体株式会社 半導体装置の製造方法
US11715895B2 (en) 2020-07-09 2023-08-01 Seagate Technology Llc Methods for making electrical connectors with an electrical interposer
US20240105526A1 (en) * 2022-09-28 2024-03-28 Nanya Technology Corporation Electronic device, electronic structure and method of manufacturing the same
WO2025257409A1 (en) * 2024-06-13 2025-12-18 Lotus Microsystems Aps Method of manufacturing high-density through-silicon vias

Family Cites Families (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3577037A (en) * 1968-07-05 1971-05-04 Ibm Diffused electrical connector apparatus and method of making same
US3648131A (en) * 1969-11-07 1972-03-07 Ibm Hourglass-shaped conductive connection through semiconductor structures
US4074342A (en) * 1974-12-20 1978-02-14 International Business Machines Corporation Electrical package for lsi devices and assembly process therefor
US4125933A (en) * 1976-07-08 1978-11-21 Burroughs Corporation IGFET Integrated circuit memory cell
US4349862A (en) * 1980-08-11 1982-09-14 International Business Machines Corporation Capacitive chip carrier and multilayer ceramic capacitors
US4394712A (en) 1981-03-18 1983-07-19 General Electric Company Alignment-enhancing feed-through conductors for stackable silicon-on-sapphire wafers
DE3600169A1 (de) * 1985-01-07 1986-07-10 Canon K.K., Tokio/Tokyo Maskenstruktur zur lithographie, verfahren zu ihrer herstellung und lithographisches verfahren
JPH07100685B2 (ja) * 1985-08-02 1995-11-01 レオ・ファ−マシュ−ティカル・プロダクツ・リミテッド・エイ／エス（レ−ベンス・ケミスケ・ファブリック・プロデュクチオンスアクチ−セルスカブ） 新規ビタミンｄ類似体
US4866507A (en) * 1986-05-19 1989-09-12 International Business Machines Corporation Module for packaging semiconductor integrated circuit chips on a base substrate
US4811082A (en) * 1986-11-12 1989-03-07 International Business Machines Corporation High performance integrated circuit packaging structure
US5136471A (en) * 1987-02-26 1992-08-04 Nec Corporation Laminate wiring board
US5191224A (en) * 1987-04-22 1993-03-02 Hitachi, Ltd. Wafer scale of full wafer memory system, packaging method thereof, and wafer processing method employed therein
US5191404A (en) * 1989-12-20 1993-03-02 Digital Equipment Corporation High density memory array packaging
US5063177A (en) * 1990-10-04 1991-11-05 Comsat Method of packaging microwave semiconductor components and integrated circuits
US5258648A (en) * 1991-06-27 1993-11-02 Motorola, Inc. Composite flip chip semiconductor device with an interposer having test contacts formed along its periphery
JPH0563137A (ja) * 1991-08-30 1993-03-12 Fujitsu Ltd 半導体装置
JPH05183019A (ja) 1991-12-27 1993-07-23 Hitachi Ltd 半導体装置およびその製造方法
US5473120A (en) 1992-04-27 1995-12-05 Tokuyama Corporation Multilayer board and fabrication method thereof
EP0596075B1 (en) 1992-05-15 2001-08-22 Irvine Sensors Corporation Non-conductive end layer for integrated stack of ic chips
US5371654A (en) 1992-10-19 1994-12-06 International Business Machines Corporation Three dimensional high performance interconnection package
US5413489A (en) * 1993-04-27 1995-05-09 Aptix Corporation Integrated socket and IC package assembly
JP3195474B2 (ja) * 1993-09-20 2001-08-06 富士通株式会社 半導体装置
DE59503218D1 (de) 1994-02-07 1998-09-24 Siemens Ag Verfahren zur Herstellung einer kubisch integrierten Schaltungsanordnung
US5567654A (en) * 1994-09-28 1996-10-22 International Business Machines Corporation Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging
US5530288A (en) * 1994-10-12 1996-06-25 International Business Machines Corporation Passive interposer including at least one passive electronic component
JPH08148563A (ja) * 1994-11-22 1996-06-07 Nec Corp 半導体装置の多層配線構造体の形成方法
US5640167A (en) * 1995-01-27 1997-06-17 Ford Motor Company Vehicle window glass antenna arrangement
JP3186941B2 (ja) * 1995-02-07 2001-07-11 シャープ株式会社 半導体チップおよびマルチチップ半導体モジュール
US5574630A (en) * 1995-05-11 1996-11-12 International Business Machines Corporation Laminated electronic package including a power/ground assembly
US5635767A (en) * 1995-06-02 1997-06-03 Motorola, Inc. Semiconductor device having built-in high frequency bypass capacitor
JPH0997833A (ja) * 1995-07-22 1997-04-08 Ricoh Co Ltd 半導体装置とその製造方法
JP3387282B2 (ja) 1995-08-03 2003-03-17 日産自動車株式会社 半導体装置の構造及びその製造方法
US5756395A (en) 1995-08-18 1998-05-26 Lsi Logic Corporation Process for forming metal interconnect structures for use with integrated circuit devices to form integrated circuit structures
US5623160A (en) * 1995-09-14 1997-04-22 Liberkowski; Janusz B. Signal-routing or interconnect substrate, structure and apparatus
JP3465464B2 (ja) * 1996-02-06 2003-11-10 富士通株式会社 半導体チップキャリヤ
JPH09232507A (ja) * 1996-02-20 1997-09-05 Yamaha Corp 半導体集積回路およびその製造方法
US5644167A (en) * 1996-03-01 1997-07-01 National Semiconductor Corporation Integrated circuit package assemblies including an electrostatic discharge interposer
US6198136B1 (en) * 1996-03-19 2001-03-06 International Business Machines Corporation Support chips for buffer circuits
JP2809191B2 (ja) * 1996-04-30 1998-10-08 日本電気株式会社 半導体チップの実装方法
US5777383A (en) * 1996-05-09 1998-07-07 Lsi Logic Corporation Semiconductor chip package with interconnect layers and routing and testing methods
JP3692186B2 (ja) * 1996-09-09 2005-09-07 沖電気工業株式会社 半導体装置
JPH10209371A (ja) * 1997-01-17 1998-08-07 Mitsubishi Electric Corp Ｉｃメモリ
JP3718940B2 (ja) * 1997-01-27 2005-11-24 株式会社村田製作所 フリップチップセラミック基板
JPH1167971A (ja) * 1997-05-30 1999-03-09 St Microelectron Inc 向上させた基板をベースとした集積回路パッケージ
US5790384A (en) * 1997-06-26 1998-08-04 International Business Machines Corporation Bare die multiple dies for direct attach
JP3867875B2 (ja) * 1997-09-17 2007-01-17 ソニー株式会社 半導体装置
US6052287A (en) * 1997-12-09 2000-04-18 Sandia Corporation Silicon ball grid array chip carrier
IT1299401B1 (it) * 1998-03-27 2000-03-16 Optikon 2000 Spa Procedimento di ottimizzazione del pilotaggio di un attuatore piezoelettrico, in particolare per dispositivi facoemulsificatori,
US6544167B2 (en) * 1998-05-01 2003-04-08 Correstore, Inc. Ventricular restoration patch
US6175160B1 (en) * 1999-01-08 2001-01-16 Intel Corporation Flip-chip having an on-chip cache memory
US6617681B1 (en) * 1999-06-28 2003-09-09 Intel Corporation Interposer and method of making same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100858075B1 (ko) * 2004-07-06 2008-09-11 도쿄엘렉트론가부시키가이샤 인터포저
KR100712517B1 (ko) * 2005-07-14 2007-04-30 삼성전자주식회사 에어 갭 구조를 갖는 반도체 소자의 인터포저
KR101299875B1 (ko) * 2010-06-25 2013-08-23 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 임베디드 3ｄ 인터포저 구조물
KR20140099316A (ko) * 2012-01-06 2014-08-11 도판 인사츠 가부시키가이샤 반도체 장치 및 그 제조 방법
KR101225450B1 (ko) * 2012-05-02 2013-01-24 (주) 이피웍스 다마신 실리콘 인터포저

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