KR100417847B1 - 페르미-문턱전계효과트랜지스터및그제조방법 - Google Patents

페르미-문턱전계효과트랜지스터및그제조방법 Download PDF

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Publication number
KR100417847B1
KR100417847B1 KR10-1998-0700480A KR19980700480A KR100417847B1 KR 100417847 B1 KR100417847 B1 KR 100417847B1 KR 19980700480 A KR19980700480 A KR 19980700480A KR 100417847 B1 KR100417847 B1 KR 100417847B1
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KR
South Korea
Prior art keywords
fermi
source
drain
region
depth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-1998-0700480A
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English (en)
Korean (ko)
Inventor
마이클 윌리암 덴넨
Original Assignee
썬더버드 테크놀로지스, 인코포레이티드
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Anticipated expiration legal-status Critical
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/637Lateral IGFETs having no inversion channels, e.g. buried channel lateral IGFETs, normally-on lateral IGFETs or depletion-mode lateral IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351Substrate regions of field-effect devices
    • H10D62/357Substrate regions of field-effect devices of FETs
    • H10D62/364Substrate regions of field-effect devices of FETs of IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351Substrate regions of field-effect devices
    • H10D62/357Substrate regions of field-effect devices of FETs
    • H10D62/364Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351Substrate regions of field-effect devices
    • H10D62/357Substrate regions of field-effect devices of FETs
    • H10D62/364Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/378Contact regions to the substrate regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface

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  • Insulated Gate Type Field-Effect Transistor (AREA)
KR10-1998-0700480A 1995-07-21 1996-07-19 페르미-문턱전계효과트랜지스터및그제조방법 Expired - Fee Related KR100417847B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/505,085 US5814869A (en) 1992-01-28 1995-07-21 Short channel fermi-threshold field effect transistors
US08/505085 1995-07-21

Publications (1)

Publication Number Publication Date
KR100417847B1 true KR100417847B1 (ko) 2004-04-29

Family

ID=24008940

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-1998-0700480A Expired - Fee Related KR100417847B1 (ko) 1995-07-21 1996-07-19 페르미-문턱전계효과트랜지스터및그제조방법

Country Status (8)

Country Link
US (1) US5814869A (https=)
EP (1) EP0843898B1 (https=)
JP (1) JP4338784B2 (https=)
KR (1) KR100417847B1 (https=)
AU (1) AU6503996A (https=)
CA (1) CA2227011C (https=)
DE (1) DE69628840T2 (https=)
WO (1) WO1997004489A1 (https=)

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TW432636B (en) * 1997-09-26 2001-05-01 Thunderbird Tech Inc Metal gate fermi-threshold field effect transistor
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US6373094B2 (en) * 1998-09-11 2002-04-16 Texas Instruments Incorporated EEPROM cell using conventional process steps
US20020036328A1 (en) * 1998-11-16 2002-03-28 William R. Richards, Jr. Offset drain fermi-threshold field effect transistors
US6365475B1 (en) * 2000-03-27 2002-04-02 United Microelectronics Corp. Method of forming a MOS transistor
JP3881840B2 (ja) * 2000-11-14 2007-02-14 独立行政法人産業技術総合研究所 半導体装置
US6555872B1 (en) 2000-11-22 2003-04-29 Thunderbird Technologies, Inc. Trench gate fermi-threshold field effect transistors
US6432777B1 (en) 2001-06-06 2002-08-13 International Business Machines Corporation Method for increasing the effective well doping in a MOSFET as the gate length decreases
US20040079997A1 (en) * 2002-10-24 2004-04-29 Noriyuki Miura Semiconductor device and metal-oxide-semiconductor field-effect transistor
KR101022854B1 (ko) * 2002-11-29 2011-03-17 글로벌파운드리즈 인크. 도핑된 고유전 측벽 스페이서들을 구비한 전계 효과트랜지스터의 드레인/소스 확장 구조
US6867104B2 (en) * 2002-12-28 2005-03-15 Intel Corporation Method to form a structure to decrease area capacitance within a buried insulator device
JP2008523622A (ja) * 2004-12-07 2008-07-03 サンダーバード・テクノロジーズ,インコーポレイテッド Fermi−FETのひずみシリコンとゲート技術
US20060220112A1 (en) * 2005-04-01 2006-10-05 International Business Machines Corporation Semiconductor device forming method and structure for retarding dopant-enhanced diffusion
TW200739876A (en) * 2005-10-06 2007-10-16 Nxp Bv Electrostatic discharge protection device
US7790527B2 (en) * 2006-02-03 2010-09-07 International Business Machines Corporation High-voltage silicon-on-insulator transistors and methods of manufacturing the same
WO2008128164A1 (en) * 2007-04-12 2008-10-23 The Penn State Research Foundation Accumulation field effect microelectronic device and process for the formation thereof
US9209246B2 (en) 2007-04-12 2015-12-08 The Penn State University Accumulation field effect microelectronic device and process for the formation thereof
US20090134476A1 (en) * 2007-11-13 2009-05-28 Thunderbird Technologies, Inc. Low temperature coefficient field effect transistors and design and fabrication methods
US20100123206A1 (en) * 2008-11-18 2010-05-20 Thunderbird Technologies, Inc. Methods of fabricating field effect transistors including titanium nitride gates over partially nitrided oxide and devices so fabricated
US10553494B2 (en) * 2016-11-29 2020-02-04 Taiwan Semiconductor Manufacturing Company, Ltd. Breakdown resistant semiconductor apparatus and method of making same

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JPH01214169A (ja) * 1988-02-23 1989-08-28 Nec Corp 半導体装置
US5369295A (en) * 1992-01-28 1994-11-29 Thunderbird Technologies, Inc. Fermi threshold field effect transistor with reduced gate and diffusion capacitance

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Also Published As

Publication number Publication date
CA2227011C (en) 2007-10-16
EP0843898A1 (en) 1998-05-27
EP0843898B1 (en) 2003-06-25
US5814869A (en) 1998-09-29
HK1010604A1 (en) 1999-06-25
DE69628840T2 (de) 2004-05-06
JPH11510312A (ja) 1999-09-07
JP4338784B2 (ja) 2009-10-07
WO1997004489A1 (en) 1997-02-06
CA2227011A1 (en) 1997-02-06
AU6503996A (en) 1997-02-18
DE69628840D1 (de) 2003-07-31

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