JPWO2018034127A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JPWO2018034127A1 JPWO2018034127A1 JP2018534318A JP2018534318A JPWO2018034127A1 JP WO2018034127 A1 JPWO2018034127 A1 JP WO2018034127A1 JP 2018534318 A JP2018534318 A JP 2018534318A JP 2018534318 A JP2018534318 A JP 2018534318A JP WO2018034127 A1 JPWO2018034127 A1 JP WO2018034127A1
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
Description
<半導体装置1の他の形態>
以下では、前述の半導体装置1の他の形態について図面を参照して説明する。
2 表面
3 裏面
4 ソース電極
6 ドレイン電極
7 端面
10 周縁
11 半導体層
12 裏面終端構造
14 n−型領域
15 内側周縁
16 外側周縁
18 p+型領域
20 外周領域
21 活性領域
22 MISトランジスタ構造
23 p型ボディ領域
24 n+型ソース領域
25 ゲート絶縁膜
26 ゲート電極
29 n−型ドリフト領域
30 層間絶縁膜
33 表面終端構造
34 リサーフ層
35 ガードリング層
37 平坦部
38 トレンチ
39 p+型基板
40 n−型半導体層
41 トレンチ
42 n型フィールドストップ領域
43 n型フィールドストップ領域
44 電界緩和領域
54 リサーフ層
55 ガードリング層
56 周囲電界緩和領域
59 n−型周囲領域
60 第2ドレイン電極
71 半導体パッケージ
72 半導体チップ
73 基板端子
74 樹脂パッケージ
100 マトリクスコンバータ回路
101 双方向スイッチ
Claims (32)
- 表面、その反対側の裏面および端面を有する半導体層と、
前記半導体層の表面部に形成されたMISトランジスタ構造と、
前記半導体層の前記裏面側に互いに隣接して形成された第1導電型部および第2導電型部と、
前記半導体層の前記裏面上に形成され、前記第1導電型部とショットキー接合を形成し、前記第2導電型部とオーミック接触を形成する第1電極とを含む、半導体装置。 - 前記半導体層は、第1導電型の半導体層を含み、
前記第1導電型部は、前記第1導電型の半導体層の裏面部を含み、
前記第2導電型部は、前記第1導電型の半導体層の前記裏面部に選択的に形成された第2導電型の不純物領域を含む、請求項1に記載の半導体装置。 - 前記半導体層は、第1導電型の第1半導体層と、前記第1半導体層の裏面側に形成された第2導電型の第2半導体層とを含み、
前記第2導電型層には、前記第1導電型層に達する底部を有するトレンチが選択的に形成されており、
前記第1導電型部は、前記トレンチの底部に露出する前記第1導電型層の裏面部を含み、
前記第2導電型部は、前記第2導電型層によって構成されている、請求項1に記載の半導体装置。 - 前記MISトランジスタ構造は、第2導電型のボディ領域と、前記ボディ領域の表面部に形成された第1導電型のソース領域と、前記ボディ領域および前記ソース領域の少なくとも一部に接するように形成されたゲート絶縁膜と、前記ゲート絶縁膜を挟んで前記ボディ領域に対向するゲート電極と、前記ゲート電極の上方および側方を覆うように形成された層間絶縁膜と、前記ソース領域に接続され前記層間絶縁膜の上方に形成されたソース電極とを含み、
前記半導体層において前記ボディ領域に対して前記半導体層の前記裏面側に配置された第1導電型のドリフト領域は、前記第1電極と接続される領域がドレイン領域となる、請求項1〜3のいずれか一項に記載の半導体装置。 - 前記半導体層は、前記MISトランジスタ構造が形成された活性領域において前記第1導電型部の裏面側に選択的に形成され、前記ドリフト領域よりも高い抵抗を有する高抵抗領域または第2導電型の不純物領域からなる電界緩和領域を含む、請求項4に記載の半導体装置。
- 前記半導体層がSiCであって、前記電界緩和領域は、1×1014cm−3〜1×1022cm−3の結晶欠陥濃度を有する高抵抗領域を含む、請求項5に記載の半導体装置。
- 前記半導体層がSiCであって、前記電界緩和領域は、1×1016cm−3〜1×1019cm−3の不純物濃度を有する第2導電型の不純物領域を含む、請求項5に記載の半導体装置。
- 前記第1導電型部は、前記半導体層の裏面側に略一様な平坦部を有しており、
前記電界緩和領域は、前記平坦部に形成されている、請求項5〜7のいずれか一項に記載の半導体装置。 - 前記第1導電型部は、前記半導体層の裏面側に選択的にトレンチを有しており、
前記電界緩和領域は、前記トレンチの内面に沿って形成されている、請求項5〜7のいずれか一項に記載の半導体装置。 - 前記半導体層は、前記半導体層の前記表面側および前記裏面側の少なくとも一方に形成され、前記ドリフト領域よりも高い不純物濃度を有する第1導電型のフィールドストップ領域をさらに含む、請求項4に記載の半導体装置。
- 前記フィールドストップ領域は、前記半導体層の前記表面または前記裏面から離れた深さ位置に配置されている、請求項10に記載の半導体装置。
- 前記フィールドストップ領域は、前記半導体層の前記表面または前記裏面に達するように形成されている、請求項10に記載の半導体装置。
- 前記第1導電型部は、1×1014cm−3〜1×1017cm−3の不純物濃度を有し、
前記第1電極は、Ti、Ni、MoまたはAuからなる、請求項1〜12のいずれか一項に記載の半導体装置。 - 前記半導体層は、前記MISトランジスタ構造が形成された活性領域の周囲領域に形成された表面終端構造をさらに含む、請求項1〜13のいずれか一項に記載の半導体装置。
- 前記第1電極は、前記半導体層の前記端面よりも内側に離れた位置に周縁を有しており、
前記半導体層は、前記MISトランジスタ構造が形成された活性領域の周囲領域において前記半導体層の前記裏面側に形成され、前記第1電極の周縁部に重なるように配置された裏面終端構造をさらに含む、請求項1〜14のいずれか一項に記載の半導体装置。 - 前記裏面終端構造は、前記第1電極の前記周縁よりも内側の内側周縁と、前記第1電極の前記周縁よりも外側であって前記半導体層の前記端面よりも内側に離れた位置の外側周縁とを有している、請求項15に記載の半導体装置。
- 前記裏面終端構造は、前記第1電極の前記周縁部に重なる部分を少なくとも一つ含む複数の部分からなる、請求項15または16に記載の半導体装置。
- 前記裏面終端構造は、前記半導体層の前記端面に達するように形成されている、請求項15に記載の半導体装置。
- 前記半導体層は、前記MISトランジスタ構造が形成された活性領域の周囲領域において前記半導体層の前記表面から前記裏面まで達するように形成され、前記半導体層よりも高い抵抗を有する高抵抗領域または第2導電型の不純物領域からなる周囲電界緩和領域をさらに含む、請求項1〜14のいずれか一項に記載の半導体装置。
- 前記半導体層がSiCであって、前記周囲電界緩和領域は、1×1014cm−3〜1×1022cm−3の結晶欠陥濃度を有する高抵抗領域を含む、請求項19に記載の半導体装置。
- 前記半導体層がSiCであって、前記周囲電界緩和領域は、1×1018cm−3〜1×1022cm−3の不純物濃度を有する第2導電型の不純物領域を含む、請求項19に記載の半導体装置。
- 前記周囲電界緩和領域は、前記半導体層の前記端面から内側に間隔を空けて、前記活性領域を囲むように形成されている、請求項19〜21のいずれか一項に記載の半導体装置。
- 前記半導体層は、前記周囲電界緩和領域と前記半導体層の前記端面との間に第1導電型の周囲不純物領域を含み、
前記第1電極は、前記半導体層の前記裏面において前記周囲不純物領域に接しており、
前記半導体装置は、前記半導体層の前記表面において前記周囲不純物領域に接しており、前記第1電極に電気的に接続された補助電極を含む、請求項22に記載の半導体装置。 - 前記補助電極は、前記周囲電界緩和領域と前記周囲不純物領域との境界部を跨るように形成され、前記周囲電界緩和領域および前記周囲不純物領域の両方に接している、請求項23に記載の半導体装置。
- 前記周囲電界緩和領域は、前記半導体層の前記端面に至るように形成されている、請求項19〜21のいずれか一項に記載の半導体装置。
- 前記第2導電型部は、前記MISトランジスタ構造の1つのセル幅以上の最小幅Wminを有している、請求項1〜25のいずれか一項に記載の半導体装置。
- 前記第2導電型部は、前記半導体層の厚さの2倍以上の最小幅Wminを有している、請求項1〜26のいずれか一項に記載の半導体装置。
- 複数の前記第2導電型部が、平面視においてストライプ状に配列されている、請求項1〜27のいずれか一項に記載の半導体装置。
- 複数の前記第2導電型部が、平面視においてそれぞれが多角形状または円形状に形成され、離散的に配列されている、請求項1〜27のいずれか一項に記載の半導体装置。
- 請求項1〜29のいずれか一項に記載の半導体装置と、
前記半導体装置を搭載するリードフレームと、
前記半導体装置と前記リードフレームの少なくとも一部とを封止する封止樹脂とを有する、半導体パッケージ。 - 請求項1〜29のいずれか一項に記載の半導体装置を双方向スイッチ素子として用いた、電源変換装置。
- 前記双方向スイッチ素子を多相入力から多相出力へのマトリクスコンバータ回路のスイッチ回路として用いた、請求項31に記載の電源変換装置。
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Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000200906A (ja) * | 1999-01-07 | 2000-07-18 | Mitsubishi Electric Corp | 電力用半導体装置およびその製造方法 |
JP2007305609A (ja) * | 2006-04-10 | 2007-11-22 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JP2009094433A (ja) * | 2007-10-12 | 2009-04-30 | National Institute Of Advanced Industrial & Technology | 炭化珪素装置 |
JP2009123914A (ja) * | 2007-11-15 | 2009-06-04 | Fuji Electric Device Technology Co Ltd | 逆耐圧を有するスイッチング用半導体装置 |
JP2012174831A (ja) * | 2011-02-21 | 2012-09-10 | Fuji Electric Co Ltd | ワイドバンドギャップ逆阻止mos型半導体装置 |
WO2012124190A1 (ja) * | 2011-03-14 | 2012-09-20 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
JP2013110373A (ja) * | 2011-08-02 | 2013-06-06 | Rohm Co Ltd | 半導体装置およびその製造方法 |
WO2014041652A1 (ja) * | 2012-09-13 | 2014-03-20 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2015023118A (ja) * | 2013-07-18 | 2015-02-02 | 株式会社東芝 | 半導体装置 |
JP2015032789A (ja) * | 2013-08-06 | 2015-02-16 | 住友電気工業株式会社 | 炭化珪素半導体基板およびその製造方法、ならびに炭化珪素半導体装置の製造方法 |
WO2015159953A1 (ja) * | 2014-04-17 | 2015-10-22 | ローム株式会社 | 半導体装置 |
JP2015220437A (ja) * | 2014-05-21 | 2015-12-07 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
Family Cites Families (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5951741B2 (ja) | 1977-11-04 | 1984-12-15 | 三菱電機株式会社 | 樹脂封止形半導体装置 |
JPH0523547A (ja) | 1991-07-19 | 1993-02-02 | Nissin Electric Co Ltd | 溶液濃縮装置 |
JPH05315490A (ja) | 1992-05-07 | 1993-11-26 | Fuji Electric Co Ltd | 半導体素子 |
DE4240027A1 (de) | 1992-11-28 | 1994-06-01 | Asea Brown Boveri | MOS-gesteuerte Diode |
JPH11265976A (ja) | 1998-03-18 | 1999-09-28 | Mitsubishi Electric Corp | パワー半導体モジュールおよびその製造方法 |
JP2003197831A (ja) | 2001-12-25 | 2003-07-11 | Nippon Inter Electronics Corp | アキシャルリード型半導体装置 |
JP2004095572A (ja) | 2002-08-29 | 2004-03-25 | Hitachi Ltd | 半導体装置およびその製造方法 |
SE525574C2 (sv) | 2002-08-30 | 2005-03-15 | Okmetic Oyj | Lågdopat kiselkarbidsubstrat och användning därav i högspänningskomponenter |
JP2005183891A (ja) | 2003-12-19 | 2005-07-07 | Success International Kk | 双方向ブロック型プレーナデバイスの構造と製法 |
JP5157201B2 (ja) * | 2006-03-22 | 2013-03-06 | 株式会社デンソー | 半導体装置 |
JP4973055B2 (ja) | 2006-08-01 | 2012-07-11 | 日産自動車株式会社 | 半導体装置及びその製造方法 |
JP5198030B2 (ja) * | 2007-10-22 | 2013-05-15 | 株式会社東芝 | 半導体素子 |
JP2009130266A (ja) | 2007-11-27 | 2009-06-11 | Toshiba Corp | 半導体基板および半導体装置、半導体装置の製造方法 |
JP4635067B2 (ja) * | 2008-03-24 | 2011-02-16 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP5721351B2 (ja) * | 2009-07-21 | 2015-05-20 | ローム株式会社 | 半導体装置 |
JP5619152B2 (ja) * | 2010-04-26 | 2014-11-05 | 三菱電機株式会社 | 半導体装置 |
JP2012174996A (ja) | 2011-02-23 | 2012-09-10 | Fujitsu Ltd | 半導体装置及び半導体装置の製造方法 |
JP5811325B2 (ja) | 2011-06-08 | 2015-11-11 | 良孝 菅原 | 半導体素子および半導体装置 |
EP2793251B1 (en) | 2012-03-19 | 2019-05-08 | Fuji Electric Co., Ltd. | Production method for semiconductor device |
JP2013219194A (ja) | 2012-04-09 | 2013-10-24 | Sansha Electric Mfg Co Ltd | 半導体装置 |
JP5628462B1 (ja) | 2012-12-03 | 2014-11-19 | パナソニック株式会社 | 半導体装置およびその製造方法 |
JP6112600B2 (ja) | 2012-12-10 | 2017-04-12 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
WO2014210072A1 (en) | 2013-06-24 | 2014-12-31 | Ideal Power Inc. | Systems, circuits, devices, and methods with bidirectional bipolar transistors |
JP6242633B2 (ja) | 2013-09-03 | 2017-12-06 | 株式会社東芝 | 半導体装置 |
US9184248B2 (en) * | 2014-02-04 | 2015-11-10 | Maxpower Semiconductor Inc. | Vertical power MOSFET having planar channel and its method of fabrication |
JP2015153784A (ja) | 2014-02-10 | 2015-08-24 | トヨタ自動車株式会社 | 半導体装置の製造方法及び半導体装置 |
CN106256024B (zh) | 2014-04-30 | 2019-11-26 | 三菱电机株式会社 | 碳化硅半导体装置 |
DE102015207214A1 (de) | 2014-05-21 | 2015-12-17 | Sumitomo Electric Industries, Ltd. | Siliziumkarbid-Halbleitervorrichtung |
CN106663693B (zh) * | 2014-06-27 | 2019-11-01 | 三菱电机株式会社 | 碳化硅半导体装置 |
US10123443B2 (en) | 2014-12-25 | 2018-11-06 | Fuji Electric Co., Ltd. | Semiconductor device |
JP6535185B2 (ja) | 2015-03-04 | 2019-06-26 | エイブリック株式会社 | 湿度センサ |
US10366905B2 (en) | 2015-12-11 | 2019-07-30 | Rohm Co., Ltd. | Semiconductor device |
CN109643728B (zh) | 2016-08-19 | 2022-04-29 | 罗姆股份有限公司 | 半导体装置 |
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Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000200906A (ja) * | 1999-01-07 | 2000-07-18 | Mitsubishi Electric Corp | 電力用半導体装置およびその製造方法 |
JP2007305609A (ja) * | 2006-04-10 | 2007-11-22 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JP2009094433A (ja) * | 2007-10-12 | 2009-04-30 | National Institute Of Advanced Industrial & Technology | 炭化珪素装置 |
JP2009123914A (ja) * | 2007-11-15 | 2009-06-04 | Fuji Electric Device Technology Co Ltd | 逆耐圧を有するスイッチング用半導体装置 |
JP2012174831A (ja) * | 2011-02-21 | 2012-09-10 | Fuji Electric Co Ltd | ワイドバンドギャップ逆阻止mos型半導体装置 |
WO2012124190A1 (ja) * | 2011-03-14 | 2012-09-20 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
JP2013110373A (ja) * | 2011-08-02 | 2013-06-06 | Rohm Co Ltd | 半導体装置およびその製造方法 |
WO2014041652A1 (ja) * | 2012-09-13 | 2014-03-20 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2015023118A (ja) * | 2013-07-18 | 2015-02-02 | 株式会社東芝 | 半導体装置 |
JP2015032789A (ja) * | 2013-08-06 | 2015-02-16 | 住友電気工業株式会社 | 炭化珪素半導体基板およびその製造方法、ならびに炭化珪素半導体装置の製造方法 |
WO2015159953A1 (ja) * | 2014-04-17 | 2015-10-22 | ローム株式会社 | 半導体装置 |
JP2015220437A (ja) * | 2014-05-21 | 2015-12-07 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
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CN109643728B (zh) | 2022-04-29 |
KR102185158B1 (ko) | 2020-12-01 |
DE112017004153T5 (de) | 2019-05-02 |
US20200020765A1 (en) | 2020-01-16 |
KR20190039217A (ko) | 2019-04-10 |
CN109643728A (zh) | 2019-04-16 |
JP7018394B2 (ja) | 2022-02-10 |
WO2018034127A1 (ja) | 2018-02-22 |
US10892319B2 (en) | 2021-01-12 |
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