JP6118652B2 - 半導体チップ及び半導体装置 - Google Patents

半導体チップ及び半導体装置 Download PDF

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Publication number
JP6118652B2
JP6118652B2 JP2013126533A JP2013126533A JP6118652B2 JP 6118652 B2 JP6118652 B2 JP 6118652B2 JP 2013126533 A JP2013126533 A JP 2013126533A JP 2013126533 A JP2013126533 A JP 2013126533A JP 6118652 B2 JP6118652 B2 JP 6118652B2
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Japan
Prior art keywords
substrate
pad
pads
row
semiconductor chip
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JP2013126533A
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English (en)
Japanese (ja)
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JP2014187343A (ja
JP2014187343A5 (https=
Inventor
高志 ▲あべ▼松
高志 ▲あべ▼松
隆文 別井
隆文 別井
黒田　淳
淳 黒田
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Renesas Electronics Corp
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Renesas Electronics Corp
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Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2013126533A priority Critical patent/JP6118652B2/ja
Priority to KR1020140019303A priority patent/KR20140105394A/ko
Priority to CN201420070435.9U priority patent/CN203746832U/zh
Priority to CN201410055843.1A priority patent/CN104009012B/zh
Priority to US14/187,118 priority patent/US20140239493A1/en
Priority to US14/294,978 priority patent/US9190378B2/en
Publication of JP2014187343A publication Critical patent/JP2014187343A/ja
Publication of JP2014187343A5 publication Critical patent/JP2014187343A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H10W70/687—Shapes or dispositions thereof comprising multiple insulating layers characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/271—Configurations of stacked chips the chips having passive surfaces facing each other, i.e. in a back-to-back arrangement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
JP2013126533A 2013-02-22 2013-06-17 半導体チップ及び半導体装置 Active JP6118652B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2013126533A JP6118652B2 (ja) 2013-02-22 2013-06-17 半導体チップ及び半導体装置
CN201420070435.9U CN203746832U (zh) 2013-02-22 2014-02-19 半导体芯片和半导体器件
CN201410055843.1A CN104009012B (zh) 2013-02-22 2014-02-19 半导体芯片和半导体器件
KR1020140019303A KR20140105394A (ko) 2013-02-22 2014-02-19 반도체 칩 및 반도체 장치
US14/187,118 US20140239493A1 (en) 2013-02-22 2014-02-21 Semiconductor chip and semiconductor device
US14/294,978 US9190378B2 (en) 2013-02-22 2014-06-03 Semiconductor chip and semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2013033097 2013-02-22
JP2013033097 2013-02-22
JP2013126533A JP6118652B2 (ja) 2013-02-22 2013-06-17 半導体チップ及び半導体装置

Publications (3)

Publication Number Publication Date
JP2014187343A JP2014187343A (ja) 2014-10-02
JP2014187343A5 JP2014187343A5 (https=) 2016-04-14
JP6118652B2 true JP6118652B2 (ja) 2017-04-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013126533A Active JP6118652B2 (ja) 2013-02-22 2013-06-17 半導体チップ及び半導体装置

Country Status (4)

Country Link
US (2) US20140239493A1 (https=)
JP (1) JP6118652B2 (https=)
KR (1) KR20140105394A (https=)
CN (2) CN203746832U (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6118652B2 (ja) * 2013-02-22 2017-04-19 ルネサスエレクトロニクス株式会社 半導体チップ及び半導体装置
JP6342221B2 (ja) 2014-06-02 2018-06-13 ルネサスエレクトロニクス株式会社 半導体装置
WO2016063459A1 (ja) * 2014-10-24 2016-04-28 株式会社ソシオネクスト 半導体集積回路装置
US9929095B2 (en) 2014-11-06 2018-03-27 Qualcomm Incorporated IO power bus mesh structure design
KR102264548B1 (ko) 2014-11-21 2021-06-16 삼성전자주식회사 반도체 패키지 및 그 제조 방법
WO2020079830A1 (ja) * 2018-10-19 2020-04-23 株式会社ソシオネクスト 半導体チップ
US20200335463A1 (en) * 2019-04-22 2020-10-22 Mikro Mesa Technology Co., Ltd. Electrical binding structure and method of forming the same
CN114203681A (zh) * 2021-12-08 2022-03-18 通富微电子股份有限公司 防止热压焊空洞形成的基板及多层堆叠存储器

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JPH10173087A (ja) 1996-12-09 1998-06-26 Hitachi Ltd 半導体集積回路装置
US6031258A (en) * 1998-03-06 2000-02-29 S3 Incorporated High DC current stagger power/ground pad
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JP2002270779A (ja) * 2001-03-14 2002-09-20 Kawasaki Microelectronics Kk 半導体装置
JP2002280453A (ja) * 2001-03-19 2002-09-27 Mitsubishi Electric Corp 半導体集積回路
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KR20140143567A (ko) * 2013-06-07 2014-12-17 삼성전기주식회사 반도체 패키지 기판 및 반도체 패키지 기판 제조 방법

Also Published As

Publication number Publication date
US9190378B2 (en) 2015-11-17
CN203746832U (zh) 2014-07-30
KR20140105394A (ko) 2014-09-01
US20140284818A1 (en) 2014-09-25
JP2014187343A (ja) 2014-10-02
CN104009012A (zh) 2014-08-27
CN104009012B (zh) 2018-04-13
US20140239493A1 (en) 2014-08-28

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