JP5864180B2 - 半導体パッケージ及びその製造方法 - Google Patents

半導体パッケージ及びその製造方法 Download PDF

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JP5864180B2
JP5864180B2 JP2011206550A JP2011206550A JP5864180B2 JP 5864180 B2 JP5864180 B2 JP 5864180B2 JP 2011206550 A JP2011206550 A JP 2011206550A JP 2011206550 A JP2011206550 A JP 2011206550A JP 5864180 B2 JP5864180 B2 JP 5864180B2
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insulating layer
wiring
semiconductor chip
layer
sealing insulating
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Japanese (ja)
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JP2013069808A5 (enExample
JP2013069808A (ja
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健太 内山
健太 内山
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2011206550A priority Critical patent/JP5864180B2/ja
Priority to US13/604,912 priority patent/US9041211B2/en
Publication of JP2013069808A publication Critical patent/JP2013069808A/ja
Publication of JP2013069808A5 publication Critical patent/JP2013069808A5/ja
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    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • H05K2203/1469—Circuit made after mounting or encapsulation of the components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11373955B2 (en) 2020-02-25 2022-06-28 Samsung Electronics Co., Ltd. Semiconductor package and method of manufacturing the semiconductor package

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11049845B2 (en) * 2012-09-14 2021-06-29 Longitude Licensing Limited Semiconductor device having wires connecting connection pads
KR101999114B1 (ko) * 2013-06-03 2019-07-11 에스케이하이닉스 주식회사 반도체 패키지
KR102161173B1 (ko) * 2013-08-29 2020-09-29 삼성전자주식회사 패키지 온 패키지 장치 및 이의 제조 방법
US9443758B2 (en) 2013-12-11 2016-09-13 Taiwan Semiconductor Manufacturing Co., Ltd. Connecting techniques for stacked CMOS devices
TWI517343B (zh) * 2014-03-25 2016-01-11 恆勁科技股份有限公司 覆晶堆疊封裝結構及其製作方法
JP6388202B2 (ja) * 2014-08-07 2018-09-12 パナソニックＩｐマネジメント株式会社 絶縁樹脂シート、並びにそれを用いた回路基板および半導体パッケージ
JP2016048768A (ja) * 2014-08-28 2016-04-07 日立化成株式会社 配線板及び半導体装置の製造方法
EP4163956A3 (en) * 2014-09-26 2023-06-28 Intel Corporation Integrated circuit package having wire-bonded multi-die stack
US10325853B2 (en) 2014-12-03 2019-06-18 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming semiconductor packages having through package vias
JP6620989B2 (ja) * 2015-05-25 2019-12-18 パナソニックＩｐマネジメント株式会社 電子部品パッケージ
US11355444B2 (en) 2016-03-01 2022-06-07 Sony Corporation Semiconductor device, electronic module, electronic apparatus each having stacked embedded active components in multilayer wiring board and method for producing the semiconductor device having the same
JP6771308B2 (ja) * 2016-05-02 2020-10-21 三菱電機株式会社 回路基板および半導体集積回路の実装構造
US9818729B1 (en) * 2016-06-16 2017-11-14 Taiwan Semiconductor Manufacturing Company, Ltd. Package-on-package structure and method
KR102179806B1 (ko) * 2016-10-06 2020-11-17 미쓰이금속광업주식회사 다층 배선판의 제조 방법
KR102179799B1 (ko) * 2016-10-06 2020-11-17 미쓰이금속광업주식회사 다층 배선판의 제조 방법
CN109997419A (zh) * 2016-11-28 2019-07-09 三井金属矿业株式会社 多层布线板的制造方法
WO2018123382A1 (ja) * 2016-12-28 2018-07-05 株式会社村田製作所 回路モジュール
CN108695265A (zh) * 2017-04-11 2018-10-23 财团法人工业技术研究院 芯片封装结构及其制造方法
US11139262B2 (en) * 2019-02-07 2021-10-05 Micron Technology, Inc. Use of pre-channeled materials for anisotropic conductors
KR102722830B1 (ko) * 2019-03-08 2024-10-25 에이치. 비. 풀러, 컴퍼니 전자 부품을 캡슐화하는 시스템 및 방법
US11398408B2 (en) * 2019-09-24 2022-07-26 Advanced Semiconductor Engineering, Inc. Semiconductor substrate with trace connected to via at a level within a dielectric layer
KR20220008168A (ko) 2020-07-13 2022-01-20 삼성전자주식회사 반도체 패키지
CN112103193B (zh) 2020-08-21 2021-12-03 珠海越亚半导体股份有限公司 一种嵌埋结构及制备方法、基板
JP7669236B2 (ja) * 2021-09-03 2025-04-28 富士フイルム株式会社 半導体実装構造体

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001018864A1 (en) 1999-09-03 2001-03-15 Seiko Epson Corporation Semiconductor device, method of manufacture thereof, circuit board, and electronic device
JP2007150346A (ja) 1999-09-03 2007-06-14 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
US6271469B1 (en) * 1999-11-12 2001-08-07 Intel Corporation Direct build-up layer on an encapsulated die package
JP2002134653A (ja) * 2000-10-23 2002-05-10 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
US6680529B2 (en) * 2002-02-15 2004-01-20 Advanced Semiconductor Engineering, Inc. Semiconductor build-up package
JP2006222164A (ja) * 2005-02-08 2006-08-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
KR100813625B1 (ko) * 2006-11-15 2008-03-14 삼성전자주식회사 반도체 소자 패키지
JP5496445B2 (ja) 2007-06-08 2014-05-21 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2009260165A (ja) * 2008-04-21 2009-11-05 Casio Comput Co Ltd 半導体装置
JP2009289862A (ja) * 2008-05-28 2009-12-10 Casio Comput Co Ltd 半導体装置
JP5147755B2 (ja) 2009-02-20 2013-02-20 新光電気工業株式会社 半導体装置及びその製造方法
TWI501376B (zh) * 2009-10-07 2015-09-21 精材科技股份有限公司 晶片封裝體及其製造方法
JP5715334B2 (ja) * 2009-10-15 2015-05-07 ルネサスエレクトロニクス株式会社 半導体装置
JP5460388B2 (ja) * 2010-03-10 2014-04-02 新光電気工業株式会社 半導体装置及びその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11373955B2 (en) 2020-02-25 2022-06-28 Samsung Electronics Co., Ltd. Semiconductor package and method of manufacturing the semiconductor package
US11810864B2 (en) 2020-02-25 2023-11-07 Samsung Electronics Co., Ltd. Semiconductor package

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