JP5644793B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5644793B2 JP5644793B2 JP2012046618A JP2012046618A JP5644793B2 JP 5644793 B2 JP5644793 B2 JP 5644793B2 JP 2012046618 A JP2012046618 A JP 2012046618A JP 2012046618 A JP2012046618 A JP 2012046618A JP 5644793 B2 JP5644793 B2 JP 5644793B2
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- 239000004065 semiconductor Substances 0.000 title claims description 57
- 239000010410 layer Substances 0.000 claims description 202
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
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- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
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- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7394—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
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- H01L29/76—Unipolar devices, e.g. field effect transistors
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- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
本発明の第1実施形態について図面を参照しつつ説明する。図1〜図4に示されるように、半導体装置は、支持基板1a上に絶縁膜1bが形成されると共にこの絶縁膜1b上に半導体層1cが形成され、支持基板1aと半導体層1cとが絶縁膜1bによって分離されてなる半導体基板1を用いて構成されている。つまり、本実施形態では、半導体基板1としてSOI基板が用いられている。また、半導体層1cはN−型のドリフト層として機能するようになっており、このドリフト層2の表層部に横型のIGBTを構成する各部が形成されている。
本発明の第2実施形態について説明する。本実施形態は、第1実施形態に対してエミッタ層9を分離しないものであり、その他に関しては第1実施形態と同様であるため、ここでは説明を省略する。
本発明の第3実施形態について説明する。本実施形態は、第1実施形態に対してトレンチ6の形状を変更したものであり、その他に関しては第1実施形態と同様であるため、ここでは説明を省略する。
上記各実施形態では、第1導電型をN型とし、第2導電型をP型とした例について説明したが、第1導電型をP型とし、第2導電型をN型とすることもできる。
2 ドリフト層
3 ベース層
5 コレクタ層
6 トレンチ
7 ゲート絶縁膜
8 ゲート電極
9 エミッタ層
12 エミッタ電極
14 コレクタ電極
Claims (4)
- 第1導電型のドリフト層(2)を構成する半導体層(1c)と、
前記ドリフト層の少なくとも表面(2a)側の表層部に形成された第2導電型のベース層(3)と、
前記ベース層から前記ドリフト層に渡って所定方向に延設された複数のトレンチ(6)と、
前記複数のトレンチの壁面にそれぞれ形成されたゲート絶縁膜(7)と、
前記ゲート絶縁膜上にそれぞれ形成されたゲート電極(8)と、
前記ベース層の表層部であって前記複数のトレンチの側部にそれぞれ形成された第1導電型のエミッタ層(9)と、
前記ドリフト層の表層部であって前記ベース層と離間して形成された第2導電型のコレクタ層(5)と、
前記エミッタ層および前記ベース層と電気的に接続されるエミッタ電極(12)と、
前記コレクタ層と電気的に接続されるコレクタ電極(14)と、を備え、
前記複数のトレンチは、前記ドリフト層の裏面(2b)に達するように形成され、
前記コレクタ層は、前記ドリフト層の表層部のうち前記複数のトレンチの延設方向の先端部側に形成されており、
前記ゲート電極に所定電圧が印加されると、前記ベース層のうち前記トレンチと接する部分にチャネル領域が形成されて前記トレンチに沿って前記所定方向に電流が流れ、
前記複数のトレンチは、前記コレクタ層側の一端部における前記所定方向と垂直方向の長さが前記一端部と反対側の他端部における前記所定方向と垂直方向の長さより長くされていることを特徴とする半導体装置。 - 前記ベース層は、前記ドリフト層の裏面に達するように形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記半導体層は、支持基板(1a)上に当該支持基板と絶縁するための分離膜(1b)を介して備えられており、
前記複数のトレンチは、前記分離膜に達するように形成されていることを特徴とする請求項1または2に記載の半導体装置。 - 前記エミッタ層は、前記半導体層の表面において、前記複数のトレンチの側部にそれぞれ形成されていると共に、前記コレクタ層側の一端部と反対側の他端部を取り囲んでいることを特徴とする請求項1ないし3のいずれか1つに記載の半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012046618A JP5644793B2 (ja) | 2012-03-02 | 2012-03-02 | 半導体装置 |
PCT/JP2013/000866 WO2013128833A1 (ja) | 2012-03-02 | 2013-02-18 | 半導体装置 |
US14/375,895 US9231090B2 (en) | 2012-03-02 | 2013-02-18 | Trench-gate-type insulated gate bipolar transistor |
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JP2012046618A JP5644793B2 (ja) | 2012-03-02 | 2012-03-02 | 半導体装置 |
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JP2013183071A JP2013183071A (ja) | 2013-09-12 |
JP5644793B2 true JP5644793B2 (ja) | 2014-12-24 |
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JP2012046618A Expired - Fee Related JP5644793B2 (ja) | 2012-03-02 | 2012-03-02 | 半導体装置 |
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US (1) | US9231090B2 (ja) |
JP (1) | JP5644793B2 (ja) |
WO (1) | WO2013128833A1 (ja) |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5609939B2 (ja) * | 2011-09-27 | 2014-10-22 | 株式会社デンソー | 半導体装置 |
US9461164B2 (en) | 2013-09-16 | 2016-10-04 | Infineon Technologies Ag | Semiconductor device and method of manufacturing the same |
US9123801B2 (en) | 2013-09-16 | 2015-09-01 | Infineon Technologies Ag | Semiconductor device, integrated circuit and method of manufacturing a semiconductor device |
US20150221764A1 (en) * | 2014-02-04 | 2015-08-06 | Infineon Technologies Ag | Wafer based beol process for chip embedding |
CN104299992B (zh) * | 2014-10-23 | 2017-03-22 | 东南大学 | 一种横向沟槽绝缘栅双极型晶体管及其制备方法 |
JP2016096307A (ja) * | 2014-11-17 | 2016-05-26 | トヨタ自動車株式会社 | 半導体装置 |
WO2016125490A1 (ja) * | 2015-02-03 | 2016-08-11 | 富士電機株式会社 | 半導体装置及びその製造方法 |
JP2016152261A (ja) * | 2015-02-16 | 2016-08-22 | トヨタ自動車株式会社 | 半導体装置 |
CN104916674B (zh) * | 2015-04-17 | 2017-10-31 | 东南大学 | 一种电流增强型横向绝缘栅双极型晶体管 |
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WO2018029796A1 (ja) | 2016-08-10 | 2018-02-15 | 日産自動車株式会社 | 半導体装置 |
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Family Cites Families (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1209751A3 (en) | 1991-08-08 | 2002-07-31 | Kabushiki Kaisha Toshiba | Self turn-off insulated-gate power semiconductor device with injection-enhanced transistor structure |
DE69528944T2 (de) | 1994-09-16 | 2003-09-04 | Toshiba Kawasaki Kk | Halbleiteranordnung mit hoher Durchbruchspannung und mit einer vergrabenen MOS-Gatestruktur |
JP3168147B2 (ja) * | 1995-09-14 | 2001-05-21 | 株式会社日立製作所 | 半導体装置とそれを用いた3相インバータ |
JP2000183340A (ja) * | 1998-12-15 | 2000-06-30 | Fuji Electric Co Ltd | 半導体装置およびその駆動方法 |
JP3356162B2 (ja) * | 1999-10-19 | 2002-12-09 | 株式会社デンソー | 半導体装置及びその製造方法 |
JP2002305304A (ja) * | 2001-04-05 | 2002-10-18 | Toshiba Corp | 電力用半導体装置 |
JP4225711B2 (ja) * | 2001-06-29 | 2009-02-18 | 株式会社東芝 | 半導体素子及びその製造方法 |
JP3960091B2 (ja) * | 2002-03-20 | 2007-08-15 | 富士電機ホールディングス株式会社 | 半導体装置およびその製造方法 |
JP2004006778A (ja) * | 2002-04-04 | 2004-01-08 | Toshiba Corp | Mosfet、その製造方法及びそれを用いた光半導体リレー装置 |
JP4225177B2 (ja) | 2002-12-18 | 2009-02-18 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP4590884B2 (ja) | 2003-06-13 | 2010-12-01 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP2005191327A (ja) * | 2003-12-26 | 2005-07-14 | Nec Kansai Ltd | 横型mosトランジスタの製造方法 |
JP3984227B2 (ja) * | 2004-01-15 | 2007-10-03 | 株式会社東芝 | 半導体装置 |
JP4857566B2 (ja) * | 2005-01-27 | 2012-01-18 | 富士電機株式会社 | 絶縁ゲート型半導体装置とその製造方法 |
JP5122762B2 (ja) * | 2006-03-07 | 2013-01-16 | 株式会社東芝 | 電力用半導体素子、その製造方法及びその駆動方法 |
JP5984282B2 (ja) * | 2006-04-27 | 2016-09-06 | 富士電機株式会社 | 縦型トレンチ型絶縁ゲートmos半導体装置 |
JP2008311301A (ja) * | 2007-06-12 | 2008-12-25 | Sanyo Electric Co Ltd | 絶縁ゲートバイポーラトランジスタ |
JP5383009B2 (ja) * | 2007-07-17 | 2014-01-08 | 三菱電機株式会社 | 半導体装置の設計方法 |
JP2009170629A (ja) * | 2008-01-16 | 2009-07-30 | Nec Electronics Corp | 半導体装置の製造方法 |
JP4688901B2 (ja) * | 2008-05-13 | 2011-05-25 | 三菱電機株式会社 | 半導体装置 |
JP4929304B2 (ja) * | 2009-03-13 | 2012-05-09 | 株式会社東芝 | 半導体装置 |
JP5333342B2 (ja) * | 2009-06-29 | 2013-11-06 | 株式会社デンソー | 半導体装置 |
JP5526811B2 (ja) * | 2010-01-29 | 2014-06-18 | 富士電機株式会社 | 逆導通形絶縁ゲート型バイポーラトランジスタ |
JP4957840B2 (ja) * | 2010-02-05 | 2012-06-20 | 株式会社デンソー | 絶縁ゲート型半導体装置 |
EP2402997B1 (en) * | 2010-06-30 | 2012-02-08 | ABB Research Ltd. | Power semiconductor device |
DE102011079747A1 (de) * | 2010-07-27 | 2012-02-02 | Denso Corporation | Halbleitervorrichtung mit Schaltelement und Freilaufdiode, sowie Steuerverfahren hierfür |
JP5246302B2 (ja) * | 2010-09-08 | 2013-07-24 | 株式会社デンソー | 半導体装置 |
JP5480084B2 (ja) * | 2010-09-24 | 2014-04-23 | 株式会社東芝 | 半導体装置 |
US8441046B2 (en) * | 2010-10-31 | 2013-05-14 | Alpha And Omega Semiconductor Incorporated | Topside structures for an insulated gate bipolar transistor (IGBT) device to achieve improved device performances |
JP5594276B2 (ja) * | 2010-12-08 | 2014-09-24 | 株式会社デンソー | 絶縁ゲート型半導体装置 |
GB2502477B (en) * | 2011-02-23 | 2014-12-17 | Abb Technology Ag | Power semiconductor device and method for manufacturing such a power semiconductor device |
JP5621703B2 (ja) * | 2011-04-26 | 2014-11-12 | 三菱電機株式会社 | 半導体装置 |
WO2013005304A1 (ja) * | 2011-07-05 | 2013-01-10 | 三菱電機株式会社 | 半導体装置 |
-
2012
- 2012-03-02 JP JP2012046618A patent/JP5644793B2/ja not_active Expired - Fee Related
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2013
- 2013-02-18 US US14/375,895 patent/US9231090B2/en not_active Expired - Fee Related
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US9231090B2 (en) | 2016-01-05 |
US20140339602A1 (en) | 2014-11-20 |
JP2013183071A (ja) | 2013-09-12 |
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