JP6219704B2 - 半導体装置 - Google Patents
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- JP6219704B2 JP6219704B2 JP2013259764A JP2013259764A JP6219704B2 JP 6219704 B2 JP6219704 B2 JP 6219704B2 JP 2013259764 A JP2013259764 A JP 2013259764A JP 2013259764 A JP2013259764 A JP 2013259764A JP 6219704 B2 JP6219704 B2 JP 6219704B2
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- 239000004065 semiconductor Substances 0.000 title claims description 140
- 239000012535 impurity Substances 0.000 claims description 11
- 239000004020 conductor Substances 0.000 description 53
- 238000009792 diffusion process Methods 0.000 description 29
- 239000000758 substrate Substances 0.000 description 26
- 239000012212 insulator Substances 0.000 description 22
- 238000004519 manufacturing process Methods 0.000 description 17
- 230000005684 electric field Effects 0.000 description 11
- 238000000034 method Methods 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66734—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode
Description
以下、本実施例の半導体装置について図面を参照して説明する。図1に示すように、本実施例の半導体装置1は、半導体基板60と、半導体基板60の上面及び下面に形成された図示しない電極及び絶縁膜等を備えている。半導体基板60は、SiC基板であり、電流が流れるセルエリア40と、セルエリア40を取囲む終端エリア50を備えている。セルエリア40内には、複数のゲートトレンチ2が設けられている。複数のゲートトレンチ2は、x方向に直線状に伸びており、y方向に間隔を空けて配置されている。終端エリア50内には、複数の終端トレンチ3が設けられている。終端トレンチ3は、セルエリア40を囲むように環状に形成されている。終端トレンチ3の角部は、円弧状に形成されている。なお、本実施例では、半導体基板60にSiC基板を用いたが、このような例に限られず、Si基板を用いてもよい。
次に、第2実施例に係る半導体装置1aを図4、5を参照して説明する。第2実施例の半導体装置1aでは、第1実施例の半導体装置1と比較して、ゲートトレンチの底部の拡散領域がソース電極に接続されている点で相違し、その他の点については第1実施例の半導体装置1と同一の構成を備えている。以下、第1実施例と相違している点について詳細に説明する。なお、第1実施例の半導体装置1と同一構成の部分には、第1実施例と同一の参照番号を付している。
2:ゲートトレンチ
3:終端トレンチ
11:ゲート電極
12:ボディ層
13:トレンチ側面領域
14:拡散領域
15:ドリフト層
16:ドレイン層
17:ゲート酸化膜
18:絶縁体
19:ソース領域
20:ボディコンタクト領域
30:導電体領域
31:絶縁膜
Claims (3)
- トレンチゲート型の半導体装置であり、
第1導電型のドリフト層と、
前記ドリフト層の上面に接している第2導電型のボディ層と、
前記ボディ層の上面の一部に配置され、前記ボディ層によって前記ドリフト層と分離されている前記第1導電型の第1半導体領域と、
前記ボディ層を貫通して前記ドリフト層内に達するゲートトレンチの壁面に形成されているゲート絶縁膜と、
前記ゲート絶縁膜内に配置され、前記ドリフト層と前記第1半導体領域とを分離する範囲の前記ボディ層に前記ゲート絶縁膜を介して対向するトレンチゲート電極と、
前記ボディ層及び前記第1半導体領域と電気的に接続されている第1主電極と、
前記ゲートトレンチの底部に設けられ、前記ドリフト層によって囲まれている前記第2導電型の第2半導体領域と、
前記ゲートトレンチの側壁面の一部に沿って形成されており、その一端が前記第2半導体領域に接続される一方で他端が前記ボディ層に接続されており、前記ゲート絶縁膜に接すると共に前記ドリフト層と接している前記第2導電型の第3半導体領域であって、前記半導体装置がオフ状態のときに前記第2半導体領域と前記ボディ層を同電位とする第3半導体領域と、を備え、
前記第3半導体領域の前記第2導電型の不純物濃度は、前記第2半導体領域の前記第2導電型の不純物濃度よりも濃い、半導体装置。 - 前記第2半導体領域は、前記ゲートトレンチの底部の全体に設けられている、請求項1に記載の半導体装置。
- 前記ゲート絶縁膜は、前記ゲートトレンチの側面を被覆する第1部分と、前記ゲートトレンチの底面を被覆する第2部分を有しており、
前記第2部分の厚みが前記第1部分の厚みより厚い、請求項1又は2に記載の半導体装置。
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JP2013259764A JP6219704B2 (ja) | 2013-12-17 | 2013-12-17 | 半導体装置 |
US14/557,662 US9214526B2 (en) | 2013-12-17 | 2014-12-02 | Semiconductor device |
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JP2013259764A JP6219704B2 (ja) | 2013-12-17 | 2013-12-17 | 半導体装置 |
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JP2015118966A JP2015118966A (ja) | 2015-06-25 |
JP6219704B2 true JP6219704B2 (ja) | 2017-10-25 |
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JP (1) | JP6219704B2 (ja) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016039071A1 (ja) * | 2014-09-08 | 2016-03-17 | 富士電機株式会社 | 半導体装置及びその製造方法 |
JP6192686B2 (ja) * | 2015-07-02 | 2017-09-06 | 株式会社豊田中央研究所 | 半導体装置 |
JP6571467B2 (ja) | 2015-09-24 | 2019-09-04 | トヨタ自動車株式会社 | 絶縁ゲート型スイッチング素子とその製造方法 |
CN105633137B (zh) * | 2016-01-08 | 2019-02-01 | 电子科技大学 | 一种槽栅功率mosfet器件 |
JP6560142B2 (ja) * | 2016-02-26 | 2019-08-14 | トヨタ自動車株式会社 | スイッチング素子 |
JP6560141B2 (ja) | 2016-02-26 | 2019-08-14 | トヨタ自動車株式会社 | スイッチング素子 |
JP6763727B2 (ja) | 2016-09-15 | 2020-09-30 | トヨタ自動車株式会社 | スイッチング装置とその製造方法 |
JP6814652B2 (ja) * | 2017-02-06 | 2021-01-20 | 株式会社豊田中央研究所 | 半導体装置 |
JP6754308B2 (ja) * | 2017-02-06 | 2020-09-09 | 株式会社豊田中央研究所 | 半導体装置 |
JP6754310B2 (ja) * | 2017-02-10 | 2020-09-09 | 株式会社豊田中央研究所 | 半導体装置 |
JP6811118B2 (ja) * | 2017-02-27 | 2021-01-13 | 株式会社豊田中央研究所 | Mosfet |
DE112017007186T5 (de) | 2017-03-07 | 2019-12-24 | Mitsubishi Electric Corporation | Halbleitereinheit und leistungswandler |
JP2019046991A (ja) * | 2017-09-04 | 2019-03-22 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP2019079833A (ja) | 2017-10-19 | 2019-05-23 | トヨタ自動車株式会社 | スイッチング素子とその製造方法 |
JP7127279B2 (ja) | 2017-12-14 | 2022-08-30 | 富士電機株式会社 | 炭化シリコン半導体装置及びその製造方法 |
KR102334328B1 (ko) * | 2020-05-28 | 2021-12-02 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
KR102308153B1 (ko) * | 2020-06-09 | 2021-10-05 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
DE102021113470A1 (de) | 2020-05-26 | 2021-12-02 | Hyundai Mobis Co., Ltd. | Leistungshalbleitervorrichtung und verfahren zur herstellung davon |
KR102314771B1 (ko) * | 2020-06-11 | 2021-10-20 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
KR102309431B1 (ko) * | 2020-06-05 | 2021-10-05 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
KR102314770B1 (ko) * | 2020-06-02 | 2021-10-20 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
KR102369053B1 (ko) * | 2020-06-12 | 2022-03-02 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
KR102310148B1 (ko) * | 2020-05-26 | 2021-10-08 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
KR102334327B1 (ko) * | 2020-05-28 | 2021-12-02 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
KR102308154B1 (ko) * | 2020-06-09 | 2021-10-05 | 현대모비스 주식회사 | 전력 반도체 소자 및 그 제조 방법 |
JP7472090B2 (ja) | 2021-09-15 | 2024-04-22 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
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JP4538211B2 (ja) | 2003-10-08 | 2010-09-08 | トヨタ自動車株式会社 | 絶縁ゲート型半導体装置およびその製造方法 |
US7405452B2 (en) * | 2004-02-02 | 2008-07-29 | Hamza Yilmaz | Semiconductor device containing dielectrically isolated PN junction for enhanced breakdown characteristics |
JP4453671B2 (ja) * | 2006-03-08 | 2010-04-21 | トヨタ自動車株式会社 | 絶縁ゲート型半導体装置およびその製造方法 |
JP5206107B2 (ja) | 2007-09-06 | 2013-06-12 | トヨタ自動車株式会社 | 半導体装置 |
US8164139B2 (en) * | 2008-04-29 | 2012-04-24 | Force Mos Technology Co., Ltd. | MOSFET structure with guard ring |
US8598652B2 (en) * | 2009-10-01 | 2013-12-03 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device |
JP2011199041A (ja) * | 2010-03-19 | 2011-10-06 | Toshiba Corp | 半導体装置 |
DE112011104322T5 (de) * | 2010-12-10 | 2013-10-02 | Mitsubishi Electric Corporation | Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung |
US9252261B2 (en) * | 2011-04-19 | 2016-02-02 | Nissan Motor Co., Ltd. | Semiconductor device and manufacturing method of the same |
JP5878331B2 (ja) * | 2011-10-18 | 2016-03-08 | トヨタ自動車株式会社 | 半導体装置及びその製造方法 |
KR101439310B1 (ko) * | 2012-11-21 | 2014-09-11 | 도요타 지도샤(주) | 반도체 장치 |
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US9214526B2 (en) | 2015-12-15 |
US20150171175A1 (en) | 2015-06-18 |
JP2015118966A (ja) | 2015-06-25 |
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