JP5544986B2 - 貼り合わせsoiウェーハの製造方法、及び貼り合わせsoiウェーハ - Google Patents

貼り合わせsoiウェーハの製造方法、及び貼り合わせsoiウェーハ Download PDF

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JP5544986B2
JP5544986B2 JP2010085381A JP2010085381A JP5544986B2 JP 5544986 B2 JP5544986 B2 JP 5544986B2 JP 2010085381 A JP2010085381 A JP 2010085381A JP 2010085381 A JP2010085381 A JP 2010085381A JP 5544986 B2 JP5544986 B2 JP 5544986B2
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wafer
angle
silicon
single crystal
main surface
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Japanese (ja)
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JP2011216780A5 (OSRAM
JP2011216780A (ja
Inventor
正弘 加藤
哲史 岡
徳弘 小林
徹 石塚
宣彦 能登
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Shin Etsu Handotai Co Ltd
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Shin Etsu Handotai Co Ltd
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Priority to JP2010085381A priority Critical patent/JP5544986B2/ja
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority to EP11765184.4A priority patent/EP2555227B1/en
Priority to KR1020127024972A priority patent/KR101729474B1/ko
Priority to CN201180017235.6A priority patent/CN102859649B/zh
Priority to US13/582,614 priority patent/US8823130B2/en
Priority to PCT/JP2011/001175 priority patent/WO2011125282A1/ja
Publication of JP2011216780A publication Critical patent/JP2011216780A/ja
Publication of JP2011216780A5 publication Critical patent/JP2011216780A5/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/02433Crystal orientation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6758Thin-film transistors [TFT] characterised by the insulating substrates

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
JP2010085381A 2010-04-01 2010-04-01 貼り合わせsoiウェーハの製造方法、及び貼り合わせsoiウェーハ Active JP5544986B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2010085381A JP5544986B2 (ja) 2010-04-01 2010-04-01 貼り合わせsoiウェーハの製造方法、及び貼り合わせsoiウェーハ
KR1020127024972A KR101729474B1 (ko) 2010-04-01 2011-03-01 접합 soi 웨이퍼의 제조방법 및 접합 soi 웨이퍼
CN201180017235.6A CN102859649B (zh) 2010-04-01 2011-03-01 外延硅晶片及其制造方法、以及贴合soi晶片及其制造方法
US13/582,614 US8823130B2 (en) 2010-04-01 2011-03-01 Silicon epitaxial wafer, method for manufacturing the same, bonded SOI wafer and method for manufacturing the same
EP11765184.4A EP2555227B1 (en) 2010-04-01 2011-03-01 Bonded soi wafer and method for producing the same
PCT/JP2011/001175 WO2011125282A1 (ja) 2010-04-01 2011-03-01 シリコンエピタキシャルウェーハ及びその製造方法、並びに貼り合わせsoiウェーハ及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010085381A JP5544986B2 (ja) 2010-04-01 2010-04-01 貼り合わせsoiウェーハの製造方法、及び貼り合わせsoiウェーハ

Publications (3)

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JP2011216780A JP2011216780A (ja) 2011-10-27
JP2011216780A5 JP2011216780A5 (OSRAM) 2012-10-18
JP5544986B2 true JP5544986B2 (ja) 2014-07-09

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JP2010085381A Active JP5544986B2 (ja) 2010-04-01 2010-04-01 貼り合わせsoiウェーハの製造方法、及び貼り合わせsoiウェーハ

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US (1) US8823130B2 (OSRAM)
EP (1) EP2555227B1 (OSRAM)
JP (1) JP5544986B2 (OSRAM)
KR (1) KR101729474B1 (OSRAM)
CN (1) CN102859649B (OSRAM)
WO (1) WO2011125282A1 (OSRAM)

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JP6200273B2 (ja) * 2013-10-17 2017-09-20 信越半導体株式会社 貼り合わせウェーハの製造方法
US20150270344A1 (en) * 2014-03-21 2015-09-24 International Business Machines Corporation P-fet with graded silicon-germanium channel
CN103871902A (zh) 2014-03-24 2014-06-18 上海华力微电子有限公司 半导体处理工艺及半导体器件的制备方法
CN105869991B (zh) 2015-01-23 2018-05-11 上海华力微电子有限公司 用于改善SiGe厚度的均匀性的方法和系统
CN105990172B (zh) 2015-01-30 2018-07-31 上海华力微电子有限公司 嵌入式SiGe外延测试块的设计
CN105990342B (zh) 2015-02-13 2019-07-19 上海华力微电子有限公司 具有用于嵌入锗材料的成形腔的半导体器件及其制造工艺
CN104851884A (zh) 2015-04-14 2015-08-19 上海华力微电子有限公司 用于锗硅填充材料的成形腔
CN104821336B (zh) 2015-04-20 2017-12-12 上海华力微电子有限公司 用于使用保形填充层改善器件表面均匀性的方法和系统
FR3036845B1 (fr) * 2015-05-28 2017-05-26 Soitec Silicon On Insulator Procede de transfert d'une couche d'un substrat monocristallin
CN105097554B (zh) 2015-08-24 2018-12-07 上海华力微电子有限公司 用于减少高浓度外延工艺中的位错缺陷的方法和系统
EP3179093A1 (en) * 2015-12-08 2017-06-14 Winfoor AB Rotor blade for a wind turbine and a sub-member
JP6474048B2 (ja) * 2015-12-25 2019-02-27 信越半導体株式会社 エピタキシャルウェーハの製造方法
KR102181277B1 (ko) * 2016-08-10 2020-11-20 가부시키가이샤 사무코 에피택셜 실리콘 웨이퍼의 제조 방법
CN109844938B (zh) * 2016-08-12 2023-07-18 Qorvo美国公司 具有增强性能的晶片级封装
JP6662250B2 (ja) * 2016-09-07 2020-03-11 信越半導体株式会社 シリコンエピタキシャルウェーハの製造方法及び半導体デバイスの製造方法
KR102279113B1 (ko) * 2017-04-06 2021-07-16 가부시키가이샤 사무코 에피택셜 실리콘 웨이퍼의 제조 방법 및 에피택셜 실리콘 웨이퍼
US11152363B2 (en) 2018-03-28 2021-10-19 Qorvo Us, Inc. Bulk CMOS devices with enhanced performance and methods of forming the same utilizing bulk CMOS process
WO2019195428A1 (en) 2018-04-04 2019-10-10 Qorvo Us, Inc. Gallium-nitride-based module with enhanced electrical performance and process for making the same
US12046505B2 (en) 2018-04-20 2024-07-23 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation
CN112534553B (zh) 2018-07-02 2024-03-29 Qorvo美国公司 Rf半导体装置及其制造方法
US11646242B2 (en) 2018-11-29 2023-05-09 Qorvo Us, Inc. Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
US12046570B2 (en) 2019-01-23 2024-07-23 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US12046483B2 (en) 2019-01-23 2024-07-23 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US12057374B2 (en) 2019-01-23 2024-08-06 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
CN113632209A (zh) 2019-01-23 2021-11-09 Qorvo美国公司 Rf半导体装置和其制造方法
US12125825B2 (en) 2019-01-23 2024-10-22 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US11387157B2 (en) 2019-01-23 2022-07-12 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US12074086B2 (en) 2019-11-01 2024-08-27 Qorvo Us, Inc. RF devices with nanotube particles for enhanced performance and methods of forming the same
US11646289B2 (en) 2019-12-02 2023-05-09 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same
US11923238B2 (en) 2019-12-12 2024-03-05 Qorvo Us, Inc. Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive
US12129168B2 (en) 2019-12-23 2024-10-29 Qorvo Us, Inc. Microelectronics package with vertically stacked MEMS device and controller device
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Also Published As

Publication number Publication date
KR20130023207A (ko) 2013-03-07
US8823130B2 (en) 2014-09-02
KR101729474B1 (ko) 2017-04-24
EP2555227B1 (en) 2019-07-03
US20120326268A1 (en) 2012-12-27
CN102859649A (zh) 2013-01-02
EP2555227A4 (en) 2015-08-26
WO2011125282A1 (ja) 2011-10-13
EP2555227A1 (en) 2013-02-06
CN102859649B (zh) 2015-06-24
JP2011216780A (ja) 2011-10-27

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