JP4236722B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP4236722B2
JP4236722B2 JP03956098A JP3956098A JP4236722B2 JP 4236722 B2 JP4236722 B2 JP 4236722B2 JP 03956098 A JP03956098 A JP 03956098A JP 3956098 A JP3956098 A JP 3956098A JP 4236722 B2 JP4236722 B2 JP 4236722B2
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region
conductivity type
impurity
gate electrode
type impurity
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Expired - Fee Related
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JP03956098A
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Japanese (ja)
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JPH11224946A (ja
JPH11224946A5 (enExample
Inventor
昭治 宮永
伸夫 久保
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP03956098A priority Critical patent/JP4236722B2/ja
Priority to US09/246,014 priority patent/US6486014B1/en
Publication of JPH11224946A publication Critical patent/JPH11224946A/ja
Priority to US10/278,441 priority patent/US6624455B2/en
Priority to US10/667,899 priority patent/US7671425B2/en
Publication of JPH11224946A5 publication Critical patent/JPH11224946A5/ja
Application granted granted Critical
Publication of JP4236722B2 publication Critical patent/JP4236722B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/299—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
    • H10D62/307—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations the doping variations being parallel to the channel lengths
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP03956098A 1998-02-05 1998-02-05 半導体装置の作製方法 Expired - Fee Related JP4236722B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP03956098A JP4236722B2 (ja) 1998-02-05 1998-02-05 半導体装置の作製方法
US09/246,014 US6486014B1 (en) 1998-02-05 1999-02-04 Semiconductor device and method of manufacturing the same
US10/278,441 US6624455B2 (en) 1998-02-05 2002-10-22 Semiconductor device and method of manufacturing the same including drain pinned along channel width
US10/667,899 US7671425B2 (en) 1998-02-05 2003-09-23 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03956098A JP4236722B2 (ja) 1998-02-05 1998-02-05 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JPH11224946A JPH11224946A (ja) 1999-08-17
JPH11224946A5 JPH11224946A5 (enExample) 2005-08-11
JP4236722B2 true JP4236722B2 (ja) 2009-03-11

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JP03956098A Expired - Fee Related JP4236722B2 (ja) 1998-02-05 1998-02-05 半導体装置の作製方法

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US (3) US6486014B1 (enExample)
JP (1) JP4236722B2 (enExample)

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JP4236722B2 (ja) 1998-02-05 2009-03-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
US7245018B1 (en) * 1999-06-22 2007-07-17 Semiconductor Energy Laboratory Co., Ltd. Wiring material, semiconductor device provided with a wiring using the wiring material and method of manufacturing thereof
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JP4085891B2 (ja) * 2003-05-30 2008-05-14 ソニー株式会社 半導体装置およびその製造方法
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US7504327B2 (en) * 2004-06-14 2009-03-17 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing thin film semiconductor device
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JP4850470B2 (ja) * 2005-10-04 2012-01-11 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
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US20050189572A1 (en) 2005-09-01
US20030057501A1 (en) 2003-03-27
US6624455B2 (en) 2003-09-23
US7671425B2 (en) 2010-03-02
US6486014B1 (en) 2002-11-26

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