JP4003780B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP4003780B2 JP4003780B2 JP2005100737A JP2005100737A JP4003780B2 JP 4003780 B2 JP4003780 B2 JP 4003780B2 JP 2005100737 A JP2005100737 A JP 2005100737A JP 2005100737 A JP2005100737 A JP 2005100737A JP 4003780 B2 JP4003780 B2 JP 4003780B2
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- Prior art keywords
- film
- ions
- sealing film
- sealing
- semiconductor substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/60—Seals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/019—Manufacture or treatment using temporary auxiliary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/121—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/129—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P54/00—Cutting or separating of wafers, substrates or parts of devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
- H10P72/7418—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding of passive members, e.g. a chip mounting substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7422—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7432—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/654—Top-view layouts
- H10W70/656—Fan-in layouts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/922—Bond pads being integral with underlying chip-level interconnections
- H10W72/9223—Bond pads being integral with underlying chip-level interconnections with redistribution layers [RDL]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9413—Dispositions of bond pads on encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005100737A JP4003780B2 (ja) | 2004-09-17 | 2005-03-31 | 半導体装置及びその製造方法 |
| US11/226,769 US7417330B2 (en) | 2004-09-17 | 2005-09-14 | Semiconductor device packaged into chip size and manufacturing method thereof |
| TW094131762A TW200614404A (en) | 2004-09-17 | 2005-09-15 | Semiconductor device and manufacturing method thereof |
| KR1020050086569A KR100727519B1 (ko) | 2004-09-17 | 2005-09-16 | 반도체장치 및 그 제조방법 |
| US12/218,685 US7867826B2 (en) | 2004-09-17 | 2008-07-17 | Semiconductor device packaged into chip size and manufacturing method thereof |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004270646 | 2004-09-17 | ||
| JP2005100737A JP4003780B2 (ja) | 2004-09-17 | 2005-03-31 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006114867A JP2006114867A (ja) | 2006-04-27 |
| JP4003780B2 true JP4003780B2 (ja) | 2007-11-07 |
Family
ID=36073083
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005100737A Expired - Fee Related JP4003780B2 (ja) | 2004-09-17 | 2005-03-31 | 半導体装置及びその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7417330B2 (https=) |
| JP (1) | JP4003780B2 (https=) |
| KR (1) | KR100727519B1 (https=) |
| TW (1) | TW200614404A (https=) |
Families Citing this family (66)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4193897B2 (ja) | 2006-05-19 | 2008-12-10 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
| JP4812525B2 (ja) * | 2006-06-12 | 2011-11-09 | パナソニック株式会社 | 半導体装置および半導体装置の実装体および半導体装置の製造方法 |
| JP5119756B2 (ja) * | 2006-06-30 | 2013-01-16 | 株式会社デンソー | 配線基板 |
| JP2008098529A (ja) * | 2006-10-13 | 2008-04-24 | Toshiba Corp | 半導体装置及びその製造方法 |
| US8749065B2 (en) * | 2007-01-25 | 2014-06-10 | Tera Probe, Inc. | Semiconductor device comprising electromigration prevention film and manufacturing method thereof |
| JP2008227398A (ja) * | 2007-03-15 | 2008-09-25 | Sanken Electric Co Ltd | 半導体装置の製法 |
| TWI341577B (en) * | 2007-03-27 | 2011-05-01 | Unimicron Technology Corp | Semiconductor chip embedding structure |
| US7829998B2 (en) | 2007-05-04 | 2010-11-09 | Stats Chippac, Ltd. | Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer |
| US8445325B2 (en) | 2007-05-04 | 2013-05-21 | Stats Chippac, Ltd. | Package-in-package using through-hole via die on saw streets |
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| US7838424B2 (en) * | 2007-07-03 | 2010-11-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Enhanced reliability of wafer-level chip-scale packaging (WLCSP) die separation using dry etching |
| JP2009049218A (ja) * | 2007-08-21 | 2009-03-05 | Nec Electronics Corp | 半導体装置及び半導体装置の製造方法 |
| US20090079072A1 (en) * | 2007-09-21 | 2009-03-26 | Casio Computer Co., Ltd. | Semiconductor device having low dielectric insulating film and manufacturing method of the same |
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| JP4666028B2 (ja) * | 2008-03-31 | 2011-04-06 | カシオ計算機株式会社 | 半導体装置 |
| JP4538764B2 (ja) * | 2008-07-24 | 2010-09-08 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
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| JP3955712B2 (ja) | 2000-03-03 | 2007-08-08 | 株式会社ルネサステクノロジ | 半導体装置 |
| JP3455948B2 (ja) | 2000-05-19 | 2003-10-14 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
| US6391687B1 (en) | 2000-10-31 | 2002-05-21 | Fairchild Semiconductor Corporation | Column ball grid array package |
| JP2003060130A (ja) * | 2001-08-08 | 2003-02-28 | Seiko Epson Corp | 半導体装置及びその封止方法及びそれを用いた実装方法 |
| US6620651B2 (en) | 2001-10-23 | 2003-09-16 | National Starch And Chemical Investment Holding Corporation | Adhesive wafers for die attach application |
| JP2003174111A (ja) | 2001-12-06 | 2003-06-20 | Sanyo Electric Co Ltd | 半導体装置 |
| JP2003197802A (ja) | 2001-12-25 | 2003-07-11 | Kyocera Corp | 電子部品収納用容器 |
| JP2003273279A (ja) * | 2002-03-18 | 2003-09-26 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2003309228A (ja) * | 2002-04-18 | 2003-10-31 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP4243075B2 (ja) * | 2002-06-13 | 2009-03-25 | パナソニック株式会社 | 半導体装置およびその製造方法 |
| US6770971B2 (en) * | 2002-06-14 | 2004-08-03 | Casio Computer Co., Ltd. | Semiconductor device and method of fabricating the same |
| JP2004221417A (ja) * | 2003-01-16 | 2004-08-05 | Casio Comput Co Ltd | 半導体装置およびその製造方法 |
| KR100495007B1 (ko) * | 2003-02-17 | 2005-06-14 | 삼성전자주식회사 | 실리콘 웨이퍼를 이용한 기판단위 진공실장방법 |
| US6777263B1 (en) * | 2003-08-21 | 2004-08-17 | Agilent Technologies, Inc. | Film deposition to enhance sealing yield of microcap wafer-level package with vias |
| JP3915992B2 (ja) * | 2004-06-08 | 2007-05-16 | ローム株式会社 | 面実装型電子部品の製造方法 |
| JP4271625B2 (ja) * | 2004-06-30 | 2009-06-03 | 株式会社フジクラ | 半導体パッケージ及びその製造方法 |
-
2005
- 2005-03-31 JP JP2005100737A patent/JP4003780B2/ja not_active Expired - Fee Related
- 2005-09-14 US US11/226,769 patent/US7417330B2/en not_active Expired - Fee Related
- 2005-09-15 TW TW094131762A patent/TW200614404A/zh unknown
- 2005-09-16 KR KR1020050086569A patent/KR100727519B1/ko not_active Expired - Fee Related
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2008
- 2008-07-17 US US12/218,685 patent/US7867826B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| TW200614404A (en) | 2006-05-01 |
| US20060060984A1 (en) | 2006-03-23 |
| US7417330B2 (en) | 2008-08-26 |
| KR100727519B1 (ko) | 2007-06-14 |
| TWI296139B (https=) | 2008-04-21 |
| US20080286903A1 (en) | 2008-11-20 |
| KR20060051364A (ko) | 2006-05-19 |
| JP2006114867A (ja) | 2006-04-27 |
| US7867826B2 (en) | 2011-01-11 |
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