JP2016009692A - 不揮発性半導体記憶装置 - Google Patents
不揮発性半導体記憶装置 Download PDFInfo
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- JP2016009692A JP2016009692A JP2014127706A JP2014127706A JP2016009692A JP 2016009692 A JP2016009692 A JP 2016009692A JP 2014127706 A JP2014127706 A JP 2014127706A JP 2014127706 A JP2014127706 A JP 2014127706A JP 2016009692 A JP2016009692 A JP 2016009692A
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- 229910052782 aluminium Inorganic materials 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 7
- 230000000717 retained effect Effects 0.000 description 7
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 7
- 229910052721 tungsten Inorganic materials 0.000 description 7
- 239000010937 tungsten Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 239000012535 impurity Substances 0.000 description 4
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- 238000000034 method Methods 0.000 description 4
- 229910021332 silicide Inorganic materials 0.000 description 4
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910019044 CoSix Inorganic materials 0.000 description 2
- 229910005889 NiSix Inorganic materials 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910052787 antimony Inorganic materials 0.000 description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 239000000284 extract Substances 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
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- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- -1 hydrogen ions Chemical class 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000011734 sodium Substances 0.000 description 1
- 229910001415 sodium ion Inorganic materials 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1087—Substrate region of field-effect devices of field-effect transistors with insulated gate characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
2a,2b,2c,2d,2e,2f,2g,2h,2i,2j,2k,2l メモリセル
4 コントロールキャパシタ
5 電荷注入トランジスタ
6 スイッチトランジスタ
7 読み出しトランジスタ
8 電荷引抜トランジスタ
10a,10b フローティングゲート
24,25,26,27 可動電荷収集素子層(可動電荷収集素子)
CC1,CC2,CC3,CC4 可動電荷収集コンタクト(可動電荷収集素子)
32 可動電荷収集第1配線層(可動電荷収集素子)
33 可動電荷収集層間コンタクト(可動電荷収集素子)
35 可動電荷収集第2配線層(可動電荷収集素子)
Wa1,Wa2,Wa3 第1導電型ウェル(ウェル)
Wb1,Wb2 第2導電型ウェル(ウェル)
EI 素子分離層
Claims (9)
- 絶縁層に覆われて互いに電気的に絶縁された複数のフローティングゲートを備え、前記フローティングゲート毎にメモリセルを構成した不揮発性半導体記憶装置であって、
行方向にて隣り合う前記フローティングゲート間の列間領域、およびまたは列方向にて隣り合う前記フローティングゲート間の行間領域に、前記絶縁層内に存在する可動電荷を引き寄せて、前記フローティングゲートへの該可動電荷の停留を抑制させる可動電荷収集素子が設けられている
ことを特徴とする不揮発性半導体記憶装置。 - 前記可動電荷収集素子は、
一の前記フローティングゲートまでの距離と、一の前記フローティングゲートと隣り合う他の前記フローティングゲートまでの距離とが同じ距離に選定されている
ことを特徴とする請求項1記載の不揮発性半導体記憶装置。 - 前記可動電荷収集素子は、
コントロールキャパシタ、電荷注入トランジスタ、電荷引抜トランジスタ、および読み出しトランジスタが形成される活性領域以外のウェル表面に埋込形成された可動電荷収集素子層である
ことを特徴とする請求項1または2記載の不揮発性半導体記憶装置。 - 前記可動電荷収集素子層の表面には可動電荷収集コンタクトが立設されている
ことを特徴とする請求項3記載の不揮発性半導体記憶装置。 - 前記可動電荷収集素子は、
素子分離層の表面に立設された可動電荷収集コンタクトである
ことを特徴とする請求項1または2記載の不揮発性半導体記憶装置。 - ウェル上方には、前記メモリセルに対して電圧を印加する配線が配置された第1配線層を有しており、
前記可動電荷収集コンタクトの先端には、前記可動電荷収集素子として可動電荷収集第1配線層を有し、該可動電荷収集第1配線層が前記第1配線層の高さ位置に形成されている
ことを特徴とする請求項4または5記載の不揮発性半導体記憶装置。 - 前記可動電荷収集第1配線層には、前記可動電荷収集素子として可動電荷収集層間コンタクトが立設されている
ことを特徴とする請求項6記載の不揮発性半導体記憶装置。 - 前記第1配線層の上方には、前記メモリセルに電圧を印加する他の配線が配置された第2配線層を有しており、
前記可動電荷収集層間コンタクトの先端には、前記可動電荷収集素子として可動電荷収集第2配線層を有し、該可動電荷収集第2配線層が前記第2配線層の高さ位置に形成されている
ことを特徴とする請求項7記載の不揮発性半導体記憶装置。 - 前記可動電荷が蓄積された前記フローティングゲートに電圧を印加して、前記フローティングゲートと前記可動電荷収集素子との電圧関係を調整することにより、前記可動電荷を該フローティングゲートから遠ざけて前記可動電荷収集素子に引き寄せる
ことを特徴する請求項1〜8のうちいずれか1項記載の不揮発性半導体記憶装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014127706A JP6286292B2 (ja) | 2014-06-20 | 2014-06-20 | 不揮発性半導体記憶装置 |
PCT/JP2015/067412 WO2015194582A1 (ja) | 2014-06-20 | 2015-06-17 | 不揮発性半導体記憶装置 |
US15/319,875 US10680001B2 (en) | 2014-06-20 | 2015-06-17 | Non-volatile semiconductor memory device |
TW104119865A TWI646662B (zh) | 2014-06-20 | 2015-06-18 | Non-volatile semiconductor memory device |
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JP2014127706A JP6286292B2 (ja) | 2014-06-20 | 2014-06-20 | 不揮発性半導体記憶装置 |
Publications (3)
Publication Number | Publication Date |
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JP2016009692A true JP2016009692A (ja) | 2016-01-18 |
JP2016009692A5 JP2016009692A5 (ja) | 2017-07-20 |
JP6286292B2 JP6286292B2 (ja) | 2018-02-28 |
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JP2014127706A Active JP6286292B2 (ja) | 2014-06-20 | 2014-06-20 | 不揮発性半導体記憶装置 |
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US (1) | US10680001B2 (ja) |
JP (1) | JP6286292B2 (ja) |
TW (1) | TWI646662B (ja) |
WO (1) | WO2015194582A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018101767A (ja) * | 2016-01-19 | 2018-06-28 | 力旺電子股▲ふん▼有限公司eMemory Technology Inc. | 消去デバイスを有する単一ポリ不揮発性メモリセルの構造 |
JP2021019029A (ja) * | 2019-07-18 | 2021-02-15 | ローム株式会社 | 不揮発性半導体記憶装置 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10903705B2 (en) * | 2016-08-09 | 2021-01-26 | Nidec Corporation | Motor |
KR20180120870A (ko) | 2017-04-27 | 2018-11-07 | 삼성전자주식회사 | 반도체 소자 |
KR20220095510A (ko) | 2020-12-30 | 2022-07-07 | 에스케이하이닉스 주식회사 | 비휘발성 메모리 장치 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10189766A (ja) * | 1996-10-29 | 1998-07-21 | Hitachi Ltd | 半導体集積回路装置およびその製造方法ならびに半導体ウエハおよびその製造方法 |
JP2001135816A (ja) * | 1999-11-10 | 2001-05-18 | Nec Corp | 半導体装置及びその製造方法 |
JP2004031677A (ja) * | 2002-06-26 | 2004-01-29 | Nikon Corp | 固体撮像装置 |
JP2005142571A (ja) * | 2003-11-05 | 2005-06-02 | Magnachip Semiconductor Ltd | 不揮発性メモリ素子及びその製造方法 |
JP2014086435A (ja) * | 2012-10-19 | 2014-05-12 | Floadia Co Ltd | 不揮発性半導体記憶装置 |
Family Cites Families (61)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0713858B2 (ja) * | 1988-08-30 | 1995-02-15 | 三菱電機株式会社 | 半導体記憶装置 |
US5204835A (en) * | 1990-06-13 | 1993-04-20 | Waferscale Integration Inc. | Eprom virtual ground array |
JPH07123145B2 (ja) * | 1990-06-27 | 1995-12-25 | 株式会社東芝 | 半導体集積回路 |
KR100473308B1 (ko) * | 1995-01-31 | 2005-03-14 | 가부시끼가이샤 히다치 세이사꾸쇼 | 불휘발성 메모리 장치 |
US5579259A (en) * | 1995-05-31 | 1996-11-26 | Sandisk Corporation | Low voltage erase of a flash EEPROM system having a common erase electrode for two individually erasable sectors |
US5903495A (en) * | 1996-03-18 | 1999-05-11 | Kabushiki Kaisha Toshiba | Semiconductor device and memory system |
KR100215866B1 (ko) * | 1996-04-12 | 1999-08-16 | 구본준 | 커패시터가 없는 디램 및 그의 제조방법 |
TW428319B (en) * | 1996-05-31 | 2001-04-01 | United Microelectronics Corp | High-density contactless flash memory on silicon above an insulator and its manufacturing method |
JPH1187659A (ja) * | 1997-09-05 | 1999-03-30 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
JP3633853B2 (ja) * | 2000-06-09 | 2005-03-30 | Necエレクトロニクス株式会社 | フラッシュメモリの消去動作制御方法およびフラッシュメモリの消去動作制御装置 |
US6438030B1 (en) * | 2000-08-15 | 2002-08-20 | Motorola, Inc. | Non-volatile memory, method of manufacture, and method of programming |
JP3916862B2 (ja) * | 2000-10-03 | 2007-05-23 | 株式会社東芝 | 不揮発性半導体メモリ装置 |
JP2002368144A (ja) * | 2001-06-13 | 2002-12-20 | Hitachi Ltd | 不揮発性半導体記憶装置およびその製造方法 |
US6556471B2 (en) * | 2001-06-27 | 2003-04-29 | Intel Corporation | VDD modulated SRAM for highly scaled, high performance cache |
US6925008B2 (en) * | 2001-09-29 | 2005-08-02 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device with a memory unit including not more than two memory cell transistors |
TW536818B (en) * | 2002-05-03 | 2003-06-11 | Ememory Technology Inc | Single-poly EEPROM |
JP3906177B2 (ja) * | 2002-05-10 | 2007-04-18 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US7470944B2 (en) | 2002-06-26 | 2008-12-30 | Nikon Corporation | Solid-state image sensor |
JP2004241558A (ja) * | 2003-02-05 | 2004-08-26 | Toshiba Corp | 不揮発性半導体記憶装置及びその製造方法、半導体集積回路及び不揮発性半導体記憶装置システム |
US6909639B2 (en) * | 2003-04-22 | 2005-06-21 | Nexflash Technologies, Inc. | Nonvolatile memory having bit line discharge, and method of operation thereof |
JP4537680B2 (ja) * | 2003-08-04 | 2010-09-01 | 株式会社東芝 | 不揮発性半導体記憶装置及びその動作方法、製造方法、半導体集積回路及びシステム |
JP2005175411A (ja) | 2003-12-12 | 2005-06-30 | Genusion:Kk | 半導体装置、及びその製造方法 |
US7538338B2 (en) * | 2004-09-03 | 2009-05-26 | Unity Semiconductor Corporation | Memory using variable tunnel barrier widths |
US7042044B2 (en) * | 2004-02-18 | 2006-05-09 | Koucheng Wu | Nor-type channel-program channel-erase contactless flash memory on SOI |
US7046552B2 (en) * | 2004-03-17 | 2006-05-16 | Actrans System Incorporation, Usa | Flash memory with enhanced program and erase coupling and process of fabricating the same |
JP2005268621A (ja) * | 2004-03-19 | 2005-09-29 | Toshiba Corp | 半導体集積回路装置 |
JP4331053B2 (ja) * | 2004-05-27 | 2009-09-16 | 株式会社東芝 | 半導体記憶装置 |
JP2006019570A (ja) * | 2004-07-02 | 2006-01-19 | Renesas Technology Corp | 不揮発性半導体記憶装置およびその製造方法 |
JP4709523B2 (ja) * | 2004-10-14 | 2011-06-22 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US7528447B2 (en) * | 2005-04-06 | 2009-05-05 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory and method for controlling a non-volatile semiconductor memory |
JP4591691B2 (ja) * | 2005-06-07 | 2010-12-01 | セイコーエプソン株式会社 | 半導体装置 |
KR100833427B1 (ko) * | 2005-06-30 | 2008-05-29 | 주식회사 하이닉스반도체 | 데이터 보존 특성을 향상시킬 수 있는 플래시 메모리 소자 |
US7495294B2 (en) * | 2005-12-21 | 2009-02-24 | Sandisk Corporation | Flash devices with shared word lines |
US7951669B2 (en) * | 2006-04-13 | 2011-05-31 | Sandisk Corporation | Methods of making flash memory cell arrays having dual control gates per memory cell charge storage element |
US20070247915A1 (en) * | 2006-04-21 | 2007-10-25 | Intersil Americas Inc. | Multiple time programmable (MTP) PMOS floating gate-based non-volatile memory device for a general-purpose CMOS technology with thick gate oxide |
US7598561B2 (en) * | 2006-05-05 | 2009-10-06 | Silicon Storage Technolgy, Inc. | NOR flash memory |
JP2008034456A (ja) * | 2006-07-26 | 2008-02-14 | Toshiba Corp | 不揮発性半導体記憶装置 |
US8750041B2 (en) * | 2006-09-05 | 2014-06-10 | Semiconductor Components Industries, Llc | Scalable electrically erasable and programmable memory |
US8325530B2 (en) * | 2006-10-03 | 2012-12-04 | Macronix International Co., Ltd. | Cell operation methods using gate-injection for floating gate NAND flash memory |
US7903465B2 (en) * | 2007-04-24 | 2011-03-08 | Intersil Americas Inc. | Memory array of floating gate-based non-volatile memory cells |
US8320191B2 (en) * | 2007-08-30 | 2012-11-27 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
US7800159B2 (en) * | 2007-10-24 | 2010-09-21 | Silicon Storage Technology, Inc. | Array of contactless non-volatile memory cells |
US8072811B2 (en) * | 2008-05-07 | 2011-12-06 | Aplus Flash Technology, Inc, | NAND based NMOS NOR flash memory cell, a NAND based NMOS NOR flash memory array, and a method of forming a NAND based NMOS NOR flash memory array |
WO2010067407A1 (ja) * | 2008-12-08 | 2010-06-17 | ハングリー・シー・アセッツ・エル・エル・ピー | 半導体記憶デバイスおよびその製造方法 |
US8026544B2 (en) * | 2009-03-30 | 2011-09-27 | Sandisk Technologies Inc. | Fabricating and operating a memory array having a multi-level cell region and a single-level cell region |
JP5306036B2 (ja) * | 2009-04-21 | 2013-10-02 | 株式会社東芝 | 不揮発性半導体記憶装置およびその製造方法 |
US7919368B2 (en) * | 2009-05-29 | 2011-04-05 | Texas Instruments Incorporated | Area-efficient electrically erasable programmable memory cell |
JP2011009454A (ja) * | 2009-06-25 | 2011-01-13 | Renesas Electronics Corp | 半導体装置 |
US8958245B2 (en) * | 2010-06-17 | 2015-02-17 | Ememory Technology Inc. | Logic-based multiple time programming memory cell compatible with generic CMOS processes |
WO2012120599A1 (ja) * | 2011-03-04 | 2012-09-13 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP2012204896A (ja) * | 2011-03-24 | 2012-10-22 | Toshiba Corp | 不揮発プログラマブルロジックスイッチ |
JP2013077780A (ja) * | 2011-09-30 | 2013-04-25 | Seiko Instruments Inc | 半導体記憶装置及び半導体記憶素子 |
US9025358B2 (en) * | 2011-10-13 | 2015-05-05 | Zeno Semiconductor Inc | Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating |
US8488388B2 (en) * | 2011-11-01 | 2013-07-16 | Silicon Storage Technology, Inc. | Method of programming a split gate non-volatile floating gate memory cell having a separate erase gate |
US8981445B2 (en) * | 2012-02-28 | 2015-03-17 | Texas Instruments Incorporated | Analog floating-gate memory with N-channel and P-channel MOS transistors |
US9218881B2 (en) * | 2012-10-23 | 2015-12-22 | Sandisk Technologies Inc. | Flash memory blocks with extended data retention |
US9159406B2 (en) * | 2012-11-02 | 2015-10-13 | Sandisk Technologies Inc. | Single-level cell endurance improvement with pre-defined blocks |
KR101950357B1 (ko) * | 2012-11-30 | 2019-02-20 | 에스케이하이닉스 주식회사 | 비휘발성 메모리 장치 및 그 제조방법 |
JP6078327B2 (ja) * | 2012-12-19 | 2017-02-08 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US9029922B2 (en) * | 2013-03-09 | 2015-05-12 | Zeno Semiconductor, Inc. | Memory device comprising electrically floating body transistor |
US9406689B2 (en) * | 2013-07-31 | 2016-08-02 | Qualcomm Incorporated | Logic finFET high-K/conductive gate embedded multiple time programmable flash memory |
-
2014
- 2014-06-20 JP JP2014127706A patent/JP6286292B2/ja active Active
-
2015
- 2015-06-17 WO PCT/JP2015/067412 patent/WO2015194582A1/ja active Application Filing
- 2015-06-17 US US15/319,875 patent/US10680001B2/en active Active
- 2015-06-18 TW TW104119865A patent/TWI646662B/zh active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10189766A (ja) * | 1996-10-29 | 1998-07-21 | Hitachi Ltd | 半導体集積回路装置およびその製造方法ならびに半導体ウエハおよびその製造方法 |
JP2001135816A (ja) * | 1999-11-10 | 2001-05-18 | Nec Corp | 半導体装置及びその製造方法 |
JP2004031677A (ja) * | 2002-06-26 | 2004-01-29 | Nikon Corp | 固体撮像装置 |
JP2005142571A (ja) * | 2003-11-05 | 2005-06-02 | Magnachip Semiconductor Ltd | 不揮発性メモリ素子及びその製造方法 |
JP2014086435A (ja) * | 2012-10-19 | 2014-05-12 | Floadia Co Ltd | 不揮発性半導体記憶装置 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2018101767A (ja) * | 2016-01-19 | 2018-06-28 | 力旺電子股▲ふん▼有限公司eMemory Technology Inc. | 消去デバイスを有する単一ポリ不揮発性メモリセルの構造 |
US10038003B2 (en) | 2016-01-19 | 2018-07-31 | Ememory Technology Inc. | Single-poly nonvolatile memory cell structure having an erase device |
JP2021019029A (ja) * | 2019-07-18 | 2021-02-15 | ローム株式会社 | 不揮発性半導体記憶装置 |
JP7462389B2 (ja) | 2019-07-18 | 2024-04-05 | ローム株式会社 | 不揮発性半導体記憶装置 |
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US10680001B2 (en) | 2020-06-09 |
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WO2015194582A1 (ja) | 2015-12-23 |
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JP6286292B2 (ja) | 2018-02-28 |
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