JP2007536736A - チャネルキャリア移動度向上のための高応力ライナーを備えたSi−Geに基づく半導体デバイス - Google Patents
チャネルキャリア移動度向上のための高応力ライナーを備えたSi−Geに基づく半導体デバイス Download PDFInfo
- Publication number
- JP2007536736A JP2007536736A JP2007511390A JP2007511390A JP2007536736A JP 2007536736 A JP2007536736 A JP 2007536736A JP 2007511390 A JP2007511390 A JP 2007511390A JP 2007511390 A JP2007511390 A JP 2007511390A JP 2007536736 A JP2007536736 A JP 2007536736A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- transistor
- stress
- liner
- gate electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 29
- 229910008310 Si—Ge Inorganic materials 0.000 title abstract 2
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims description 38
- 238000000034 method Methods 0.000 claims description 34
- 229910052710 silicon Inorganic materials 0.000 claims description 28
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 27
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 26
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 26
- 239000010703 silicon Substances 0.000 claims description 26
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 24
- 125000006850 spacer group Chemical group 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 14
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 9
- 150000004767 nitrides Chemical class 0.000 claims description 8
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 7
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- 230000001747 exhibiting effect Effects 0.000 claims 8
- 239000010410 layer Substances 0.000 description 126
- 229910021334 nickel silicide Inorganic materials 0.000 description 10
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 10
- 230000008901 benefit Effects 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 239000010941 cobalt Substances 0.000 description 3
- 229910017052 cobalt Inorganic materials 0.000 description 3
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 3
- 229910052732 germanium Inorganic materials 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 241000293849 Cordylanthus Species 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- PEUPIGGLJVUNEU-UHFFFAOYSA-N nickel silicon Chemical compound [Si].[Ni] PEUPIGGLJVUNEU-UHFFFAOYSA-N 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- -1 structures Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/792—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/015—Manufacture or treatment removing at least parts of gate spacers, e.g. disposable spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0172—Manufacturing their gate conductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/838,330 US7053400B2 (en) | 2004-05-05 | 2004-05-05 | Semiconductor device based on Si-Ge with high stress liner for enhanced channel carrier mobility |
| PCT/US2005/013239 WO2005112127A1 (en) | 2004-05-05 | 2005-04-19 | SEMICONDUCTOR DEVICE BASED ON Si-Ge WITH HIGH STRESS LINER FOR ENHANCED CHANNEL CARRIER MOBILITY |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007536736A true JP2007536736A (ja) | 2007-12-13 |
| JP2007536736A5 JP2007536736A5 (enExample) | 2008-06-19 |
Family
ID=34966169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007511390A Pending JP2007536736A (ja) | 2004-05-05 | 2005-04-19 | チャネルキャリア移動度向上のための高応力ライナーを備えたSi−Geに基づく半導体デバイス |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US7053400B2 (enExample) |
| JP (1) | JP2007536736A (enExample) |
| CN (1) | CN100533766C (enExample) |
| DE (1) | DE112005001029B4 (enExample) |
| GB (1) | GB2429116B (enExample) |
| TW (1) | TWI411100B (enExample) |
| WO (1) | WO2005112127A1 (enExample) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006165369A (ja) * | 2004-12-09 | 2006-06-22 | Fujitsu Ltd | 応力蓄積絶縁膜の製造方法及び半導体装置 |
| JP2007200961A (ja) * | 2006-01-24 | 2007-08-09 | Sharp Corp | 半導体装置およびその製造方法 |
| JP2008504677A (ja) | 2004-06-24 | 2008-02-14 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 改良した歪みシリコンcmosデバイスおよび方法 |
| JP2008041981A (ja) * | 2006-08-08 | 2008-02-21 | Fujitsu Ltd | 半導体装置の製造方法 |
| JP2008522405A (ja) * | 2004-11-16 | 2008-06-26 | アプライド マテリアルズ インコーポレイテッド | 半導体のための引張り及び圧縮応力をもたせた物質 |
| JP2008306132A (ja) * | 2007-06-11 | 2008-12-18 | Renesas Technology Corp | 半導体装置の製造方法 |
| JP2009516363A (ja) * | 2005-11-14 | 2009-04-16 | インターナショナル・ビジネス・マシーンズ・コーポレーション | スペーサレスfet及びデュアル・ライナ法による歪み強化を増加させる構造体及び方法 |
| JP2009522796A (ja) * | 2006-01-09 | 2009-06-11 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 同じ基板上に同じ導電型の低性能及び高性能デバイスを有する半導体デバイス構造体 |
| JP2010531537A (ja) * | 2007-01-19 | 2010-09-24 | フリースケール セミコンダクター インコーポレイテッド | 半導体デバイス用の多層シリコン窒化膜を堆積する、半導体デバイスの製造方法、および半導体デバイス |
| JP2011129825A (ja) * | 2009-12-21 | 2011-06-30 | Renesas Electronics Corp | 半導体装置、および、半導体装置の製造方法 |
| JP4818352B2 (ja) * | 2005-04-01 | 2011-11-16 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 堆積ストレッサ材料の応力レベルを上昇させる方法、及び半導体構造体を形成する方法 |
Families Citing this family (100)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070015344A1 (en) * | 2003-06-26 | 2007-01-18 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Strained Superlattice Between at Least One Pair of Spaced Apart Stress Regions |
| US20070020833A1 (en) * | 2003-06-26 | 2007-01-25 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer |
| US7531828B2 (en) * | 2003-06-26 | 2009-05-12 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions |
| US20070010040A1 (en) * | 2003-06-26 | 2007-01-11 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Strained Superlattice Layer Above a Stress Layer |
| US7612366B2 (en) * | 2003-06-26 | 2009-11-03 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice layer above a stress layer |
| US7598515B2 (en) * | 2003-06-26 | 2009-10-06 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice and overlying stress layer and related methods |
| US20070020860A1 (en) * | 2003-06-26 | 2007-01-25 | Rj Mears, Llc | Method for Making Semiconductor Device Including a Strained Superlattice and Overlying Stress Layer and Related Methods |
| JP2005223109A (ja) * | 2004-02-05 | 2005-08-18 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| DE102004026142B3 (de) * | 2004-05-28 | 2006-02-09 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Steuern der mechanischen Spannung in einem Kanalgebiet durch das Entfernen von Abstandselementen und ein gemäß dem Verfahren gefertigtes Halbleiterbauelement |
| US7495266B2 (en) * | 2004-06-16 | 2009-02-24 | Massachusetts Institute Of Technology | Strained silicon-on-silicon by wafer bonding and layer transfer |
| DE102004031710B4 (de) * | 2004-06-30 | 2007-12-27 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Herstellen unterschiedlich verformter Halbleitergebiete und Transistorpaar in unterschiedlich verformten Halbleitergebieten |
| JP2008508713A (ja) * | 2004-07-27 | 2008-03-21 | エージェンシー フォー サイエンス,テクノロジー アンド リサーチ | 高信頼性コンタクト |
| US7402535B2 (en) * | 2004-07-28 | 2008-07-22 | Texas Instruments Incorporated | Method of incorporating stress into a transistor channel by use of a backside layer |
| KR100702307B1 (ko) * | 2004-07-29 | 2007-03-30 | 주식회사 하이닉스반도체 | 반도체 소자의 디램 및 그 제조 방법 |
| JP2006060045A (ja) * | 2004-08-20 | 2006-03-02 | Toshiba Corp | 半導体装置 |
| DE102004047631B4 (de) * | 2004-09-30 | 2010-02-04 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Ausbilden einer Halbleiterstruktur in Form eines Feldeffekttransistors mit einem verspannten Kanalgebiet und Halbleiterstruktur |
| US7799683B2 (en) * | 2004-11-08 | 2010-09-21 | Tel Epion, Inc. | Copper interconnect wiring and method and apparatus for forming thereof |
| US7173312B2 (en) * | 2004-12-15 | 2007-02-06 | International Business Machines Corporation | Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification |
| US20060151843A1 (en) * | 2005-01-12 | 2006-07-13 | International Business Machines Corporation | Hot carrier degradation reduction using ion implantation of silicon nitride layer |
| US20060160317A1 (en) * | 2005-01-18 | 2006-07-20 | International Business Machines Corporation | Structure and method to enhance stress in a channel of cmos devices using a thin gate |
| US7432553B2 (en) * | 2005-01-19 | 2008-10-07 | International Business Machines Corporation | Structure and method to optimize strain in CMOSFETs |
| US20060172556A1 (en) * | 2005-02-01 | 2006-08-03 | Texas Instruments Incorporated | Semiconductor device having a high carbon content strain inducing film and a method of manufacture therefor |
| JP4369379B2 (ja) * | 2005-02-18 | 2009-11-18 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
| KR100585180B1 (ko) * | 2005-02-21 | 2006-05-30 | 삼성전자주식회사 | 동작 전류가 개선된 반도체 메모리 소자 및 그 제조방법 |
| US7615426B2 (en) * | 2005-02-22 | 2009-11-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | PMOS transistor with discontinuous CESL and method of fabrication |
| US7429775B1 (en) | 2005-03-31 | 2008-09-30 | Xilinx, Inc. | Method of fabricating strain-silicon CMOS |
| US7445978B2 (en) * | 2005-05-04 | 2008-11-04 | Chartered Semiconductor Manufacturing, Ltd | Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS |
| JP2006324278A (ja) * | 2005-05-17 | 2006-11-30 | Sony Corp | 半導体装置およびその製造方法 |
| TWI259534B (en) * | 2005-05-20 | 2006-08-01 | Ind Tech Res Inst | Method for fabricating semiconductor device |
| US7423283B1 (en) * | 2005-06-07 | 2008-09-09 | Xilinx, Inc. | Strain-silicon CMOS using etch-stop layer and method of manufacture |
| US7829978B2 (en) * | 2005-06-29 | 2010-11-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Closed loop CESL high performance CMOS device |
| US20070018259A1 (en) * | 2005-07-21 | 2007-01-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dual gate electrode metal oxide semciconductor transistors |
| US7358551B2 (en) * | 2005-07-21 | 2008-04-15 | International Business Machines Corporation | Structure and method for improved stress and yield in pFETs with embedded SiGe source/drain regions |
| US7902008B2 (en) * | 2005-08-03 | 2011-03-08 | Globalfoundries Inc. | Methods for fabricating a stressed MOS device |
| US7655991B1 (en) | 2005-09-08 | 2010-02-02 | Xilinx, Inc. | CMOS device with stressed sidewall spacers |
| JP4940682B2 (ja) * | 2005-09-09 | 2012-05-30 | 富士通セミコンダクター株式会社 | 電界効果トランジスタおよびその製造方法 |
| US7936006B1 (en) | 2005-10-06 | 2011-05-03 | Xilinx, Inc. | Semiconductor device with backfilled isolation |
| US20070105368A1 (en) * | 2005-11-07 | 2007-05-10 | Texas Instruments Inc. | Method of fabricating a microelectronic device using electron beam treatment to induce stress |
| US7550356B2 (en) * | 2005-11-14 | 2009-06-23 | United Microelectronics Corp. | Method of fabricating strained-silicon transistors |
| US7977185B2 (en) * | 2005-11-22 | 2011-07-12 | International Business Machines Corporation | Method and apparatus for post silicide spacer removal |
| CN1979786B (zh) * | 2005-11-29 | 2010-09-15 | 联华电子股份有限公司 | 制作应变硅晶体管的方法 |
| US8407634B1 (en) * | 2005-12-01 | 2013-03-26 | Synopsys Inc. | Analysis of stress impact on transistor performance |
| WO2007067589A2 (en) * | 2005-12-05 | 2007-06-14 | Massachusetts Institute Of Technology | Insulated gate devices and method of making same |
| US8729635B2 (en) * | 2006-01-18 | 2014-05-20 | Macronix International Co., Ltd. | Semiconductor device having a high stress material layer |
| US7384833B2 (en) * | 2006-02-07 | 2008-06-10 | Cypress Semiconductor Corporation | Stress liner for integrated circuits |
| US20070224745A1 (en) * | 2006-03-21 | 2007-09-27 | Hui-Chen Chang | Semiconductor device and fabricating method thereof |
| US7566605B2 (en) * | 2006-03-31 | 2009-07-28 | Intel Corporation | Epitaxial silicon germanium for reduced contact resistance in field-effect transistors |
| US7514370B2 (en) * | 2006-05-19 | 2009-04-07 | International Business Machines Corporation | Compressive nitride film and method of manufacturing thereof |
| JP5182703B2 (ja) * | 2006-06-08 | 2013-04-17 | 日本電気株式会社 | 半導体装置 |
| US8063397B2 (en) * | 2006-06-28 | 2011-11-22 | Massachusetts Institute Of Technology | Semiconductor light-emitting structure and graded-composition substrate providing yellow-green light emission |
| JP2008028357A (ja) * | 2006-07-24 | 2008-02-07 | Hynix Semiconductor Inc | 半導体素子及びその製造方法 |
| KR100725376B1 (ko) * | 2006-07-31 | 2007-06-07 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| US20080044967A1 (en) * | 2006-08-19 | 2008-02-21 | Chartered Semiconductor Manufacturing Ltd. | Integrated circuit system having strained transistor |
| US7390729B2 (en) * | 2006-09-21 | 2008-06-24 | United Microelectronics Corp. | Method of fabricating a semiconductor device |
| KR100752201B1 (ko) * | 2006-09-22 | 2007-08-27 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
| KR100773352B1 (ko) * | 2006-09-25 | 2007-11-05 | 삼성전자주식회사 | 스트레스 인가 모스 트랜지스터를 갖는 반도체소자의제조방법 및 그에 의해 제조된 반도체소자 |
| US20080083955A1 (en) * | 2006-10-04 | 2008-04-10 | Kanarsky Thomas S | Intrinsically stressed liner and fabrication methods thereof |
| US7651915B2 (en) * | 2006-10-12 | 2010-01-26 | Infineon Technologies Ag | Strained semiconductor device and method of making same |
| US20080124855A1 (en) * | 2006-11-05 | 2008-05-29 | Johnny Widodo | Modulation of Stress in ESL SiN Film through UV Curing to Enhance both PMOS and NMOS Transistor Performance |
| US8039284B2 (en) * | 2006-12-18 | 2011-10-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual metal silicides for lowering contact resistance |
| US7538339B2 (en) * | 2006-12-22 | 2009-05-26 | International Business Machines Corporation | Scalable strained FET device and method of fabricating the same |
| WO2008081753A1 (ja) * | 2007-01-05 | 2008-07-10 | Nec Corporation | Mis型電界効果トランジスタおよびその製造方法 |
| US7485508B2 (en) * | 2007-01-26 | 2009-02-03 | International Business Machines Corporation | Two-sided semiconductor-on-insulator structures and methods of manufacturing the same |
| US20080179638A1 (en) * | 2007-01-31 | 2008-07-31 | International Business Machines Corporation | Gap fill for underlapped dual stress liners |
| KR101007242B1 (ko) * | 2007-02-22 | 2011-01-13 | 후지쯔 세미컨덕터 가부시키가이샤 | 반도체 장치 및 그 제조 방법 |
| US20080203485A1 (en) * | 2007-02-28 | 2008-08-28 | International Business Machines Corporation | Strained metal gate structure for cmos devices with improved channel mobility and methods of forming the same |
| US7795089B2 (en) | 2007-02-28 | 2010-09-14 | Freescale Semiconductor, Inc. | Forming a semiconductor device having epitaxially grown source and drain regions |
| JP5310543B2 (ja) * | 2007-03-27 | 2013-10-09 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| US7763945B2 (en) * | 2007-04-18 | 2010-07-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Strained spacer design for protecting high-K gate dielectric |
| US7611939B2 (en) * | 2007-05-07 | 2009-11-03 | Texas Instruments Incorporated | Semiconductor device manufactured using a laminated stress layer |
| US20090050972A1 (en) * | 2007-08-20 | 2009-02-26 | Richard Lindsay | Strained Semiconductor Device and Method of Making Same |
| US8115254B2 (en) | 2007-09-25 | 2012-02-14 | International Business Machines Corporation | Semiconductor-on-insulator structures including a trench containing an insulator stressor plug and method of fabricating same |
| US20090095991A1 (en) * | 2007-10-11 | 2009-04-16 | International Business Machines Corporation | Method of forming strained mosfet devices using phase transformable materials |
| US8013367B2 (en) * | 2007-11-08 | 2011-09-06 | International Business Machines Corporation | Structure and method for compact long-channel FETs |
| US8492846B2 (en) | 2007-11-15 | 2013-07-23 | International Business Machines Corporation | Stress-generating shallow trench isolation structure having dual composition |
| US20090176356A1 (en) * | 2008-01-09 | 2009-07-09 | Advanced Micro Devices, Inc. | Methods for fabricating semiconductor devices using thermal gradient-inducing films |
| JP2009277908A (ja) * | 2008-05-15 | 2009-11-26 | Toshiba Corp | 半導体装置の製造方法及び半導体装置 |
| US8999863B2 (en) * | 2008-06-05 | 2015-04-07 | Globalfoundries Singapore Pte. Ltd. | Stress liner for stress engineering |
| US7994038B2 (en) * | 2009-02-05 | 2011-08-09 | Globalfoundries Inc. | Method to reduce MOL damage on NiSi |
| US8298876B2 (en) * | 2009-03-27 | 2012-10-30 | International Business Machines Corporation | Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices |
| KR101142334B1 (ko) * | 2009-06-04 | 2012-05-17 | 에스케이하이닉스 주식회사 | 반도체 소자 및 그의 제조방법 |
| US8735981B2 (en) * | 2009-06-17 | 2014-05-27 | Infineon Technologies Austria Ag | Transistor component having an amorphous semi-isolating channel control layer |
| US8318570B2 (en) * | 2009-12-01 | 2012-11-27 | International Business Machines Corporation | Enhancing MOSFET performance by optimizing stress properties |
| US8338260B2 (en) | 2010-04-14 | 2012-12-25 | International Business Machines Corporation | Raised source/drain structure for enhanced strain coupling from stress liner |
| US8216905B2 (en) | 2010-04-27 | 2012-07-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Stress engineering to reduce dark current of CMOS image sensors |
| US9461169B2 (en) * | 2010-05-28 | 2016-10-04 | Globalfoundries Inc. | Device and method for fabricating thin semiconductor channel and buried strain memorization layer |
| US8513765B2 (en) * | 2010-07-19 | 2013-08-20 | International Business Machines Corporation | Formation method and structure for a well-controlled metallic source/drain semiconductor device |
| JP5431372B2 (ja) * | 2011-01-05 | 2014-03-05 | 株式会社東芝 | 半導体装置およびその製造方法 |
| US8877614B2 (en) * | 2011-10-13 | 2014-11-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Spacer for semiconductor structure contact |
| CN103165454B (zh) * | 2011-12-12 | 2016-08-17 | 中芯国际集成电路制造(北京)有限公司 | 半导体器件及其制造方法 |
| CN102623409B (zh) * | 2012-04-17 | 2014-08-13 | 上海华力微电子有限公司 | 一种形成双应力层氮化硅薄膜的方法 |
| US8624324B1 (en) * | 2012-08-10 | 2014-01-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Connecting through vias to devices |
| US9190346B2 (en) | 2012-08-31 | 2015-11-17 | Synopsys, Inc. | Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits |
| US9817928B2 (en) | 2012-08-31 | 2017-11-14 | Synopsys, Inc. | Latch-up suppression and substrate noise coupling reduction through a substrate back-tie for 3D integrated circuits |
| US8937369B2 (en) * | 2012-10-01 | 2015-01-20 | United Microelectronics Corp. | Transistor with non-uniform stress layer with stress concentrated regions |
| US8847324B2 (en) | 2012-12-17 | 2014-09-30 | Synopsys, Inc. | Increasing ION /IOFF ratio in FinFETs and nano-wires |
| US9379018B2 (en) | 2012-12-17 | 2016-06-28 | Synopsys, Inc. | Increasing Ion/Ioff ratio in FinFETs and nano-wires |
| US9153483B2 (en) * | 2013-10-30 | 2015-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of semiconductor integrated circuit fabrication |
| CN108987362B (zh) * | 2017-05-31 | 2020-10-16 | 华邦电子股份有限公司 | 内连线结构、其制造方法与半导体结构 |
| US12484290B2 (en) * | 2022-08-30 | 2025-11-25 | Micron Technology, Inc. | Active area salicidation for NMOS and PMOS devices |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08167718A (ja) * | 1994-10-12 | 1996-06-25 | Nec Corp | Mis型fetおよびその製造方法 |
| JPH08204188A (ja) * | 1995-01-30 | 1996-08-09 | Nec Corp | 半導体装置およびその製造方法 |
| JPH10270685A (ja) * | 1997-03-27 | 1998-10-09 | Sony Corp | 電界効果トランジスタとその製造方法、半導体装置とその製造方法、その半導体装置を含む論理回路および半導体基板 |
| JP2003086708A (ja) * | 2000-12-08 | 2003-03-20 | Hitachi Ltd | 半導体装置及びその製造方法 |
| JP2003273240A (ja) * | 2002-03-19 | 2003-09-26 | Hitachi Ltd | 半導体装置及びその製造方法 |
| JP2005005633A (ja) * | 2003-06-16 | 2005-01-06 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6294480B1 (en) * | 1999-11-19 | 2001-09-25 | Chartered Semiconductor Manufacturing Ltd. | Method for forming an L-shaped spacer with a disposable organic top coating |
| US6429061B1 (en) * | 2000-07-26 | 2002-08-06 | International Business Machines Corporation | Method to fabricate a strained Si CMOS structure using selective epitaxial deposition of Si after device isolation formation |
| JP2002198368A (ja) * | 2000-12-26 | 2002-07-12 | Nec Corp | 半導体装置の製造方法 |
| US6709935B1 (en) * | 2001-03-26 | 2004-03-23 | Advanced Micro Devices, Inc. | Method of locally forming a silicon/geranium channel layer |
| JP2003060076A (ja) * | 2001-08-21 | 2003-02-28 | Nec Corp | 半導体装置及びその製造方法 |
| US6946371B2 (en) * | 2002-06-10 | 2005-09-20 | Amberwave Systems Corporation | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements |
| US6573172B1 (en) * | 2002-09-16 | 2003-06-03 | Advanced Micro Devices, Inc. | Methods for improving carrier mobility of PMOS and NMOS devices |
| US7001837B2 (en) * | 2003-01-17 | 2006-02-21 | Advanced Micro Devices, Inc. | Semiconductor with tensile strained substrate and method of making the same |
| US6900502B2 (en) * | 2003-04-03 | 2005-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained channel on insulator device |
| US6812105B1 (en) * | 2003-07-16 | 2004-11-02 | International Business Machines Corporation | Ultra-thin channel device with raised source and drain and solid source extension doping |
| US7164189B2 (en) * | 2004-03-31 | 2007-01-16 | Taiwan Semiconductor Manufacturing Company Ltd | Slim spacer device and manufacturing method |
-
2004
- 2004-05-05 US US10/838,330 patent/US7053400B2/en not_active Expired - Lifetime
-
2005
- 2005-04-19 DE DE112005001029.5T patent/DE112005001029B4/de not_active Expired - Lifetime
- 2005-04-19 CN CNB2005800140631A patent/CN100533766C/zh not_active Expired - Lifetime
- 2005-04-19 GB GB0621299A patent/GB2429116B/en not_active Expired - Lifetime
- 2005-04-19 WO PCT/US2005/013239 patent/WO2005112127A1/en not_active Ceased
- 2005-04-19 JP JP2007511390A patent/JP2007536736A/ja active Pending
- 2005-05-03 TW TW094114208A patent/TWI411100B/zh not_active IP Right Cessation
-
2006
- 2006-04-25 US US11/410,062 patent/US20060208250A1/en not_active Abandoned
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08167718A (ja) * | 1994-10-12 | 1996-06-25 | Nec Corp | Mis型fetおよびその製造方法 |
| JPH08204188A (ja) * | 1995-01-30 | 1996-08-09 | Nec Corp | 半導体装置およびその製造方法 |
| JPH10270685A (ja) * | 1997-03-27 | 1998-10-09 | Sony Corp | 電界効果トランジスタとその製造方法、半導体装置とその製造方法、その半導体装置を含む論理回路および半導体基板 |
| JP2003086708A (ja) * | 2000-12-08 | 2003-03-20 | Hitachi Ltd | 半導体装置及びその製造方法 |
| JP2003273240A (ja) * | 2002-03-19 | 2003-09-26 | Hitachi Ltd | 半導体装置及びその製造方法 |
| JP2005005633A (ja) * | 2003-06-16 | 2005-01-06 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008504677A (ja) | 2004-06-24 | 2008-02-14 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 改良した歪みシリコンcmosデバイスおよび方法 |
| JP2008522405A (ja) * | 2004-11-16 | 2008-06-26 | アプライド マテリアルズ インコーポレイテッド | 半導体のための引張り及び圧縮応力をもたせた物質 |
| JP2006165369A (ja) * | 2004-12-09 | 2006-06-22 | Fujitsu Ltd | 応力蓄積絶縁膜の製造方法及び半導体装置 |
| JP4818352B2 (ja) * | 2005-04-01 | 2011-11-16 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 堆積ストレッサ材料の応力レベルを上昇させる方法、及び半導体構造体を形成する方法 |
| JP2009516363A (ja) * | 2005-11-14 | 2009-04-16 | インターナショナル・ビジネス・マシーンズ・コーポレーション | スペーサレスfet及びデュアル・ライナ法による歪み強化を増加させる構造体及び方法 |
| JP2009522796A (ja) * | 2006-01-09 | 2009-06-11 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 同じ基板上に同じ導電型の低性能及び高性能デバイスを有する半導体デバイス構造体 |
| JP2007200961A (ja) * | 2006-01-24 | 2007-08-09 | Sharp Corp | 半導体装置およびその製造方法 |
| JP2008041981A (ja) * | 2006-08-08 | 2008-02-21 | Fujitsu Ltd | 半導体装置の製造方法 |
| JP2010531537A (ja) * | 2007-01-19 | 2010-09-24 | フリースケール セミコンダクター インコーポレイテッド | 半導体デバイス用の多層シリコン窒化膜を堆積する、半導体デバイスの製造方法、および半導体デバイス |
| JP2008306132A (ja) * | 2007-06-11 | 2008-12-18 | Renesas Technology Corp | 半導体装置の製造方法 |
| JP2011129825A (ja) * | 2009-12-21 | 2011-06-30 | Renesas Electronics Corp | 半導体装置、および、半導体装置の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2429116B (en) | 2009-04-22 |
| WO2005112127A1 (en) | 2005-11-24 |
| TW200605322A (en) | 2006-02-01 |
| DE112005001029T5 (de) | 2007-02-22 |
| TWI411100B (zh) | 2013-10-01 |
| US7053400B2 (en) | 2006-05-30 |
| DE112005001029B4 (de) | 2017-10-19 |
| GB0621299D0 (en) | 2006-12-06 |
| GB2429116A (en) | 2007-02-14 |
| US20050247926A1 (en) | 2005-11-10 |
| CN1950946A (zh) | 2007-04-18 |
| CN100533766C (zh) | 2009-08-26 |
| US20060208250A1 (en) | 2006-09-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2007536736A (ja) | チャネルキャリア移動度向上のための高応力ライナーを備えたSi−Geに基づく半導体デバイス | |
| US7138310B2 (en) | Semiconductor devices having strained dual channel layers | |
| US7494884B2 (en) | SiGe selective growth without a hard mask | |
| US7315063B2 (en) | CMOS transistor and method of manufacturing the same | |
| US7902008B2 (en) | Methods for fabricating a stressed MOS device | |
| US8703596B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
| US20080128765A1 (en) | MOSFET Device With Localized Stressor | |
| CN101777516A (zh) | 半导体集成电路的制造方法 | |
| KR20020066191A (ko) | Mos 전계 효과 트랜지스터 | |
| CN101632159A (zh) | 受应力的场效晶体管以及其制造方法 | |
| CN101256949A (zh) | 应变soi衬底的制造方法和在其上制造cmos器件的方法 | |
| JP2006332337A (ja) | 半導体装置及びその製造方法 | |
| US7547605B2 (en) | Microelectronic device and a method for its manufacture | |
| US20090065807A1 (en) | Semiconductor device and fabrication method for the same | |
| US7009226B1 (en) | In-situ nitride/oxynitride processing with reduced deposition surface pattern sensitivity | |
| US7442601B2 (en) | Stress enhanced CMOS circuits and methods for their fabrication | |
| JP2007165665A (ja) | 半導体装置およびその製造方法 | |
| WO2005122272A1 (ja) | 歪みシリコンチャネル層を有するmis型電界効果トランジスタ | |
| CN103066122A (zh) | Mosfet及其制造方法 | |
| JP5043862B2 (ja) | 半導体構造およびその製造方法(相補型金属酸化膜半導体) | |
| JP5018780B2 (ja) | 半導体装置およびその製造方法 | |
| JP3790238B2 (ja) | 半導体装置 | |
| JP2005209980A (ja) | 半導体装置の製造方法および半導体装置 | |
| TW560007B (en) | CMOS device and its manufacturing method | |
| US20150001594A1 (en) | Forming tunneling field-effect transistor with stacking fault and resulting device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080421 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20080421 |
|
| RD03 | Notification of appointment of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7423 Effective date: 20100421 |
|
| RD05 | Notification of revocation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7425 Effective date: 20100902 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20111110 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20111130 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20120227 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20120305 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120330 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20121114 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130314 |
|
| A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20130322 |
|
| A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20130419 |