JP2005538537A - 電界効果トランジスタ、その使用、およびその製造方法 - Google Patents
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- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
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Abstract
Description
−絶縁領域は、例えば少なくとも15nm(ナノメートル)あるいは少なくとも20nmの絶縁厚さを有し、
−窪みに沿った接続領域の間隔は、少なくとも0、4μm(マイクロメートル)であり
−接続領域は、プレーナ電界効果トランジスタのドーピング特性と比較して、ほぼ200nm/decadeの平坦ドーピング特性勾配を有し、特に、平坦ドーピング特性勾配によって、ドーパントの様々な挿入深さを容易に得られる。
−処理される表面を有する半導体基板が準備され、
−表面近傍の接続領域と表面遠方の接続領域とが半導体基板内にドーピング形成され、
−表面近傍の接続領域から表面遠方の接続領域まで達する、少なくとも1つの制御領域のための窪みがエッチングされ、
−電気的絶縁層が窪み内に堆積され、
−窪み内に導電性の制御領域が導入される。
−ソース領域16、
−ドレイン領域の電気的接続54を有するドレイン領域18、
−チャネル領域(アクティブ領域)180および182。
Claims (19)
- 窪み(72)に沿って配置されたドープチャネル領域と、
該窪み(72)の開口部近傍のドープ接続領域(16)と、
開口部遠方のドープ接続領域(18)と、
該窪み(72)の内部に形成された制御領域(172)と、
該制御領域(172)と該チャネル領域との間の電気的絶縁領域(170)と
を備えた、電界効果トランジスタ(222)において、
該開口部遠方のドープ接続領域(18、54)が、該開口部を含む表面まで達するか、あるいは該表面まで達する導電性接続と結合される、電界効果トランジスタ(222)。 - 前記ドープ接続領域(16、18)は、同一のドーパント濃度および同一の導電型のドーパントを含むことを特徴とする、請求項1に記載の電界効果トランジスタ(222)。
- 前記チャネル領域は、前記窪み(72)の深さの少なくとも3分の2の長さ(1)を有することを特徴とする、請求項1または2に記載の電界効果トランジスタ(222)。
- 前記窪みは、トレンチ(72)あるいは穴であることを特徴とする、請求項1から3のいずれか一項に記載の電界効果トランジスタ(222)。
- 前記チャネル領域は、前記トレンチ(72)の両側部上に、あるいは前記穴の全周囲に沿って位置することを特徴とする、請求項1から4のいずれか一項に記載の電界効果トランジスタ(222)。
- 前記チャネル領域は、前記トレンチ(72)の1つの側部上に、あるいは前記穴の周囲に一部に沿って位置することを特徴とする、請求項1から4のいずれか一項に記載の電界効果トランジスタ(222)。
- 前記開口部遠方のドープ接続領域(18)は、複数の、好ましくは少なくとも2箇所あるいは少なくとも3箇所の窪み(72b、352)の領域内に位置し、該窪み(72b、352)内に制御領域が配置され、該窪み(72b、352)内の近傍にチャンル領域および開口部近傍のドープ接続領域(16c)が配置され、
該制御領域および該開口部近傍のドープ接続領域(16c)は、各々、電気的並列に接続(380)されることを特徴とする、請求項1から6のいずれか一項に記載の電界効果トランジスタ(222)。 - 前記制御領域のための前記窪み(72)の深さと、前記電界効果トランジスタ(222)とそれに隣接する電気部品との間の、電気的絶縁材料によって充填された窪み(70、76)の深さとは、同一であることを特徴とする、請求項1から7のいずれか一項に記載の電界効果トランジスタ(222)。
- 前記制御領域のための前記窪み(72)の深さは、前記電界効果トランジスタ(222)とそれに隣接する電気部品との間の、電気的絶縁材料によって充填された窪み(70a、76a)の深さより小さいことを特徴とする、請求項1から7のいずれか一項に記載の電界効果トランジスタ(222)。
- 前記絶縁領域(170)は、少なくとも15nm、好ましくは20nmの絶縁厚さを有し、
および/または、前記窪み(72)に沿った前記接続領域(16、18)の間隔(l)は、少なくとも0、4μmであり、
および/または、少なくとも1つの接続領域(16、18)は、9ボルトよりも大きく、あるいは15ボルトよりも大きく、しかしながら30ボルトよりも小さいスイッチ電圧を許容する、平坦なドーピング特性勾配を有することを特徴とする、請求項1から9のいずれか一項に記載の電界効果トランジスタ(222)。 - 請求項1から10のいずれか一項に記載の電界効果トランジスタ(222)の使用であって、
前記メモリセルアレイ(230)、特にフラッシュメモリあるいはEEPROMモジュールのワード線(272、288)あるいはビット線(296)の制御トランジスタとしての、電界効果トランジスタ(222)の使用。 - 請求項1から11のいずれか一項に記載の電界効果トランジスタ(222)の使用であって、
9ボルトよりも大きく、あるいは15ボルトよりも大きく、しかしながら好ましくは30ボルトよりも小さい電圧のスイッチングにための、電界効果トランジスタ(222)の使用。 - 電界効果トランジスタ(222)の製造方法であって、特に、請求項1から12のいずれか一項に記載の電界効果トランジスタ(222)の製造方法であって、提示された順序に制限されることなく実施される工程を有する方法において、
処理される表面を有するキャリア材料(10)を準備する工程と、
表面近傍の接続領域(16)と表面遠方の接続領域(18)とを形成する工程と、
該表面近傍の接続領域(16)から該表面遠方の接続領域(18)まで達する、あるいは該表面近傍の接続領域のための領域から該表面遠方の接続領域のための領域まで達する、少なくとも1つの窪み(72)を形成する工程と、
該窪み(72)内に、電気的絶縁層(170)を生成する工程と、
該窪み(72)内に、導電性の制御領域(172)を導入する工程と
を包含する、方法。 - 前記接続領域を形成する工程は、前記窪みを形成する工程の前に、および/または該窪み(72)の充填の前に実施されることを特徴とする、請求項13に記載の方法。
- 前記表面遠方の接続領域(18)から前記半導体層(10)の前記表面までの結合領域(54)を形成する工程を含有することを特徴とする、請求項13または14に記載の方法。
- 前記制御領域のための前記窪み(72)と同時に、少なくとも1つの絶縁窪み(70、74、76)が形成されることを特徴とする、請求項13から15のいずれか一項に記載の方法。
- 前記絶縁窪み(70、74、76)は、前記制御領域のための前記窪み(72)の深さと同一の深さを有することを特徴とする、請求項16に記載の方法。
- 前記絶縁窪み(70a、76a)は、前記制御領域のための前記窪み(72a)の深さより深く形成されることを特徴とする、請求項16に記載の方法。
- 前記絶縁窪みは、少なくとも上部において、前記制御領域のための前記窪み(72)より広く、各窪みは共通のエッチングプロセスにおいて形成され、その際、該より広い窪みは、該より狭い窪みに比べて十分深くエッチングされることを特徴とする、請求項18に記載の方法。
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DE10231966A DE10231966A1 (de) | 2002-07-15 | 2002-07-15 | Feldeffekttransistor, zugehörige Verwendung und zugehöriges Herstellungsverfahren |
DE10231966.9 | 2002-07-15 | ||
PCT/DE2003/001957 WO2004017417A1 (de) | 2002-07-15 | 2003-06-12 | Feldeffekttransistor, zugehörige verwendung und zugehöriges herstellungsverfahren |
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Cited By (3)
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JP2008536336A (ja) * | 2005-04-12 | 2008-09-04 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Soc用途のための高密度トレンチ・ベース不揮発性ランダム・アクセスsonosメモリ・セルの構造及びこれを製造する方法 |
JP2009081377A (ja) * | 2007-09-27 | 2009-04-16 | Elpida Memory Inc | 半導体装置 |
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DE102017101662B4 (de) | 2017-01-27 | 2019-03-28 | Infineon Technologies Austria Ag | Halbleiterbauelement mit einer Isolationsstruktur und einer Verbindungsstruktur sowie ein Verfahren zu dessen Herstellung |
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- 2003-06-12 WO PCT/DE2003/001957 patent/WO2004017417A1/de active Application Filing
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Also Published As
Publication number | Publication date |
---|---|
EP1522103A1 (de) | 2005-04-13 |
WO2004017417A1 (de) | 2004-02-26 |
US20060211264A1 (en) | 2006-09-21 |
JP2012109588A (ja) | 2012-06-07 |
JP4926401B2 (ja) | 2012-05-09 |
CN100409455C (zh) | 2008-08-06 |
CN1669152A (zh) | 2005-09-14 |
TW200402883A (en) | 2004-02-16 |
US7786530B2 (en) | 2010-08-31 |
KR20050021469A (ko) | 2005-03-07 |
DE10231966A1 (de) | 2004-02-12 |
US20100142266A1 (en) | 2010-06-10 |
TWI270210B (en) | 2007-01-01 |
US7989294B2 (en) | 2011-08-02 |
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