JP2000307057A5 - - Google Patents
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- Publication number
- JP2000307057A5 JP2000307057A5 JP2000004034A JP2000004034A JP2000307057A5 JP 2000307057 A5 JP2000307057 A5 JP 2000307057A5 JP 2000004034 A JP2000004034 A JP 2000004034A JP 2000004034 A JP2000004034 A JP 2000004034A JP 2000307057 A5 JP2000307057 A5 JP 2000307057A5
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- wire
- layer
- semiconductor device
- lower layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 73
- 238000000034 method Methods 0.000 claims 16
- 239000000758 substrate Substances 0.000 claims 16
- 238000004519 manufacturing process Methods 0.000 claims 15
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000004034A JP3662461B2 (ja) | 1999-02-17 | 2000-01-12 | 半導体装置、およびその製造方法 |
| TW89101562A TW444308B (en) | 1999-02-17 | 2000-01-29 | Semiconductor device and manufacturing method thereof |
| KR10-2000-0006756A KR100379608B1 (ko) | 1999-02-17 | 2000-02-14 | 반도체장치 및 그의 제조방법 |
| US10/162,864 US20020158325A1 (en) | 1999-02-17 | 2002-06-06 | Semiconductor device and manufacturing method thereof |
| US11/028,861 US7276437B2 (en) | 1999-02-17 | 2005-01-05 | Semiconductor device and manufacturing method thereof |
| US11/802,969 US7528011B2 (en) | 1999-02-17 | 2007-05-29 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3890999 | 1999-02-17 | ||
| JP11-38909 | 1999-02-17 | ||
| JP2000004034A JP3662461B2 (ja) | 1999-02-17 | 2000-01-12 | 半導体装置、およびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000307057A JP2000307057A (ja) | 2000-11-02 |
| JP2000307057A5 true JP2000307057A5 (enExample) | 2005-04-14 |
| JP3662461B2 JP3662461B2 (ja) | 2005-06-22 |
Family
ID=26378208
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000004034A Expired - Fee Related JP3662461B2 (ja) | 1999-02-17 | 2000-01-12 | 半導体装置、およびその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (3) | US20020158325A1 (enExample) |
| JP (1) | JP3662461B2 (enExample) |
| KR (1) | KR100379608B1 (enExample) |
| TW (1) | TW444308B (enExample) |
Families Citing this family (56)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3662461B2 (ja) * | 1999-02-17 | 2005-06-22 | シャープ株式会社 | 半導体装置、およびその製造方法 |
| JP3631120B2 (ja) | 2000-09-28 | 2005-03-23 | 沖電気工業株式会社 | 半導体装置 |
| TW465064B (en) * | 2000-12-22 | 2001-11-21 | Advanced Semiconductor Eng | Bonding process and the structure thereof |
| JP2002373969A (ja) * | 2001-06-15 | 2002-12-26 | Oki Electric Ind Co Ltd | 半導体装置及び半導体装置の製造方法 |
| JP4633971B2 (ja) | 2001-07-11 | 2011-02-16 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US6476506B1 (en) * | 2001-09-28 | 2002-11-05 | Motorola, Inc. | Packaged semiconductor with multiple rows of bond pads and method therefor |
| KR20030075860A (ko) | 2002-03-21 | 2003-09-26 | 삼성전자주식회사 | 반도체 칩 적층 구조 및 적층 방법 |
| CA2523788A1 (en) | 2003-05-19 | 2004-12-02 | James Hardie International Finance B.V. | Building material, building system and method of installing the same |
| US7309923B2 (en) * | 2003-06-16 | 2007-12-18 | Sandisk Corporation | Integrated circuit package having stacked integrated circuits and method therefor |
| US6984881B2 (en) * | 2003-06-16 | 2006-01-10 | Sandisk Corporation | Stackable integrated circuit package and method therefor |
| TWI263286B (en) * | 2004-02-06 | 2006-10-01 | Siliconware Precision Industries Co Ltd | Wire bonding method and semiconductor package using the method |
| KR100604840B1 (ko) * | 2004-03-11 | 2006-07-28 | 삼성전자주식회사 | 미세 피치 범프에의 리버스 와이어 본딩 방법 및 이에의한 와이어 본드 구조체 |
| JP2005268497A (ja) * | 2004-03-18 | 2005-09-29 | Denso Corp | 半導体装置及び半導体装置の製造方法 |
| US7009305B2 (en) * | 2004-06-30 | 2006-03-07 | Agere Systems Inc. | Methods and apparatus for integrated circuit ball bonding using stacked ball bumps |
| TWI304238B (en) * | 2004-09-07 | 2008-12-11 | Advanced Semiconductor Eng | Wire-bonding method for connecting wire-bond pads and chip and the structure formed thereby |
| US8519517B2 (en) * | 2004-11-13 | 2013-08-27 | Stats Chippac Ltd. | Semiconductor system with fine pitch lead fingers and method of manufacturing thereof |
| JP2006210802A (ja) * | 2005-01-31 | 2006-08-10 | Nec Electronics Corp | 半導体装置 |
| US20060267173A1 (en) * | 2005-05-26 | 2006-11-30 | Sandisk Corporation | Integrated circuit package having stacked integrated circuits and method therefor |
| JP2007019415A (ja) | 2005-07-11 | 2007-01-25 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7605476B2 (en) | 2005-09-27 | 2009-10-20 | Stmicroelectronics S.R.L. | Stacked die semiconductor package |
| JP2007134486A (ja) * | 2005-11-10 | 2007-05-31 | Toshiba Corp | 積層型半導体装置及びその製造方法 |
| JP4881620B2 (ja) * | 2006-01-06 | 2012-02-22 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| JP2008034567A (ja) * | 2006-07-27 | 2008-02-14 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JP5481769B2 (ja) * | 2006-11-22 | 2014-04-23 | 日亜化学工業株式会社 | 半導体装置及びその製造方法 |
| JP4527105B2 (ja) * | 2006-12-26 | 2010-08-18 | シャープ株式会社 | 半導体装置 |
| US20080191367A1 (en) * | 2007-02-08 | 2008-08-14 | Stats Chippac, Ltd. | Semiconductor package wire bonding |
| US20080272487A1 (en) * | 2007-05-04 | 2008-11-06 | Il Kwon Shim | System for implementing hard-metal wire bonds |
| JP2009021499A (ja) * | 2007-07-13 | 2009-01-29 | Toshiba Corp | 積層型半導体装置 |
| US8399973B2 (en) * | 2007-12-20 | 2013-03-19 | Mosaid Technologies Incorporated | Data storage and stackable configurations |
| EP2133915A1 (de) * | 2008-06-09 | 2009-12-16 | Micronas GmbH | Halbleiteranordnung mit besonders gestalteten Bondleitungen und Verfahren zum Herstellen einer solchen Anordnung |
| CN101615587A (zh) * | 2008-06-27 | 2009-12-30 | 桑迪士克股份有限公司 | 半导体装置中的导线层叠式缝线接合 |
| JP5205173B2 (ja) * | 2008-08-08 | 2013-06-05 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| KR20100049283A (ko) * | 2008-11-03 | 2010-05-12 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
| US7894230B2 (en) | 2009-02-24 | 2011-02-22 | Mosaid Technologies Incorporated | Stacked semiconductor devices including a master device |
| JP5411553B2 (ja) * | 2009-03-31 | 2014-02-12 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 半導体装置の製造方法 |
| KR100935854B1 (ko) | 2009-09-22 | 2010-01-08 | 테세라 리써치 엘엘씨 | 와이어 본딩 및 기준 와이어 본딩에 의해 제어되는 임피던스를 가진 마이크로전자 어셈블리 |
| KR100950511B1 (ko) * | 2009-09-22 | 2010-03-30 | 테세라 리써치 엘엘씨 | 와이어 본딩 및 도전성 기준 소자에 의해 제어되는 임피던스를 포함하는 마이크로전자 어셈블리 |
| JP5062283B2 (ja) * | 2009-04-30 | 2012-10-31 | 日亜化学工業株式会社 | 半導体装置及びその製造方法 |
| JP5497392B2 (ja) | 2009-09-25 | 2014-05-21 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US8791582B2 (en) * | 2010-07-28 | 2014-07-29 | Freescale Semiconductor, Inc. | Integrated circuit package with voltage distributor |
| US8786083B2 (en) | 2010-09-16 | 2014-07-22 | Tessera, Inc. | Impedance controlled packages with metal sheet or 2-layer RDL |
| US8222725B2 (en) | 2010-09-16 | 2012-07-17 | Tessera, Inc. | Metal can impedance control structure |
| US9136197B2 (en) | 2010-09-16 | 2015-09-15 | Tessera, Inc. | Impedence controlled packages with metal sheet or 2-layer RDL |
| US8853708B2 (en) | 2010-09-16 | 2014-10-07 | Tessera, Inc. | Stacked multi-die packages with impedance control |
| US8581377B2 (en) | 2010-09-16 | 2013-11-12 | Tessera, Inc. | TSOP with impedance control |
| WO2012071325A1 (en) | 2010-11-24 | 2012-05-31 | Tessera, Inc. | Lead structures with vertical offsets |
| US9373666B2 (en) | 2011-02-25 | 2016-06-21 | The Regents Of The University Of Michigan | System and method of forming semiconductor devices |
| JP5266371B2 (ja) * | 2011-08-04 | 2013-08-21 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| JP2011244022A (ja) * | 2011-09-09 | 2011-12-01 | Renesas Electronics Corp | 半導体装置の製造方法 |
| KR20130042210A (ko) | 2011-10-18 | 2013-04-26 | 삼성전자주식회사 | 멀티-칩 패키지 및 그의 제조 방법 |
| TWI518814B (zh) | 2013-04-15 | 2016-01-21 | 新川股份有限公司 | 半導體裝置以及半導體裝置的製造方法 |
| JP6196092B2 (ja) * | 2013-07-30 | 2017-09-13 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US9196567B1 (en) * | 2015-01-14 | 2015-11-24 | Macronix International Co., Ltd. | Pad structure |
| US11373974B2 (en) | 2016-07-01 | 2022-06-28 | Intel Corporation | Electronic device packages and methods for maximizing electrical current to dies and minimizing bond finger size |
| CN111933605A (zh) * | 2020-08-10 | 2020-11-13 | 紫光宏茂微电子(上海)有限公司 | 芯片焊接结构及焊接方法 |
| CN114783884A (zh) * | 2022-03-01 | 2022-07-22 | 山东山铝电子技术有限公司 | 一种新型智能卡非接触模块封装工艺 |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5731166A (en) | 1980-07-31 | 1982-02-19 | Fujitsu Ltd | Semiconductor device |
| JP3011510B2 (ja) | 1990-12-20 | 2000-02-21 | 株式会社東芝 | 相互連結回路基板を有する半導体装置およびその製造方法 |
| US5239447A (en) | 1991-09-13 | 1993-08-24 | International Business Machines Corporation | Stepped electronic device package |
| US5111989A (en) * | 1991-09-26 | 1992-05-12 | Kulicke And Soffa Investments, Inc. | Method of making low profile fine wire interconnections |
| WO1993023982A1 (en) | 1992-05-11 | 1993-11-25 | Nchip, Inc. | Stacked devices for multichip modules |
| US5422435A (en) | 1992-05-22 | 1995-06-06 | National Semiconductor Corporation | Stacked multi-chip modules and method of manufacturing |
| US5328079A (en) * | 1993-03-19 | 1994-07-12 | National Semiconductor Corporation | Method of and arrangement for bond wire connecting together certain integrated circuit components |
| US5323060A (en) * | 1993-06-02 | 1994-06-21 | Micron Semiconductor, Inc. | Multichip module having a stacked chip arrangement |
| JP2707979B2 (ja) | 1994-09-16 | 1998-02-04 | 日本電気株式会社 | ハイブリッドic及びその製造方法 |
| US5842628A (en) * | 1995-04-10 | 1998-12-01 | Fujitsu Limited | Wire bonding method, semiconductor device, capillary for wire bonding and ball bump forming method |
| JPH09186289A (ja) * | 1995-12-28 | 1997-07-15 | Lucent Technol Inc | 多層積層化集積回路チップ組立体 |
| US7166495B2 (en) * | 1996-02-20 | 2007-01-23 | Micron Technology, Inc. | Method of fabricating a multi-die semiconductor package assembly |
| JPH10116849A (ja) | 1996-10-08 | 1998-05-06 | Sumitomo Metal Mining Co Ltd | ワイヤボンディング法、これを用いた組み立て方法、および組み立てられたmcm |
| JPH11219984A (ja) | 1997-11-06 | 1999-08-10 | Sharp Corp | 半導体装置パッケージおよびその製造方法ならびにそのための回路基板 |
| JP3481444B2 (ja) | 1998-01-14 | 2003-12-22 | シャープ株式会社 | 半導体装置及びその製造方法 |
| JPH11289023A (ja) * | 1998-04-02 | 1999-10-19 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| JP3662461B2 (ja) * | 1999-02-17 | 2005-06-22 | シャープ株式会社 | 半導体装置、およびその製造方法 |
| US6215193B1 (en) * | 1999-04-21 | 2001-04-10 | Advanced Semiconductor Engineering, Inc. | Multichip modules and manufacturing method therefor |
| US6900528B2 (en) * | 2001-06-21 | 2005-05-31 | Micron Technology, Inc. | Stacked mass storage flash memory package |
| KR100594229B1 (ko) * | 2003-09-19 | 2006-07-03 | 삼성전자주식회사 | 반도체 패키지 및 그 제조방법 |
-
2000
- 2000-01-12 JP JP2000004034A patent/JP3662461B2/ja not_active Expired - Fee Related
- 2000-01-29 TW TW89101562A patent/TW444308B/zh not_active IP Right Cessation
- 2000-02-14 KR KR10-2000-0006756A patent/KR100379608B1/ko not_active Expired - Fee Related
-
2002
- 2002-06-06 US US10/162,864 patent/US20020158325A1/en not_active Abandoned
-
2005
- 2005-01-05 US US11/028,861 patent/US7276437B2/en not_active Expired - Fee Related
-
2007
- 2007-05-29 US US11/802,969 patent/US7528011B2/en not_active Expired - Fee Related
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