JP3662461B2 - 半導体装置、およびその製造方法 - Google Patents

半導体装置、およびその製造方法 Download PDF

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Publication number
JP3662461B2
JP3662461B2 JP2000004034A JP2000004034A JP3662461B2 JP 3662461 B2 JP3662461 B2 JP 3662461B2 JP 2000004034 A JP2000004034 A JP 2000004034A JP 2000004034 A JP2000004034 A JP 2000004034A JP 3662461 B2 JP3662461 B2 JP 3662461B2
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Japan
Prior art keywords
bonding
wire
semiconductor chip
substrate
layer
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JP2000004034A
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English (en)
Japanese (ja)
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JP2000307057A (ja
JP2000307057A5 (enExample
Inventor
祐司 矢野
厚也 並井
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Sharp Corp
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Sharp Corp
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Priority to JP2000004034A priority Critical patent/JP3662461B2/ja
Priority to TW89101562A priority patent/TW444308B/zh
Priority to KR10-2000-0006756A priority patent/KR100379608B1/ko
Publication of JP2000307057A publication Critical patent/JP2000307057A/ja
Priority to US10/162,864 priority patent/US20020158325A1/en
Priority to US11/028,861 priority patent/US7276437B2/en
Publication of JP2000307057A5 publication Critical patent/JP2000307057A5/ja
Application granted granted Critical
Publication of JP3662461B2 publication Critical patent/JP3662461B2/ja
Priority to US11/802,969 priority patent/US7528011B2/en
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    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Physical Education & Sports Medicine (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
JP2000004034A 1999-02-17 2000-01-12 半導体装置、およびその製造方法 Expired - Fee Related JP3662461B2 (ja)

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TW89101562A TW444308B (en) 1999-02-17 2000-01-29 Semiconductor device and manufacturing method thereof
KR10-2000-0006756A KR100379608B1 (ko) 1999-02-17 2000-02-14 반도체장치 및 그의 제조방법
US10/162,864 US20020158325A1 (en) 1999-02-17 2002-06-06 Semiconductor device and manufacturing method thereof
US11/028,861 US7276437B2 (en) 1999-02-17 2005-01-05 Semiconductor device and manufacturing method thereof
US11/802,969 US7528011B2 (en) 1999-02-17 2007-05-29 Semiconductor device and manufacturing method thereof

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JP2000307057A (ja) 2000-11-02
KR20000058032A (ko) 2000-09-25
US20020158325A1 (en) 2002-10-31
TW444308B (en) 2001-07-01
US7276437B2 (en) 2007-10-02
US7528011B2 (en) 2009-05-05
KR100379608B1 (ko) 2003-04-10
US20050148175A1 (en) 2005-07-07

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