DE602004021493D1 - Nichtflüchtiger speicher und verfahren mit von bitleitung zu bitleitung gekoppelter kompensation - Google Patents
Nichtflüchtiger speicher und verfahren mit von bitleitung zu bitleitung gekoppelter kompensationInfo
- Publication number
- DE602004021493D1 DE602004021493D1 DE602004021493T DE602004021493T DE602004021493D1 DE 602004021493 D1 DE602004021493 D1 DE 602004021493D1 DE 602004021493 T DE602004021493 T DE 602004021493T DE 602004021493 T DE602004021493 T DE 602004021493T DE 602004021493 D1 DE602004021493 D1 DE 602004021493D1
- Authority
- DE
- Germany
- Prior art keywords
- memory storage
- programming
- storage unit
- bit line
- still under
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title abstract 2
- 230000005055 memory storage Effects 0.000 abstract 7
- 230000008878 coupling Effects 0.000 abstract 1
- 238000010168 coupling process Methods 0.000 abstract 1
- 238000005859 coupling reaction Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
- G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/667,222 US7064980B2 (en) | 2003-09-17 | 2003-09-17 | Non-volatile memory and method with bit line coupled compensation |
PCT/US2004/029426 WO2005029502A1 (en) | 2003-09-17 | 2004-09-08 | Non-volatile memory and method with bit line to bit line coupled compensation |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602004021493D1 true DE602004021493D1 (de) | 2009-07-23 |
Family
ID=34274757
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004021493T Expired - Lifetime DE602004021493D1 (de) | 2003-09-17 | 2004-09-08 | Nichtflüchtiger speicher und verfahren mit von bitleitung zu bitleitung gekoppelter kompensation |
Country Status (9)
Country | Link |
---|---|
US (3) | US7064980B2 (de) |
EP (1) | EP1671332B1 (de) |
JP (1) | JP4658052B2 (de) |
KR (1) | KR101076239B1 (de) |
CN (1) | CN100538906C (de) |
AT (1) | ATE433597T1 (de) |
DE (1) | DE602004021493D1 (de) |
TW (1) | TWI295803B (de) |
WO (1) | WO2005029502A1 (de) |
Families Citing this family (140)
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US7532514B2 (en) | 2009-05-12 |
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TW200529239A (en) | 2005-09-01 |
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US20060227614A1 (en) | 2006-10-12 |
KR101076239B1 (ko) | 2011-10-26 |
EP1671332A1 (de) | 2006-06-21 |
CN100538906C (zh) | 2009-09-09 |
WO2005029502A1 (en) | 2005-03-31 |
EP1671332B1 (de) | 2009-06-10 |
JP2007506221A (ja) | 2007-03-15 |
US7064980B2 (en) | 2006-06-20 |
ATE433597T1 (de) | 2009-06-15 |
US20050057965A1 (en) | 2005-03-17 |
TWI295803B (en) | 2008-04-11 |
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