DE10025217A1 - Halbleitereinrichtung - Google Patents

Halbleitereinrichtung

Info

Publication number
DE10025217A1
DE10025217A1 DE10025217A DE10025217A DE10025217A1 DE 10025217 A1 DE10025217 A1 DE 10025217A1 DE 10025217 A DE10025217 A DE 10025217A DE 10025217 A DE10025217 A DE 10025217A DE 10025217 A1 DE10025217 A1 DE 10025217A1
Authority
DE
Germany
Prior art keywords
layer
doping
semiconductor
insulating
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE10025217A
Other languages
German (de)
English (en)
Inventor
Takuji Matsumoto
Shigenobu Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE10025217A1 publication Critical patent/DE10025217A1/de
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6708Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

Landscapes

  • Thin Film Transistor (AREA)
DE10025217A 1999-07-23 2000-05-22 Halbleitereinrichtung Ceased DE10025217A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11209256A JP2001036092A (ja) 1999-07-23 1999-07-23 半導体装置

Publications (1)

Publication Number Publication Date
DE10025217A1 true DE10025217A1 (de) 2001-02-01

Family

ID=16569951

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10025217A Ceased DE10025217A1 (de) 1999-07-23 2000-05-22 Halbleitereinrichtung

Country Status (5)

Country Link
US (2) US6486513B1 (https=)
JP (1) JP2001036092A (https=)
KR (1) KR100372668B1 (https=)
DE (1) DE10025217A1 (https=)
TW (1) TW463380B (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
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WO2003083937A3 (en) * 2002-03-26 2003-12-04 Advanced Micro Devices Inc Source-side stacking fault body-tie for partially-depleted soi mosfet hysteresis control
WO2007126807A1 (en) * 2006-04-28 2007-11-08 Advanced Micro Devices, Inc. An soi transistor having a reduced body potential and a method of forming the same
GB2451368A (en) * 2006-04-28 2009-01-28 Advanced Micro Devices Inc An SOI transistor having a reduced body potential and a method of forming the same
DE10225234B4 (de) * 2001-06-07 2011-07-14 DENSO CORPORATION, Aichi-pref. Metalloxidhalbleitertransistor und Herstellungsverfahren für Selbigen

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CN1638146A (zh) * 1999-08-31 2005-07-13 松下电器产业株式会社 耐高压的绝缘体上的硅型半导体器件
JP5000057B2 (ja) * 2001-07-17 2012-08-15 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
JP2004072063A (ja) * 2002-06-10 2004-03-04 Nec Electronics Corp 半導体装置及びその製造方法
JP2004172541A (ja) 2002-11-22 2004-06-17 Renesas Technology Corp 半導体装置の製造方法
US20040222485A1 (en) * 2002-12-17 2004-11-11 Haynie Sheldon D. Bladed silicon-on-insulator semiconductor devices and method of making
US6955952B2 (en) * 2003-03-07 2005-10-18 Taiwan Semiconductor Manufacturing Company, Ltd. Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement
US7270884B2 (en) 2003-04-07 2007-09-18 Infineon Technologies Ag Adhesion layer for Pt on SiO2
JP4610982B2 (ja) * 2003-11-11 2011-01-12 シャープ株式会社 半導体装置の製造方法
KR100588779B1 (ko) * 2003-12-30 2006-06-12 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조방법
US7220626B2 (en) * 2005-01-28 2007-05-22 International Business Machines Corporation Structure and method for manufacturing planar strained Si/SiGe substrate with multiple orientations and different stress levels
US7606066B2 (en) 2005-09-07 2009-10-20 Innovative Silicon Isi Sa Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
US7492632B2 (en) * 2006-04-07 2009-02-17 Innovative Silicon Isi Sa Memory array having a programmable word length, and method of operating same
DE102006019937B4 (de) * 2006-04-28 2010-11-25 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung eines SOI-Transistors mit eingebetteter Verformungsschicht und einem reduzierten Effekt des potentialfreien Körpers
WO2007128738A1 (en) * 2006-05-02 2007-11-15 Innovative Silicon Sa Semiconductor memory cell and array using punch-through to program and read same
US8069377B2 (en) * 2006-06-26 2011-11-29 Micron Technology, Inc. Integrated circuit having memory array including ECC and column redundancy and method of operating the same
US7542340B2 (en) * 2006-07-11 2009-06-02 Innovative Silicon Isi Sa Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same
WO2008090475A2 (en) * 2007-01-26 2008-07-31 Innovative Silicon S.A. Floating-body dram transistor comprising source/drain regions separated from the gated body region
WO2009031052A2 (en) 2007-03-29 2009-03-12 Innovative Silicon S.A. Zero-capacitor (floating body) random access memory circuits with polycide word lines and manufacturing methods therefor
DE102007020260B4 (de) * 2007-04-30 2010-04-08 Advanced Micro Devices, Inc., Sunnyvale Verfahren zum Verbessern der Transistoreigenschaften von Feldeffekttransistoren durch eine späte tiefe Implantation in Verbindung mit einem diffusionsfreien Ausheizprozess
US8064274B2 (en) 2007-05-30 2011-11-22 Micron Technology, Inc. Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same
US8085594B2 (en) 2007-06-01 2011-12-27 Micron Technology, Inc. Reading technique for memory cell with electrically floating body transistor
WO2009039169A1 (en) 2007-09-17 2009-03-26 Innovative Silicon S.A. Refreshing data of memory cells with electrically floating body transistors
US8536628B2 (en) 2007-11-29 2013-09-17 Micron Technology, Inc. Integrated circuit having memory cell array including barriers, and method of manufacturing same
US8349662B2 (en) * 2007-12-11 2013-01-08 Micron Technology, Inc. Integrated circuit having memory cell array, and method of manufacturing same
US8773933B2 (en) 2012-03-16 2014-07-08 Micron Technology, Inc. Techniques for accessing memory cells
US8014195B2 (en) 2008-02-06 2011-09-06 Micron Technology, Inc. Single transistor memory cell
US8189376B2 (en) * 2008-02-08 2012-05-29 Micron Technology, Inc. Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same
US7957206B2 (en) 2008-04-04 2011-06-07 Micron Technology, Inc. Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same
US20100252828A1 (en) * 2009-04-03 2010-10-07 Michael Grillberger Semiconductor device comprising a chip internal electrical test structure allowing electrical measurements during the fabrication process
TW201003880A (en) * 2008-05-30 2010-01-16 Advanced Micro Devices Inc Semiconductor device comprising a chip internal electrical test structure allowing electrical measurements during the fabrication process
US7947543B2 (en) * 2008-09-25 2011-05-24 Micron Technology, Inc. Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation
US7933140B2 (en) 2008-10-02 2011-04-26 Micron Technology, Inc. Techniques for reducing a voltage swing
US7924630B2 (en) * 2008-10-15 2011-04-12 Micron Technology, Inc. Techniques for simultaneously driving a plurality of source lines
US8223574B2 (en) * 2008-11-05 2012-07-17 Micron Technology, Inc. Techniques for block refreshing a semiconductor memory device
US8213226B2 (en) 2008-12-05 2012-07-03 Micron Technology, Inc. Vertical transistor memory cell and array
US8319294B2 (en) * 2009-02-18 2012-11-27 Micron Technology, Inc. Techniques for providing a source line plane
US8710566B2 (en) * 2009-03-04 2014-04-29 Micron Technology, Inc. Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device
WO2010114890A1 (en) 2009-03-31 2010-10-07 Innovative Silicon Isi Sa Techniques for providing a semiconductor memory device
US8139418B2 (en) 2009-04-27 2012-03-20 Micron Technology, Inc. Techniques for controlling a direct injection semiconductor memory device
US8508994B2 (en) 2009-04-30 2013-08-13 Micron Technology, Inc. Semiconductor device with floating gate and electrically floating body
US8498157B2 (en) 2009-05-22 2013-07-30 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8537610B2 (en) 2009-07-10 2013-09-17 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9076543B2 (en) * 2009-07-27 2015-07-07 Micron Technology, Inc. Techniques for providing a direct injection semiconductor memory device
US8199595B2 (en) * 2009-09-04 2012-06-12 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8174881B2 (en) 2009-11-24 2012-05-08 Micron Technology, Inc. Techniques for reducing disturbance in a semiconductor device
US8310893B2 (en) * 2009-12-16 2012-11-13 Micron Technology, Inc. Techniques for reducing impact of array disturbs in a semiconductor memory device
US8416636B2 (en) * 2010-02-12 2013-04-09 Micron Technology, Inc. Techniques for controlling a semiconductor memory device
US8576631B2 (en) 2010-03-04 2013-11-05 Micron Technology, Inc. Techniques for sensing a semiconductor memory device
US8411513B2 (en) * 2010-03-04 2013-04-02 Micron Technology, Inc. Techniques for providing a semiconductor memory device having hierarchical bit lines
US8369177B2 (en) * 2010-03-05 2013-02-05 Micron Technology, Inc. Techniques for reading from and/or writing to a semiconductor memory device
WO2011115893A2 (en) 2010-03-15 2011-09-22 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US8411524B2 (en) 2010-05-06 2013-04-02 Micron Technology, Inc. Techniques for refreshing a semiconductor memory device
US8531878B2 (en) 2011-05-17 2013-09-10 Micron Technology, Inc. Techniques for providing a semiconductor memory device
US9559216B2 (en) 2011-06-06 2017-01-31 Micron Technology, Inc. Semiconductor memory device and method for biasing same
CN102969278A (zh) * 2011-08-31 2013-03-13 上海华力微电子有限公司 提高数据保持能力的浮体动态随机存储器单元制造方法
US8748285B2 (en) 2011-11-28 2014-06-10 International Business Machines Corporation Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate
CN102446929A (zh) * 2011-11-30 2012-05-09 上海华力微电子有限公司 Soi硅片及其制造方法、浮体效应存储器件
US10707352B2 (en) * 2018-10-02 2020-07-07 Qualcomm Incorporated Transistor with lightly doped drain (LDD) compensation implant
US12159873B2 (en) * 2021-06-21 2024-12-03 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10225234B4 (de) * 2001-06-07 2011-07-14 DENSO CORPORATION, Aichi-pref. Metalloxidhalbleitertransistor und Herstellungsverfahren für Selbigen
WO2003083937A3 (en) * 2002-03-26 2003-12-04 Advanced Micro Devices Inc Source-side stacking fault body-tie for partially-depleted soi mosfet hysteresis control
WO2007126807A1 (en) * 2006-04-28 2007-11-08 Advanced Micro Devices, Inc. An soi transistor having a reduced body potential and a method of forming the same
GB2451368A (en) * 2006-04-28 2009-01-28 Advanced Micro Devices Inc An SOI transistor having a reduced body potential and a method of forming the same
US7863171B2 (en) 2006-04-28 2011-01-04 Advanced Micro Devices, Inc. SOI transistor having a reduced body potential and a method of forming the same
GB2451368B (en) * 2006-04-28 2011-06-08 Advanced Micro Devices Inc An SOI transistor having a reduced body potential and a method of forming the same

Also Published As

Publication number Publication date
KR20010029737A (ko) 2001-04-16
US7358569B2 (en) 2008-04-15
US20030047784A1 (en) 2003-03-13
US6486513B1 (en) 2002-11-26
TW463380B (en) 2001-11-11
JP2001036092A (ja) 2001-02-09
KR100372668B1 (ko) 2003-02-17

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