JP4610982B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4610982B2 JP4610982B2 JP2004275701A JP2004275701A JP4610982B2 JP 4610982 B2 JP4610982 B2 JP 4610982B2 JP 2004275701 A JP2004275701 A JP 2004275701A JP 2004275701 A JP2004275701 A JP 2004275701A JP 4610982 B2 JP4610982 B2 JP 4610982B2
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- 239000004065 semiconductor Substances 0.000 title claims description 97
- 238000004519 manufacturing process Methods 0.000 title claims description 62
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 289
- 239000000758 substrate Substances 0.000 claims description 159
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 99
- 238000000034 method Methods 0.000 claims description 81
- 239000010703 silicon Substances 0.000 claims description 80
- 229910052710 silicon Inorganic materials 0.000 claims description 78
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 77
- 238000002955 isolation Methods 0.000 claims description 60
- 235000012239 silicon dioxide Nutrition 0.000 claims description 42
- 239000000377 silicon dioxide Substances 0.000 claims description 41
- 238000005530 etching Methods 0.000 claims description 34
- 238000010438 heat treatment Methods 0.000 claims description 21
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 18
- 239000000853 adhesive Substances 0.000 claims description 17
- 230000001070 adhesive effect Effects 0.000 claims description 17
- 238000005498 polishing Methods 0.000 claims description 16
- 238000005520 cutting process Methods 0.000 claims description 9
- 238000000926 separation method Methods 0.000 claims description 7
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 141
- 239000010408 film Substances 0.000 description 112
- 239000007789 gas Substances 0.000 description 16
- -1 hydrogen ions Chemical class 0.000 description 14
- 230000003647 oxidation Effects 0.000 description 14
- 238000007254 oxidation reaction Methods 0.000 description 14
- 229910052736 halogen Inorganic materials 0.000 description 12
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- 239000011521 glass Substances 0.000 description 10
- 238000005468 ion implantation Methods 0.000 description 10
- 239000011229 interlayer Substances 0.000 description 9
- 239000010409 thin film Substances 0.000 description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- 230000000694 effects Effects 0.000 description 7
- 229910052739 hydrogen Inorganic materials 0.000 description 7
- 239000001257 hydrogen Substances 0.000 description 7
- 239000012212 insulator Substances 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 238000000137 annealing Methods 0.000 description 6
- 230000005669 field effect Effects 0.000 description 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 239000013078 crystal Substances 0.000 description 5
- 239000007788 liquid Substances 0.000 description 5
- 239000011159 matrix material Substances 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 235000011114 ammonium hydroxide Nutrition 0.000 description 4
- 230000003749 cleanliness Effects 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 4
- 229910021426 porous silicon Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 238000002156 mixing Methods 0.000 description 3
- 150000003376 silicon Chemical class 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 238000005411 Van der Waals force Methods 0.000 description 2
- QGZKDVFQNNGYKY-UHFFFAOYSA-N ammonia Natural products N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000003814 drug Substances 0.000 description 2
- 229940079593 drug Drugs 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 150000002367 halogens Chemical class 0.000 description 2
- QOSATHPSBFQAML-UHFFFAOYSA-N hydrogen peroxide;hydrate Chemical compound O.OO QOSATHPSBFQAML-UHFFFAOYSA-N 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000001698 pyrogenic effect Effects 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 2
- 229910021342 tungsten silicide Inorganic materials 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Description
本発明の一実施の形態について説明すれば、以下の通りである。
本発明の別の実施の形態について説明すれば、以下の通りである。
2 シリコン層
3 BOX層(酸化物)
4 活性層
5 溝
6 溝
9 二酸化珪素(酸化物)
10 二酸化珪素(酸化物)
11 ゲート酸化膜
12 ゲート電極
13 層間絶縁膜(酸化物)
21 単結晶シリコン集積回路
31 非単結晶シリコントランジスタ
41 SOIウエハ
42 シリコン層
43 BOX層
44 活性層
45 溝
46 溝
50 二酸化珪素(酸化物)
51 ゲート酸化膜
52 ゲート電極
53 ソース・ドレイン
54 層間絶縁膜(酸化物)
55 コンタクト
56 メタル配線
57 層間絶縁膜(酸化物)
58 第2のコンタクト
59 第2のメタル配線
61 単結晶シリコン集積回路
71 非単結晶シリコントランジスタ
101 絶縁性基板
102 酸化膜
201 絶縁性基板
202 酸化膜
Claims (8)
- 絶縁性基板の上に、少なくとも単結晶シリコン集積回路が形成された半導体装置の製造方法において、
シリコン基板に埋め込みシリコン酸化膜層が設けられた半導体ウエハに、所望数の単結晶シリコン集積回路を形成し、該単結晶シリコン集積回路間及び該単結晶シリコン集積回路内の素子間を二酸化珪素からなる酸化物によって同時に分離するとともに前記単結晶シリコン集積回路の表面を二酸化珪素からなる酸化物で覆った後、該半導体ウエハから単結晶シリコン集積回路を上記シリコン酸化膜層を含めて切り出し、該半導体ウエハから切り出した状態の単結晶シリコン集積回路のシリコン酸化膜層とは反対側表面と、上記絶縁性基板とを接着剤を使用せずに貼り合わせることを特徴とする半導体装置の製造方法。 - 絶縁性基板の上に、少なくとも単結晶シリコン集積回路が形成された半導体装置の製造方法において、
シリコン基板に埋め込みシリコン酸化膜層が設けられた半導体ウエハの該シリコン酸化膜層上のシリコン活性層に、所望数の単結晶シリコン集積回路を形成し、該単結晶シリコン集積回路間の集積回路分離領域及び該単結晶シリコン集積回路内の素子間の素子分離領域に、該シリコン酸化膜層にまで達する深さの溝を形成し、該溝に二酸化珪素からなる酸化物を同時に充填するとともに前記単結晶シリコン集積回路の表面を二酸化珪素からなる酸化物で覆った後、該半導体ウエハから単結晶シリコン集積回路を上記シリコン酸化膜層を含めて切り出し、該半導体ウエハから切り出した状態の単結晶シリコン集積回路のシリコン酸化膜層とは反対側表面と、上記絶縁性基板とを接着剤を使用せずに貼り合わせることを特徴とする半導体装置の製造方法。 - 単結晶シリコン集積回路を絶縁性基板上に貼り合せた後、熱処理により貼り合せ強度を向上させることを特徴とする請求項1または2に記載の半導体装置の製造方法。
- 単結晶シリコン集積回路を絶縁性基板上に貼り合せ、熱処理を行う前もしくは後に、上記シリコン酸化膜層まで薄膜化することを特徴とする請求項1〜3の何れか1項に記載の半導体装置の製造方法。
- 上記半導体ウエハから単結晶シリコン集積回路を切り出す前に、上記半導体ウエハを薄層化し、
半導体ウエハを薄膜化した後に切り出しを行った単結晶シリコン集積回路と絶縁性基板とを貼り合わせた後、貼り合せ面側とは反対側を、上記シリコン酸化膜まで薄膜化することを特徴とする請求項3に記載の半導体装置の製造方法。 - 上記半導体ウエハから単結晶シリコン集積回路を切り出す前に、上記半導体ウエハを研磨及び/又はエッチングによって薄層化することを特徴とする請求項5に記載の半導体装置の製造方法。
- 単結晶シリコン集積回路を絶縁性基板上に作製した後、上記絶縁性基板の単結晶シリコン集積回路の貼り合わせ面側に非単結晶シリコントランジスタを形成することを特徴とする請求項1〜6の何れか1項に記載の半導体装置の製造方法。
- 非単結晶シリコントランジスタを絶縁性基板上に作製した後、上記絶縁性基板上に単結晶シリコン集積回路を作製することを特徴とする請求項1〜6の何れか1項に記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004275701A JP4610982B2 (ja) | 2003-11-11 | 2004-09-22 | 半導体装置の製造方法 |
US10/983,686 US7390696B2 (en) | 2003-11-11 | 2004-11-09 | Wafer, semiconductor device, and fabrication methods therefor |
KR1020040091536A KR100732403B1 (ko) | 2003-11-11 | 2004-11-10 | 웨이퍼와 반도체 장치 및 이들의 제조방법 |
EP04257009A EP1531489A3 (en) | 2003-11-11 | 2004-11-11 | Wafer, semiconductor device, and fabrication methods therefor |
US12/073,490 US20080164623A1 (en) | 2003-11-11 | 2008-03-06 | Wafer, semiconductor device, and fabrication methods therefor |
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JP2003380845 | 2003-11-11 | ||
JP2004275701A JP4610982B2 (ja) | 2003-11-11 | 2004-09-22 | 半導体装置の製造方法 |
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JP2005167197A JP2005167197A (ja) | 2005-06-23 |
JP4610982B2 true JP4610982B2 (ja) | 2011-01-12 |
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US (2) | US7390696B2 (ja) |
EP (1) | EP1531489A3 (ja) |
JP (1) | JP4610982B2 (ja) |
KR (1) | KR100732403B1 (ja) |
Families Citing this family (16)
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CN101401195B (zh) * | 2006-03-28 | 2010-11-03 | 夏普株式会社 | 半导体元件的转印方法和半导体装置的制造方法以及半导体装置 |
WO2007148448A1 (ja) * | 2006-06-20 | 2007-12-27 | Sharp Kabushiki Kaisha | 半導体装置及びその製造方法 |
JP2008147418A (ja) * | 2006-12-11 | 2008-06-26 | Hitachi Ltd | 薄膜トランジスタ装置、画像表示装置およびその製造方法 |
JP5243271B2 (ja) * | 2007-01-10 | 2013-07-24 | シャープ株式会社 | 半導体装置の製造方法、表示装置の製造方法、半導体装置、半導体素子の製造方法、及び、半導体素子 |
WO2008123117A1 (en) * | 2007-03-26 | 2008-10-16 | Semiconductor Energy Laboratory Co., Ltd. | Soi substrate and method for manufacturing soi substrate |
WO2008123116A1 (en) * | 2007-03-26 | 2008-10-16 | Semiconductor Energy Laboratory Co., Ltd. | Soi substrate and method for manufacturing soi substrate |
SG178762A1 (en) * | 2007-04-13 | 2012-03-29 | Semiconductor Energy Lab | Display device, method for manufacturing display device, and soi substrate |
WO2009084125A1 (ja) * | 2007-12-27 | 2009-07-09 | Sharp Kabushiki Kaisha | 半導体装置の製造方法及び半導体装置 |
JP5437626B2 (ja) * | 2007-12-28 | 2014-03-12 | 株式会社半導体エネルギー研究所 | 半導体装置及び半導体装置の作製方法 |
US20100289037A1 (en) * | 2008-01-15 | 2010-11-18 | Shin Matsumoto | Semiconductor device, manufacturing method thereof and display device |
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EP1531489A2 (en) | 2005-05-18 |
JP2005167197A (ja) | 2005-06-23 |
US20050098827A1 (en) | 2005-05-12 |
EP1531489A3 (en) | 2007-10-17 |
KR20050045893A (ko) | 2005-05-17 |
US7390696B2 (en) | 2008-06-24 |
KR100732403B1 (ko) | 2007-06-27 |
US20080164623A1 (en) | 2008-07-10 |
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