CN1716607A - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
- Publication number
- CN1716607A CN1716607A CNA2005100738401A CN200510073840A CN1716607A CN 1716607 A CN1716607 A CN 1716607A CN A2005100738401 A CNA2005100738401 A CN A2005100738401A CN 200510073840 A CN200510073840 A CN 200510073840A CN 1716607 A CN1716607 A CN 1716607A
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- insulating film
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- semiconductor substrate
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- 239000000758 substrate Substances 0.000 claims abstract description 93
- 238000002955 isolation Methods 0.000 claims abstract description 65
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 27
- 239000011148 porous material Substances 0.000 claims abstract description 17
- 239000012535 impurity Substances 0.000 claims description 37
- 238000000034 method Methods 0.000 claims description 37
- 239000011229 interlayer Substances 0.000 claims description 31
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- 150000001875 compounds Chemical class 0.000 claims description 17
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- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 claims description 9
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- 229920003209 poly(hydridosilsesquioxane) Polymers 0.000 claims description 6
- 238000009792 diffusion process Methods 0.000 claims description 5
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 31
- 229910052710 silicon Inorganic materials 0.000 description 31
- 239000010703 silicon Substances 0.000 description 31
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- 239000013078 crystal Substances 0.000 description 18
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- 229910052581 Si3N4 Inorganic materials 0.000 description 13
- 239000000203 mixture Substances 0.000 description 13
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 13
- 238000005229 chemical vapour deposition Methods 0.000 description 10
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- 125000001183 hydrocarbyl group Chemical group 0.000 description 2
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 241001274660 Modulus Species 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910002808 Si–O–Si Inorganic materials 0.000 description 1
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- 229910052751 metal Inorganic materials 0.000 description 1
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- HZBAVWLZSLOCFR-UHFFFAOYSA-N oxosilane Chemical compound [SiH2]=O HZBAVWLZSLOCFR-UHFFFAOYSA-N 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
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- 229910000077 silane Inorganic materials 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
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- CZDYPVPMEAXLPK-UHFFFAOYSA-N tetramethylsilane Chemical compound C[Si](C)(C)C CZDYPVPMEAXLPK-UHFFFAOYSA-N 0.000 description 1
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 1
- 229940094989 trimethylsilane Drugs 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02134—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising hydrogen silsesquioxane, e.g. HSQ
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02137—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising alkyl silsesquioxane, e.g. MSQ
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
- H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
- H01L21/3124—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds layers comprising hydrogen silsesquioxane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Non-Volatile Memory (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
Claims (14)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004154226A JP2005340327A (ja) | 2004-05-25 | 2004-05-25 | 半導体装置及びその製造方法 |
JP2004154226 | 2004-05-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1716607A true CN1716607A (zh) | 2006-01-04 |
CN100461414C CN100461414C (zh) | 2009-02-11 |
Family
ID=35446761
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100738401A Expired - Fee Related CN100461414C (zh) | 2004-05-25 | 2005-05-24 | 半导体器件及其制造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7279769B2 (zh) |
JP (1) | JP2005340327A (zh) |
KR (1) | KR100732647B1 (zh) |
CN (1) | CN100461414C (zh) |
TW (1) | TWI282141B (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101785095B (zh) * | 2007-08-16 | 2012-11-07 | 国立大学法人东北大学 | 半导体器件及其制造方法 |
CN104517816A (zh) * | 2013-10-08 | 2015-04-15 | 意法半导体公司 | 具有弛豫减少衬垫的半导体器件及其相关方法 |
CN105493254A (zh) * | 2013-09-26 | 2016-04-13 | 英特尔公司 | Nmos结构中形成位错增强的应变的方法 |
CN106575637A (zh) * | 2014-08-01 | 2017-04-19 | Soitec公司 | 用于射频应用的结构 |
CN107871740A (zh) * | 2016-09-27 | 2018-04-03 | 三星电子株式会社 | 在衬底和/或鳍中包括器件隔离区的半导体器件 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008117464A1 (ja) * | 2007-03-27 | 2008-10-02 | Fujitsu Microelectronics Limited | 半導体装置およびその製造方法 |
JP5525695B2 (ja) * | 2007-06-20 | 2014-06-18 | 株式会社東芝 | 半導体装置およびその製造方法 |
US7871895B2 (en) * | 2008-02-19 | 2011-01-18 | International Business Machines Corporation | Method and structure for relieving transistor performance degradation due to shallow trench isolation induced stress |
WO2010073947A1 (ja) * | 2008-12-25 | 2010-07-01 | 国立大学法人東北大学 | 半導体装置及びその製造方法 |
JPWO2011138906A1 (ja) * | 2010-05-07 | 2013-07-22 | 国立大学法人東北大学 | 半導体装置の製造方法 |
JP2012009791A (ja) * | 2010-06-28 | 2012-01-12 | Panasonic Corp | 固体撮像装置及びその製造方法 |
JP5405437B2 (ja) * | 2010-11-05 | 2014-02-05 | AzエレクトロニックマテリアルズIp株式会社 | アイソレーション構造の形成方法 |
JP2012134302A (ja) * | 2010-12-21 | 2012-07-12 | Jsr Corp | トレンチ埋め込み方法、及びトレンチ埋め込み用組成物 |
JP2013074169A (ja) * | 2011-09-28 | 2013-04-22 | Kyocera Corp | 薄膜配線基板 |
US10822692B2 (en) | 2016-08-12 | 2020-11-03 | University Of North Texas | Binary Ag—Cu amorphous thin-films for electronic applications |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2932552B2 (ja) * | 1989-12-29 | 1999-08-09 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JPH0547918A (ja) | 1991-08-13 | 1993-02-26 | Hitachi Ltd | 半導体装置の製造方法 |
JPH05114646A (ja) | 1991-10-24 | 1993-05-07 | Fujitsu Ltd | 半導体装置の製造方法 |
JPH0697274A (ja) | 1992-09-14 | 1994-04-08 | Hitachi Ltd | 素子分離方法 |
JPH0897210A (ja) | 1994-09-28 | 1996-04-12 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP3542189B2 (ja) * | 1995-03-08 | 2004-07-14 | 株式会社ルネサステクノロジ | 半導体装置の製造方法及び半導体装置 |
US5707888A (en) * | 1995-05-04 | 1998-01-13 | Lsi Logic Corporation | Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation |
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- 2005-04-22 TW TW094112882A patent/TWI282141B/zh not_active IP Right Cessation
- 2005-05-24 CN CNB2005100738401A patent/CN100461414C/zh not_active Expired - Fee Related
- 2005-05-24 KR KR1020050043401A patent/KR100732647B1/ko not_active IP Right Cessation
- 2005-05-25 US US11/139,002 patent/US7279769B2/en not_active Expired - Fee Related
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CN101785095B (zh) * | 2007-08-16 | 2012-11-07 | 国立大学法人东北大学 | 半导体器件及其制造方法 |
CN105493254A (zh) * | 2013-09-26 | 2016-04-13 | 英特尔公司 | Nmos结构中形成位错增强的应变的方法 |
US11107920B2 (en) | 2013-09-26 | 2021-08-31 | Intel Corporation | Methods of forming dislocation enhanced strain in NMOS structures |
US11411110B2 (en) | 2013-09-26 | 2022-08-09 | Intel Corporation | Methods of forming dislocation enhanced strain in NMOS and PMOS structures |
US11482618B2 (en) | 2013-09-26 | 2022-10-25 | Daedalus Prime Llc | Methods of forming dislocation enhanced strain in NMOS and PMOS structures |
US11610995B2 (en) | 2013-09-26 | 2023-03-21 | Daedalus Prime Llc | Methods of forming dislocation enhanced strain in NMOS and PMOS structures |
CN104517816A (zh) * | 2013-10-08 | 2015-04-15 | 意法半导体公司 | 具有弛豫减少衬垫的半导体器件及其相关方法 |
CN106575637A (zh) * | 2014-08-01 | 2017-04-19 | Soitec公司 | 用于射频应用的结构 |
CN106575637B (zh) * | 2014-08-01 | 2019-11-19 | Soitec公司 | 用于射频应用的结构 |
CN107871740A (zh) * | 2016-09-27 | 2018-04-03 | 三星电子株式会社 | 在衬底和/或鳍中包括器件隔离区的半导体器件 |
Also Published As
Publication number | Publication date |
---|---|
CN100461414C (zh) | 2009-02-11 |
KR100732647B1 (ko) | 2007-06-27 |
KR20060048071A (ko) | 2006-05-18 |
JP2005340327A (ja) | 2005-12-08 |
US20050269662A1 (en) | 2005-12-08 |
TW200605264A (en) | 2006-02-01 |
US7279769B2 (en) | 2007-10-09 |
TWI282141B (en) | 2007-06-01 |
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