CN104051376A - 功率覆盖结构及其制作方法 - Google Patents

功率覆盖结构及其制作方法 Download PDF

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CN104051376A
CN104051376A CN201410094324.6A CN201410094324A CN104051376A CN 104051376 A CN104051376 A CN 104051376A CN 201410094324 A CN201410094324 A CN 201410094324A CN 104051376 A CN104051376 A CN 104051376A
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semiconductor device
layer
conduction pad
pol
dielectric layer
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CN104051376B (zh
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A.V.高达
S.S.乔汉
P.A.麦康奈利
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General Electric Co
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General Electric Co
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Abstract

一种半导体装置模块，包括：介电层；半导体装置，其具有联接到介电层上的第一表面；以及传导垫片，其具有联接到介电层的第一表面。该半导体装置还包括导电散热器，其具有联接到半导体装置的第二表面和传导垫片的第二表面的第一表面。金属化层联接到半导体装置的第一表面和传导垫片的第一表面。金属化层延伸穿过介电层并且通过传导垫片和散热器电连接到半导体装置的第二表面。

Description

功率覆盖结构及其制作方法
相关申请的交叉引用
本申请主张2013年3月14日提交的美国临时专利申请序列第61/784,834号的优先权，该申请的公开内容通过引用合并于本文中。
技术领域
本发明的实施例大体上涉及用于封装半导体装置的结构和方法，并且更具体地涉及包括改善的热界面的功率覆盖(power overlay，POL)封装结构。
背景技术
功率半导体装置为用作功率电子电路中的开关或整流器的半导体装置，例如开关式电源。大部分功率半导体装置仅用于通信模式(即，它们或者导通或者截止)，且因此对此进行优化。许多功率半导体装置用于高电压功率应用中且被设计成携带大量电流且支持大电压。在使用中，高电压功率半导体装置经由功率覆盖(POL)封装和互连系统而连接到外部电路上。
图1中示出了现有技术的功率覆盖(POL)结构10的总体结构。用于POL结构10的标准制造过程通常以将一个或多个功率半导体装置12通过粘合剂16置于介电层14上来开始。金属互连件18(例如，铜互连件)然后电镀到介电层14上来形成与功率半导体装置12的直接金属连接。金属互连件18可为低轮廓(例如，小于200微米厚)平坦互连结构的形式，其提供往返于功率半导体装置12的输入/输出(I/O)系统20的形成。为了连接到外部电路上，如，通过产生与印刷电路板的第二级互连，例如，目前的POL封装件使用焊球栅阵列(BGA)或盘栅阵列(LGA)。
散热件22通常也包括在POL结构10中，以提供移除由半导体装置12生成的热并保护装置12免受外部环境的方式。散热件22使用直接覆铜(DBC)基底24来热联接到装置12上。如图所示，DBC基底24定位在半导体装置12的上表面与散热件22的下表面之间。
DBC基底24为预制构件，其包括非有机陶瓷基底26，例如矾土，其中上铜片28和下铜片30通过直接覆铜界面或铜焊层31来结合到其两侧上。DBC基底24的下铜片30图案确定为在DBC基底24附接到半导体装置12上之前形成一定数目的传导接触区域。通常，DBC基底可具有大约1mm的总体厚度。
在POL结构10的制造过程期间，焊料32施加到半导体装置12的表面上。DBC基底24然后落到焊料32上来使下铜片30的图案部分与焊料32对准。在DBC基底24联接到半导体装置12上之后，底部填充技术用于将介电有机材料34施加到粘合层16与DBC基底24之间的空间中来形成POL子模块36。热垫或热脂38然后施加到DBC基底24的上铜层28上。
在POL结构10中使用DBC基底具有许多限制。首先，DBC基底的铜和陶瓷材料的材料性质对DBC基底的设计带来了固有限制。例如，由于陶瓷的固有刚性和DBC基底24的铜和陶瓷材料的热膨胀系数差异，故铜片28、30必须保持相对较薄，以避免由铜材料中的大的温度波动引起过度的应力置于陶瓷上。此外，由于面对半导体装置12的DBC基底24的下铜层的表面是平坦的，故DBC基底24不会促进具有不同高度的半导体装置的POL封装件的制造。
另外，DBC基底制造相对昂贵，且为预制构件。当DBC基底24为预制构件时，铜片28、30的厚度基于施加到陶瓷基底26上的铜箔层的厚度确定。另外，由于DBC基底24在与POL结构的构件的其余部分组装之前制造，故包绕半导体装置12的介电填料或环氧树脂基底在DBC基底24联接到半导体装置12上之后使用底部填充技术来施加。这种底部填充技术耗时，且可导致POL结构内的不期望的空隙。
因此，将期望提供一种POL结构，其具有改善的热界面，其克服合并DBC基底的已知POL结构的前述结构和处理限制。还将期望的此类POL结构应对不同厚度的半导体装置，同时最大限度地降低POL结构的成本。
发明内容
本发明的实施例通过功率覆盖（POL）结构来克服前述缺陷，其排除了DBC基底在POL子模块与散热件之间的热界面上的使用。提供改善的热界面用于半导体装置，其包括应对具有不同高度的半导体装置的传导垫片。
根据本发明的一方面，一种半导体装置模块包括：介电层；半导体装置，其具有联接到介电层上的第一表面；传导垫片，其具有联接到介电层的第一表面。该半导体装置还包括导电散热器，其具有联接到半导体装置的第二表面和传导垫片的第二表面的第一表面。金属化层联接到半导体装置的第一表面和传导垫片的第一表面。金属化层延伸穿过介电层并且通过传导垫片和散热器电连接到半导体装置的第二表面。
根据本发明的另一方面，一种形成半导体装置封装的方法，包括：将半导体装置的第一表面附连到介电层的第一表面；以及将传导垫片的第一表面附连到介电层的第一表面。该方法还包括：将散热器安置到半导体装置的第二表面上和传导垫片的第二表面上，散热器将半导体装置电联接到传导垫片；以及在介电层的第二表面上形成金属互连结构。金属互连结构延伸穿过在介电层中形成的通孔以接触半导体装置的第一表面和传导垫片的第一表面。
根据本发明的又一方面，一种功率覆盖（POL）结构，包括：绝缘基底；功率装置，其经由粘合层附接到绝缘基底上；以及，导电垫片，其经由粘合层附接到绝缘基底上。该POL结构还包括导电和导热板条，其联接到功率装置的顶表面和传导垫片的顶表面；以及，金属化层，其延伸穿过绝缘基底。金属化层电联接成接触功率装置的第一表面和第二表面上的位置。
根据一实施例，一种半导体装置模块，包括：介电层；半导体装置，其具有联接到介电层上的第一表面；传导垫片，其具有联接到介电层的第一表面；导电散热器，其具有第一表面，第一表面联接到半导体装置的第二表面和传导垫片的第二表面；以及
金属化层，其联接到半导体装置的第一表面和传导垫片的第一表面，金属化层延伸穿过介电层并且通过传导垫片和散热器电连接到半导体装置的第二表面。
根据一实施例，半导体装置包括功率装置。
根据一实施例，半导体装置的第二表面和传导垫片的第二表面大致共面。
根据一实施例，还包括：热界面层，其涂布散热器的第二表面，热界面层包括电绝缘并且导热的材料。
根据一实施例，热界面层包括有机材料和悬浮于树脂中的多个导电粒子中的至少一种。
根据一实施例，还包括散热件，其联接到热界面层。
根据一实施例，还包括传导接触层，其将半导体装置和传导垫片联接到散热器。
根据一实施例，散热器的第二表面向周围空气暴露用于对流传热。
根据一实施例，还包括包封件，其包围半导体装置和传导垫片。
根据一实施例，一种形成半导体装置封装的方法，包括：提供半导体装置；将半导体装置的第一表面附连到介电层的第一表面；将传导垫片的第一表面附连到介电层的第一表面；将散热器安置到半导体装置的第二表面和传导垫片的第二表面上，散热器将半导体装置电联接到传导垫片；以及在介电层的第二表面上形成金属互连结构，金属互连结构延伸穿过在介电层中形成的通孔，以接触半导体装置的第一表面和传导垫片的第一表面。
根据一实施例，还包括：利用聚合物材料来包封半导体装置、传导垫片和散热器的至少一部分。
根据一实施例，还包括：在散热器的顶表面上形成热界面层。
根据一实施例，还包括：将散热件联接到热界面层。
根据一实施例，还包括：利用介电材料底部填充在介电层与热界面层之间的空间。
根据一实施例，一种功率覆盖（POL）结构，包括：绝缘基底；功率装置，其经由粘合层附接到绝缘基底上；导电垫片，其经由粘合层附接到绝缘基底上；导电和导热板条，其联接到功率装置的顶表面和传导垫片的顶表面；以及金属化层，其延伸穿过绝缘基底，金属化层电联接成接触功率装置的第一表面和第二表面上的位置。
根据一实施例，功率装置和传导垫片的顶表面大致共面。
根据一实施例，还包括电绝缘层，其具有联接到导电散热器的第一侧。
根据一实施例，电绝缘层包括有机导热材料。
根据一实施例，还包括散热件，其联接到电绝缘层的第二侧。
根据一实施例，电绝缘层包括多层基底，多层基底包括：第一层，其具有联接到导电散热器的第一表面；第二层，其具有联接到散热件的第一表面；以及陶瓷层，其联接于第一层与第二层之间。
通过结合附图提供的本发明的优选实施例的下文的详细描述，这些和其它优点和特征将会更易于理解。
附图说明
附图示出了当前构想成用于执行本发明的实施例。
在附图中：
图1为合并DBC基底的现有技术的功率覆盖(POL)结构的示意性截面侧视图。
图2为根据本发明的实施例的POL结构的示意性截面侧视图。
图3为根据本发明的另一个实施例的POL结构的示意性截面侧视图。
图4为根据本发明的又一个实施例的POL结构的示意性截面侧视图。
图5为根据本发明的实施例的POL组件的示意性截面侧视图。
图6至图16为根据本发明的实施例的在制造/构建过程的各种阶段期间的POL子模块的示意性截面侧视图。
图17为根据本发明的另一个实施例的带引线的POL子模块的一部分的示意性截面侧视图。
图18为根据本发明的另一个实施例的带引线的POL子模块的一部分的示意性截面侧视图。
图19为根据本发明的实施例的具有阶梯传导垫片的POL子模块的一部分的示意性截面侧视图。
图20为根据本发明的实施例的具有多层传导垫片组件的POL子模块的一部分的示意性截面侧视图。
图21为根据本发明的另一实施例的POL子模块的一部分的示意截面侧视图。
图22为根据本发明的另一实施例的POL子模块的一部分的示意截面侧视图。
图23为根据本发明的另一实施例的POL子模块的一部分的示意截面侧视图。
具体实施方式
本发明的实施例提供了一种具有包括在其中的改善的热界面的功率覆盖(POL)结构，以及用于形成此类POL结构的方法。POL结构包括应对不同高度的半导体装置的传导垫片和增加包封材料和方法选择的热界面层。
参看图2，示出了根据本发明的实施例的半导体装置组件或功率覆盖(POL)结构40。POL结构40包括具有在其中的一个或多个半导体装置43、44、45的POL子模块42，根据各种实施例，半导体装置可为管芯、二极管或其它功率电气装置的形式。如图2中所示，三个半导体装置43、44、45设在POL子模块42中，然而将认识到的是，更多或更少数目的半导体装置43、44、45可包括在POL子模块42中。另外，虽然部件44和45在本文中被描述为半导体装置，但是部件44、45中的一个或多个可为导电垫片，如关于图21至图23更详细地描述的。除半导体装置43、44、45之外，POL子模块42还可包括任何数目的附加电路构件46，例如，门驱动器。
半导体装置43、44、45通过粘合层50联接到介电层48上。介电层48可根据各种实施例为叠层或膜的形式，且可由多种介电材料中的一种形成，如，Kapton®、Ultem®、聚四氟乙烯(PTFE)、Upilex®、聚砜材料(例如，Udel®、Radel®)或另一种聚合物膜，如，液晶聚合物(LCP)或聚酰亚胺材料。
POL子模块42还包括金属化层或互连结构52，其通过金属互连件54形成与半导体装置43、44、45的直接金属连接，金属互连件54延伸穿过形成在介电层48中的通孔56来连接到相应的半导体装置43、44、45上的接触垫58上。
POL子模块42还包括一个或多个传导板条或散热器60，其利用导热和导电的接触层62来固定到半导体装置43、44、45上。根据各种实施例，例如，传导接触层62可为焊料材料、传导粘合剂或烧结的银。传导垫片60为金属和合金材料，例如铜、铝、钼或它们的组合，如，铜钼或铜钨，以及复合材料，如，铝硅、碳化铝硅、铝-石墨、铜-石墨等。
介电填料材料64也设在POL子模块42中，以在POL子模块42中填充在半导体装置43、44、45与传导垫片60之间和周围的间隙，以便向POL子模块42提供附加的结构完整性。根据各种实施例，介电填料材料64可为聚合材料的形式，例如，底部填充剂(例如，毛细底部填充剂或非流动的底部填充剂)、包封件、硅酮或模制化合物。
POL结构40还包括便于冷却半导体装置43、44、45的散热件66。散热件66包括具有高热导率的材料，如，铜、铝或复合材料。散热件66通过形成在传导垫片60和介电填料材料64上的热界面基底或层68来联接到POL子模块42上。
热界面层68为导热的电绝缘的聚合材料或有机材料，例如，热垫、热浆料、热脂或热粘合剂。热界面层68使散热件66与传导垫片60电绝缘。根据一个实施例，热界面层68包括悬浮在树脂或环氧树脂的基质中的传导填料、颗粒或纤维。例如，热界面层68可为环氧树脂或硅树脂，其填充有导热的电绝缘的填料，如矾土和/或氮化硼。根据一个实施例，热界面层68具有大约100μm的厚度。然而，本领域的技术人员将认识到的是，热界面层68的厚度可基于设计规格变化。热界面层68提供相比于DBC基底优异的热性能，因为热界面层68不会经历包括在DBC基底内的陶瓷层的热阻。
在热界面层68为热浆料、热脂或热垫(例如，预成形的有机材料片或膜)的实施例中，在围绕POL子模块42的周边的一定数目的位置处，散热件66使用螺钉或其它紧固装置(未示出)固定到POL子模块42上，引起热界面层68夹在传导垫片60与散热件66之间。作为备选，在热界面层68为聚合粘合剂的实施例中，热界面层68以胶粘状态施加到POL子模块42上，且在散热件66定位到热界面层68的顶部上之后固化，从而在没有附加紧固件的情况下将散热件66结合到POL子模块42上。如参照图5更详细描述那样，POL子模块42还包括输入-输出(I/O)连接70，其使POL结构40能够表面安装到外部电路上，如，印刷电路板(PCB)。根据示例性实施例，I/O连接70由焊球栅阵列(BGA)焊料焊盘72形成，其构造成附接/附连到PCB上来将POL结构40电联接到PCB上，尽管也可使用其它适合的第二级焊料互连件，如，盘栅阵列(LGA)。BGA焊料焊盘72提供高度可靠的互连结构，其在高应力状态下抵抗故障。如图2中所示，焊料焊盘72定位在形成于POL子模块42的焊料掩模层74中的开口中。
现在参看图3，示出了根据本发明的备选实施例的POL结构76和POL子模块78。POL结构76和POL子模块78包括类似于图2中的POL结构40和POL子模块42中所示的构件的一定数目的构件，且因此用于指出图2中的构件的标号将用于指出图3中的类似构件。
如图所示，POL子模块78包括定位在传导垫片60与散热件66之间的多层热界面80。多层热界面80包括第一热界面层82、陶瓷绝缘层84和第二热界面层86。陶瓷绝缘层84包括在POL子模块78与散热件66之间对于高电压应用提供了附加的电绝缘。例如，绝缘层84可由陶瓷材料如矾土或氮化铝构成。
如图所示，第一热界面层82夹在传导垫片60与陶瓷绝缘层84之间。根据一个实施例，图3的第一热界面层82包括类似于图2中的热界面层68的导热电绝缘的材料，允许热从传导垫片60传递至散热件66，同时使传导垫片60与散热件66电绝缘。在示例性实施例中，第一热界面层82包括填充有导热但电绝缘的填料如矾土或氮化硼的环氧树脂或硅树脂。
在备选实施例中，第一热界面层82包括导电材料，例如焊料、传导粘合剂或烧结的银，传导材料形成为传导垫片60顶部上的一定数目的不连续的垫88，如图4中所示。根据各种实施例，邻接的垫88之间的侧向空间90可留下作为空气间隙，或填充介电填料材料64。
现在一起参看图3和图4，第二热界面层86夹在陶瓷绝缘层84与散热件66之间。根据一个实施例，第二热界面层86包括类似于图2中的热界面层68的导热电绝缘的材料。在备选实施例中，第二热界面层86为既导热又导电的材料，例如，填充有银的环氧树脂或硅树脂。
图5示出了根据本发明的实施例的合并POL结构40(图2)和POL结构76(图3、图4)的POL组件92。如图所示，POL结构40、76的相应的I/O连接70联接到外部电路构件94上，例如印刷电路板(PCB)。尽管POL组件92中示出了两个POL结构40、76，但本领域的技术人员将认识到的是根据本发明的各种实施例，POL组件92可包括任何数目的POL结构。此外，POL组件92可包括单个类型的多个POL结构，如，两个或多个POL结构40，或两个或多个POL结构76。
虽然关于图2至图5描述的实施例被示出包括散热件66，但是本领域技术人员将认识到散热件66可以在包括低功率或无功率半导体装置的POL结构中省略。在这样的实施例中，热界面层68、80也可被可选地省略，从而使传导垫片的顶表面暴露用于对流传热。
现在参看图6至图16，根据本发明的实施例，提供了图2中的POL子模块42和图3与图4中的POL子模块78的制造技术的过程步骤的详细视图。首先参看图6，POL子模块42、78的构建过程以将粘合层50施加到介电层48上开始。在技术的下一步中，如图7中所示，一个或多个半导体装置44、45(例如，两个半导体装置)通过粘合层50固定到介电层48上。为了将半导体装置44、45固定到介电层48上，半导体装置44、45的顶表面96置于粘合层50上。粘合剂50然后固化来将半导体装置44、45固定到介电层48上。
如图8中所示，多个通孔56然后形成为穿过粘合层50和介电层48。根据本发明的实施例，通孔56可通过激光烧蚀或激光钻孔过程、等离子蚀刻、光限定(photo-definition)或机械钻孔过程形成。
尽管穿过粘合层50和介电层48形成通孔56在图8中示为在将半导体装置44、45置于粘合层50上之后执行，但将认识到的是，半导体装置44、45的放置可发生在通孔形成之后。作为备选，取决于由通孔尺寸施加的约束，半导体装置44、45可首先置于粘合层50和介电层48上，其中通孔56随后形成在对应于形成在半导体装置44、45上的多个金属化的电路和/或连接垫接触垫58的位置处。此外，可使用预先钻孔的通孔和后钻孔的通孔的组合。
现在参看图9和图10，在将半导体装置44、45固定到介电层48上且形成通孔56时，通孔56被清洁(如，通过活性离子蚀刻(RIE)除尘过程)且随后金属化来形成金属化层或互连层54。金属化层54通常通过溅射和电镀应用的组合来形成，尽管认识到也可使用金属沉积的其它无电方法。例如，钛粘附层和铜晶种层可首先经由溅射过程来施加，随后为电镀过程，其将铜的厚度增加到期望的水平。然后将所施加的金属材料图案确定为具有所期望的形状的金属互连件54，且其功能为通过介电层48和粘合层50形成的竖直馈通。金属互连件54从半导体装置44、45的电路和/或连接垫接触垫58延伸出来，穿过通孔/开口56，且穿出介电层48的顶表面98。
如图11中所示，焊料掩模层74施加到图案化金属互连件54上，以提供保护性涂层并限定互连垫。在备选实施例中，将认识到的是，互连垫可具有有助于可焊接性的金属精整，如，Ni或Ni/Au。
现在参看图12，在制造技术的下一个步骤中，传导接触层62施加到半导体装置44、45的底表面100上。传导垫片60的底表面102然后通过传导接触层62联接到半导体装置44、45上。
根据本发明的一个实施例，且如图12中所示，半导体装置44、45可具有变化的厚度/高度。为了平衡相应的半导体装置44、45的总体高度，传导垫片60可为不同高度，以便各个半导体装置44、45/传导垫片对60的总体厚度/高度相等，且传导垫片60的后表面"平坦化(planarized)"。
如图13中所示，制造POL子模块42、78的构建技术继续施加介电填料材料64来在POL子模块42、78中填充于半导体装置44、45与传导垫片60之间和周围的间隙，以便约束介电层48，且向POL子模块42、78提供附加的电绝缘和结构完整性。在一个实施例中，介电填料材料64使用包覆模制技术施加且固化。在介电填料材料64固化之后，介电填料材料64的部分104使用磨削操作移除来露出传导垫片60。如图14中所示，该磨削操作还可用于移除传导垫片60的高度上的任何变化，以便传导垫片60的顶表面106和介电填料材料64的顶表面108共面。作为备选，包覆模制或包封技术可用于施加介电填料材料64，使得固化的介电填料材料64的顶表面108与没有磨削步骤的传导垫片60的顶表面106齐平。在又一个实施例中，介电填料材料64可使用底部填充技术来施加。
在制造过程的下一步骤中，如图15中所示，热界面112的第一侧110施加到传导垫片60和介电填料材料64的相应的顶表面106、108上。在热界面112包括单个热界面层68(图2)的实施例中，热界面112在一个步骤中施加到传导垫片60和介电填料材料64的顶表面106、108上。作为备选，热界面112可为如图3和图4中所示的多层热界面80。还参看图3和图4，多层热界面80的独立层使用构建技术按顺序施加到传导垫片60和介电填料材料64的顶表面106、108上，其中第一热界面层82施加到介电填料材料64和传导垫片60的顶部上，陶瓷绝缘层84接下来施加到第一热界面层82的顶部上，且第二热界面层86最后施加到陶瓷绝缘层84的顶表面上。
在制造技术的下一个步骤中，I/O连接70施加到焊料掩模层74上。在一个实施例中，如图16中所示，I/O连接70为焊料焊盘72。在构建技术的备选实施例中，如图17中所示，I/O连接70构造为用于贯穿孔构件的引线114。在POL子模块42、78的构建过程完成之后，散热件66附连到热界面112的第二侧116上。POL子模块42、78可为单一的以用于表面安装到外部电路上，如PCB94(图5)。
现在参看图18，示出了POL子模块118的备选实施例。POL子模块118包括类似于图2中的POL子模块42中所示的构件的一定数目的构件，且因此用于指出图2中的构件的标号还将用于指出图18中的类似构件。
如图所示，POL子模块118包括通过粘合层50安装到介电层48上的半导体装置44。金属互连件54延伸穿过形成在介电层48中的通孔56，以将接触垫(未示出)连接到半导体装置44上。传导垫片120通过传导接触层62联接到各个半导体装置44上。类似于图2的传导垫片60，传导垫片120包括金属或合金材料，例如，铜、铝、钼或它们的组合。介电填料材料64提供成在POL子模块118中填充在半导体装置44与传导垫片120之间和周围的间隙。热界面112如热界面层68(图2)或多层热界面80(图3)设在介电填料材料64和传导垫片120的顶部上。
如图18中所示，传导垫片120联接到引线框架122上。根据本发明的实施例，引线框架122在将传导垫片120置入传导接触层62中之前预先附接到传导垫片120上。例如，引线框架122和引导垫片60可由普通铜板预先制造，或引线框架122可通过高温联接过程预先附接到传导垫片60上，如，软钎焊、铜焊、焊接或用于组装到POL子模块118中的其它类似的方法。作为备选，将认识到的是，引线框架122可改为在完成POL子模块118的制造之后后附接。
现在参看图19和图20，示出了POL子模块124的两个备选实施例，其应对POL子模块124包括不同高度的半导体装置126、128的情形。另外，POL子模块124包括类似于图2中的POL子模块42中所示的构件的一定数目的构件，且因此用于指出图2中的构件的标号还将用于指出图19和图20中的类似构件。
首先参看图19，示出了包括具有阶梯构型的传导垫片130的备选实施例。如图所示，传导垫片130的第一部分132具有第一高度或厚度134，且传导垫片130的第二部分136具有第二高度或厚度138，其应对半导体装置126、128的不同高度，同时保持传导垫片130的平坦顶表面140。
图20中示出了POL子模块24的备选实施例，其中第一传导垫片142使用第一传导接触层144联接到半导体装置126上，第一传导接触层144例如，类似于传导接触层62(图2)的焊料。第一传导垫片142尺寸确定为使得第一传导垫片142的上表面146和半导体装置128的上表面148共面。第二传导接触层150然后施加到第一传导垫片142和半导体装置128的顶表面上。在一个实施例中，第二传导接触层150包括焊料。尺寸确定为至少跨越半导体装置126、128的整个宽度的第二传导垫片152然后附连到如图所示的第二传导垫片152上。
虽然本发明的实施例被描述为包括用于高电压功率应用的功率半导体装置，但本领域技术人员将认识到本文中所陈述的技术同样可适用于合并无功率半导体装置或具有仅延伸到半导体装置的单侧的电连接件的半导体装置的低功率应用和芯片封装。在这样的应用中，可形成集成芯片封装，类似于POL子模块42（图2），但并无热界面层，如关于图21更详细地描述，从而使得传导垫片60的背侧暴露用于对流冷却。替代地，热界面层68可形成于传导垫片60顶部以提供在传导垫片60与周围环境之间的电绝缘并且防止短路，如关于图22更详细地描述地。
现参考图21至图23，半导体装置组件113关于本发明的替代实施例描述。半导体装置组件113包括与图2的POL子模块42中示出的构件相似的多个构件，在本文中使用类似的附图标记指示类似构件。
首先参考图21所示的实施例，半导体装置组件113包括联接到介电层48的顶表面上的半导体装置44。根据各种实施例，半导体装置44为功率半导体装置，诸如开关或整流器。半导体装置组件113还包括导电垫片45。传导垫片45为导电材料，诸如铜、铜-钼、铜-钨、铝-硅、铝-碳化硅、铝-石墨、铜-石墨等。
如图所示，半导体装置44的第一表面39和传导垫片45的第一表面41经由粘合层50联接到介电层48。传导垫片45的大小使得传导垫片45的第二表面49与半导体装置44的第二表面47基本上共面，如图21所示。传导板条或散热器60经由传导接触层62联接到半导体装置44的第二表面47和传导垫片45的第二表面49。
传导接触层62为导电和导热材料，诸如例如，焊料材料、传导粘合剂或烧结银。散热器60包括导热和导电的材料。因此，散热件60将半导体装置44的第二表面47电联接到传导垫片45并且便于远离半导体装置44的传热。金属化层54延伸穿过在介电层48中形成的通孔56并且形成到半导体装置44的第一表面39和第二表面47的电连接。
根据其中半导体装置44为低功率装置的实施例，传导板条60的顶表面59可保持暴露用于对流冷却，如图21所示。替代地，如图22中所示，热界面112诸如热界面层68（图2）或其它绝缘材料可作为保护层施加以涂布传导板条60的顶表面59。
参考图23，在其中半导体装置44为高功率装置的实施例中，散热件，诸如散热件66经由热界面层112联接到传导板条60以提供用于半导体装置44的额外传热。根据各种实施例，热界面层112可为单层基底，其为导热的并且导电或电绝缘的，如关于热界面层68所描述地（图2）。替代地，热界面层112可为类似于关于图3和图4所描述的热界面层80的多层基底。
虽然在图21至图23中公开的实施例在上文中描述为包括一个功率半导体装置44、传导垫片45和散热器60，但是本领域技术人员将认识到在本发明的范围内半导体装置组件113可被制造成具有一个或多个半导体装置、传导垫片和散热器。
有利的是，本发明的实施例因此提供了一种POL封装和互连结构，其包括没有DBC基底的缺陷的热界面。例如，由于热界面层68和多层热界面80可在发生于介电填料材料64被施加且固化之后的制造步骤中应用，故介电填料材料64可使用包封或包覆模制技术施加，而非更昂贵且耗时的底部填充过程，底部填充过程更可能导致空隙。另外，由于在封装构建过程期间形成热界面，而非提供为预制构件，故热界面的尺寸和材料可基于期望的操作特征来定制。此外，使用传导垫片60、120、130、142和/或152提供了应对不同高度的半导体装置的能力。
因此，根据本发明的一实施例，半导体装置模块包括：介电层；半导体装置，其具有联接到介电层的第一表面；以及，传导垫片，其具有联接到介电层的第一表面。半导体装置还包括导电散热器，导电散热器具有联接到半导体装置的第二表面和传导垫片的第二表面的第一表面。金属化层联接到半导体装置的第一表面和传导垫片的第一表面。金属化层延伸穿过介电层并且通过传导垫片和散热器电连接到半导体装置的第二表面。
根据本发明的另一实施例，一种形成半导体装置封装的方法包括提供半导体装置；将半导体装置的第一表面附连到介电层的第一表面；以及，将传导垫片的第一表面附连到介电层的第一表面上。该方法还包括将散热器安置于半导体装置的第二表面和传导垫片的第二表面上，散热器将半导体装置电联接到传导垫片；以及，在介电层的第二表面上形成金属互连结构。该金属互连结构延伸穿过在介电层中形成的通孔以接触半导体装置的第一表面和传导垫片的第一表面。
根据本发明的又一方面，功率覆盖(POL)结构包括：绝缘基底；功率装置，其经由粘合层附接到绝缘基底上；以及，导电垫片，其经由粘合层附接到绝缘基底上。POL结构还包括：导电和导热板条，其联接到功率装置的顶表面和传导垫片的顶表面；以及，金属化层，其延伸穿过绝缘基底。金属化层电联接以接触在功率装置的第一表面和第二表面上的位置。
尽管已经仅结合有限数目的实施例详细描述了本发明，但应容易理解的是，本发明不限于此类公开的实施例。相反，本发明可改变来合并迄今未描述的任何数目的改型、变化、置换或等同布置，但这与本发明的要旨和范围相当。此外，尽管已经描述了本发明的各种实施例，但将理解的是本发明的方面可仅包括所述的实施例中的一些。因此，本发明不被看作是由前述描述限制，而是仅由所附权利要求的范围限制。

Claims (10)

1.一种半导体装置模块，包括：
介电层；
半导体装置，其具有联接到所述介电层上的第一表面；
传导垫片，其具有联接到所述介电层的第一表面；
导电散热器，其具有第一表面，所述第一表面联接到所述半导体装置的第二表面和所述传导垫片的第二表面；以及
金属化层，其联接到所述半导体装置的第一表面和所述传导垫片的第一表面，所述金属化层延伸穿过所述介电层并且通过所述传导垫片和所述散热器电连接到所述半导体装置的第二表面。
2.根据权利要求1所述的半导体装置封装，其特征在于，所述半导体装置包括功率装置。
3.根据权利要求1所述的半导体装置封装，其特征在于，所述半导体装置的第二表面和所述传导垫片的第二表面大致共面。
4.根据权利要求1所述的半导体装置封装，其特征在于，还包括：热界面层，其涂布所述散热器的第二表面，所述热界面层包括电绝缘并且导热的材料。
5.根据权利要求4所述的半导体装置封装，其特征在于，所述热界面层包括有机材料和悬浮于树脂中的多个导电粒子中的至少一种。
6.根据权利要求4所述的半导体装置封装，其特征在于，还包括散热件，其联接到所述热界面层。
7.根据权利要求1所述的半导体装置封装，其特征在于，还包括传导接触层，其将所述半导体装置和所述传导垫片联接到所述散热器。
8.根据权利要求1所述的半导体装置封装，其特征在于，所述散热器的第二表面向所述周围空气暴露用于对流传热。
9.根据权利要求1所述的半导体装置封装，其特征在于，还包括包封件，其包围所述半导体装置和所述传导垫片。
10.一种形成半导体装置封装的方法，包括：
提供半导体装置；
将所述半导体装置的第一表面附连到介电层的第一表面；
将传导垫片的第一表面附连到所述介电层的第一表面；
将散热器安置到所述半导体装置的第二表面和所述传导垫片的第二表面上，所述散热器将所述半导体装置电联接到所述传导垫片；以及
在所述介电层的第二表面上形成金属互连结构，所述金属互连结构延伸穿过在所述介电层中形成的通孔，以接触所述半导体装置的第一表面和所述传导垫片的第一表面。
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