CN102403239A - 半导体器件及形成用于在Fo-WLCSP中安装半导体小片的引线上键合互连的方法 - Google Patents
半导体器件及形成用于在Fo-WLCSP中安装半导体小片的引线上键合互连的方法 Download PDFInfo
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- CN102403239A CN102403239A CN2011102781863A CN201110278186A CN102403239A CN 102403239 A CN102403239 A CN 102403239A CN 2011102781863 A CN2011102781863 A CN 2011102781863A CN 201110278186 A CN201110278186 A CN 201110278186A CN 102403239 A CN102403239 A CN 102403239A
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- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
Claims (25)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US12/880,255 US8435834B2 (en) | 2010-09-13 | 2010-09-13 | Semiconductor device and method of forming bond-on-lead interconnection for mounting semiconductor die in FO-WLCSP |
US12/880255 | 2010-09-13 |
Publications (2)
Publication Number | Publication Date |
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CN102403239A true CN102403239A (zh) | 2012-04-04 |
CN102403239B CN102403239B (zh) | 2017-04-12 |
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CN201110278186.3A Active CN102403239B (zh) | 2010-09-13 | 2011-09-09 | 半导体器件及形成用于在Fo‑WLCSP中安装半导体小片的引线上键合互连的方法 |
Country Status (4)
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US (2) | US8435834B2 (zh) |
CN (1) | CN102403239B (zh) |
SG (3) | SG179345A1 (zh) |
TW (1) | TWI581345B (zh) |
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US8574959B2 (en) | 2003-11-10 | 2013-11-05 | Stats Chippac, Ltd. | Semiconductor device and method of forming bump-on-lead interconnection |
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KR101249555B1 (ko) | 2003-11-10 | 2013-04-01 | 스태츠 칩팩, 엘티디. | 범프-온-리드 플립 칩 인터커넥션 |
WO2006105015A2 (en) | 2005-03-25 | 2006-10-05 | Stats Chippac Ltd. | Flip chip interconnection having narrow interconnection sites on the substrate |
US8841779B2 (en) | 2005-03-25 | 2014-09-23 | Stats Chippac, Ltd. | Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substrate |
US8441127B2 (en) * | 2011-06-29 | 2013-05-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump-on-trace structures with wide and narrow portions |
JP2013236039A (ja) * | 2012-05-11 | 2013-11-21 | Renesas Electronics Corp | 半導体装置 |
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TWI515808B (zh) * | 2013-04-25 | 2016-01-01 | 南茂科技股份有限公司 | 晶片封裝結構的製作方法 |
US9524958B2 (en) * | 2013-06-27 | 2016-12-20 | STATS ChipPAC Pte. Ltd. | Semiconductor device and method of individual die bonding followed by simultaneous multiple die thermal compression bonding |
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TW201214590A (en) | 2012-04-01 |
US8435834B2 (en) | 2013-05-07 |
US20130214409A1 (en) | 2013-08-22 |
SG10201700002RA (en) | 2017-04-27 |
US9679824B2 (en) | 2017-06-13 |
SG179345A1 (en) | 2012-04-27 |
CN102403239B (zh) | 2017-04-12 |
US20120061824A1 (en) | 2012-03-15 |
SG192492A1 (en) | 2013-08-30 |
TWI581345B (zh) | 2017-05-01 |
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