TWI399838B - 柱對柱覆晶結構 - Google Patents

柱對柱覆晶結構 Download PDF

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Publication number
TWI399838B
TWI399838B TW097129134A TW97129134A TWI399838B TW I399838 B TWI399838 B TW I399838B TW 097129134 A TW097129134 A TW 097129134A TW 97129134 A TW97129134 A TW 97129134A TW I399838 B TWI399838 B TW I399838B
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Taiwan
Prior art keywords
column
copper pillars
substrate
flip
wafer
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TW097129134A
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English (en)
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TW201005894A (en
Inventor
Wen Jeng Fan
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Powertech Technology Inc
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Priority to TW097129134A priority Critical patent/TWI399838B/zh
Publication of TW201005894A publication Critical patent/TW201005894A/zh
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Publication of TWI399838B publication Critical patent/TWI399838B/zh

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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Description

柱對柱覆晶結構
本發明係有關於一種半導體裝置，特別係有關於一種柱對柱覆晶結構。
覆晶接合技術(flip－chip bonding technology)是將晶片之主動面的銲墊上設置複數個導電凸塊(或稱為突出狀電極)，藉由晶片翻轉方式接合到基板以完成電性連接。相較於使用打線連接(wire bond)之電性連接方式，由於覆晶封裝技術提供晶片與基板之間一種較短的電性連接路徑，可使晶片內更高工作頻率的積體電路具有良好的高頻訊號的傳輸品質。因此，覆晶接合是先進半導體裝置的必然發展趨勢，可提供更快的處理速度與更高的效能。但導電凸塊接合之後晶片與基板結合係為點對點的局部連接，一旦受到應力而凸塊斷裂，則將造成晶片與基板之間電氣訊號傳遞失敗。目前的凸塊有錫鉛凸塊與金凸塊兩大類，錫鉛凸塊不符合歐洲環保能源法規RoHS的無鉛化要求，金凸塊則成本過高。若直接將錫鉛凸塊置換成無鉛凸塊，則會有可靠度降低的問題。此外，錫鉛凸塊需要加熱回焊成球形，在高溫下不具有間隙維持的功能。金凸塊是以熱壓合達到凸塊結合，在高溫壓合下凸塊會變形，亦不具有間隙維持的功能。因此，在目前的覆晶接合技術中，無論是錫鉛凸塊或金凸塊都無法有效控制在覆晶接合時晶片與基板之間的間 隙，且常會隨著製程參數的溫度或壓力的變化而會產生有控制不一致的覆晶間隙，進而影響封膠品質。
如美國專利第US 6,229,220號所揭示技術，IBM公司提出一種習知覆晶接合結構以控制一致的覆晶間隙，第1圖係為該覆晶結構在覆晶前的截面示意圖。該覆晶結構主要包含一基板110、一晶片120以及複數個銅柱130。該基板110係作為晶片載體並具有一上表面111以及對應之一下表面112。該上表面111係形成有複數個連接墊114。該晶片120係覆晶接合方式設於該基板110之該上表面111，該晶片120之一主動面121係設有複數個銲墊122。該些銅柱130是配置在該些銲墊122上，用以控制覆晶間隙。每一銅柱130之頂端預先形成了一焊接材料150。經由該焊接材料150以電性連接該些銅柱130與該基板110之該些連接墊114，再透過該基板110內部之導電跡線(conductive trace)連接到外部電子裝置。如第2圖所示，該焊接材料150在回焊(reflowing)之後，可接合該些銅柱130與該些連接墊114。該些銅柱130之高度係大於該些連接墊114之高度，該些連接墊114係直接顯露在該基板110之該上表面111，該焊接材料150在該些銅柱130與該些連接墊114之間的每一焊接中心點151係相對偏移該晶片120與該基板110之間間隙H1的等分分隔面P，而使該焊接材料150較為靠近該基板110。
如第3圖所示，在上述習知覆晶結構中，該基板110 產生翹曲(warpage)或熱脹冷縮現象時，該些連接墊114相較於該些銅柱130會承受較大熱應力而容易在焊接界面產生斷裂或是脫落，造成電氣訊號傳遞失敗，進而影響產品可靠度。
有鑒於此，本發明之主要目的係在於提供一種柱對柱覆晶結構，能減緩基板與晶片翹曲度差異或基板熱脹冷縮現象對焊接材料與基板連接墊的直接應力作用，以避免焊點斷裂。
本發明的目的及解決其技術問題是採用以下技術方案來實現的。依據本發明所揭示之一種柱對柱覆晶結構，主要包含一基板、一晶片、複數個第一銅柱、複數個第二銅柱以及一焊接材料。該基板係具有一上表面以及一下表面，該上表面係設置有一防焊層以及複數個連接墊，該些連接墊係顯露於該防焊層之外。該晶片係設於該基板之該上表面，該晶片之一主動面係設有複數個銲墊。該些第一銅柱係設置於該些銲墊上。該些第二銅柱係設置於該些連接墊上。該焊接材料係連接該些第一銅柱與該些第二銅柱，其中該些第一銅柱與該些第二銅柱概約等高，以使該焊接材料的焊接中心點位於該晶片與該基板之間間隙的等分分隔面。
本發明的目的及解決其技術問題還可採用以下技術措施進一步實現。
在前述柱對柱覆晶結構中，該些第二銅柱之高度係可 不小於該晶片之厚度之二分之一。
在前述柱對柱覆晶結構中，該些第二銅柱係可為平錐形。
在前述柱對柱覆晶結構中，該些第二銅柱突出於該些連接墊的高度係可不小於該些第二銅柱在對應連接墊上設置區域之一長度或一直徑。
在前述柱對柱覆晶結構中，該些第二銅柱係可不與該防焊層接觸。
在前述柱對柱覆晶結構中，該晶片係可具有複數個凸塊下金屬層，其係形成於該些第一銅柱與該些銲墊之間。
在前述柱對柱覆晶結構中，可另包含一底部填充膠，係填滿該晶片與該基板之間間隙。
在前述柱對柱覆晶結構中，可另包含一封膠體，係填滿該晶片與該基板之間間隙並密封該晶片。
在前述柱對柱覆晶結構中，該基板係可為一印刷電路板。
在前述柱對柱覆晶結構中，該防焊層係可具有複數個開孔，其孔徑係稍小於該些連接墊但大於該些第二銅柱之一長度或一直徑，以使該防焊層局部顯露該些連接墊不被該些第二銅柱覆蓋之區域。
在前述柱對柱覆晶結構中，該些第二銅柱係可為圓柱體。
在前述柱對柱覆晶結構中，該些第二銅柱係可為多 角柱體。
在前述柱對柱覆晶結構中，該些第二銅柱係可具有複數個壁面，係朝向該些連接墊之複數個角隅。
由以上技術方案可以看出，本發明之柱對柱覆晶結構，具有以下優點與功效：一、藉由基板設有與晶片上第一銅柱等高之複數個第二·銅柱，以改變焊接材料的焊接中心點位置至位於該晶片與該基板之間間隙的等分分隔面，能減緩基板與晶片翹曲度差異或基板熱脹冷縮現象對焊接材料與基板連接墊的直接應力作用，以避免焊點斷裂。此外，可以取代銲球，更可符合無鉛化、高可靠度與低製造成本之要求。
二、藉由基板上第二銅柱的高度增加該晶片與該基板之間間隙直到不小於晶片厚度，以提高銅柱間焊接中心點的最大可承受應力，並有助於封膠體或底部填充膠之填入。
三、藉由防焊層對應於第二銅柱之開孔尺寸，以使防焊層局部顯露基板上連接墊不被第二銅柱覆蓋之區域，故能固著多餘焊接材料在第二銅柱之周邊，防止產生錫珠。
四、藉由基板上第二銅柱之複數個壁面朝向基板連接墊之複數個角隅，以增加較佳的多餘焊接材料固著區域。
五、利用基板上第二銅柱為平錐形，使焊接材料往位於 該晶片與該基板之間間隙的等分分隔面集中，以避免焊接材料在基板連接墊上的擴散污染。
以下將配合所附圖示詳細說明本發明之實施例，然應注意的是，該些圖示均為簡化之示意圖，僅以示意方法來說明本發明之基本架構或實施方法，故僅顯示與本案有關之元件，且所顯示之元件並非以實際實施之數目、形狀、尺寸比例繪製，某些尺寸比例與其他相關尺寸比例已經被修飾放大或是簡化，以提供更清楚的描述，實際實施之數目、形狀及尺寸比例為一種選置性之設計，且詳細之元件佈局可能更為複雜。
依據本發明之第一具體實施例，一種柱對柱覆晶結構舉例說明於第4圖之截面示意圖。該柱對柱覆晶結構200主要包含一基板210、一晶片220、複數個第一銅柱230、複數個第二銅柱240以及一焊接材料250。
該基板210係具有一上表面211以及一下表面212，其係可為一種高密度雙面導通之多層印刷電路板，內部形成有導電跡線(conductive trace)與鍍通孔(圖中未繪出)。該基板210係可為一基板條內陣列排列之一單元。經過裁切之後而形成如本實施例之該基板210。該上表面211係設置有一防焊層213以及複數個連接墊214。該些連接墊214係顯露於該防焊層213之外。該防焊層213即是俗稱之「綠漆」(Solder mask or solder resist)，以環氧樹脂及感光樹脂為主要組成份，主要塗佈於印刷 電路板表面，以形成一遮覆導電跡線免於受外界水氣、污染物侵害之絕緣保護層。該防焊層213係可以網印(screen printing)、簾幕塗佈(curtain coating)、噴霧塗佈(spray coating)、滾輪塗佈(roller coating)等方式形成。具體而言，該防焊層213係可具有複數個開孔215，以顯露該些該些連接墊214。
如第4圖所示，該晶片220係設於該基板210之該上表面211，該晶片220之一主動面221係設有複數個銲墊222，該些銲墊222係作為該晶片220訊號輸出入之媒介。該晶片220係為半導體材質，該主動面221上係設有積體電路元件，選自於微控制器、微處理器、記憶體、邏輯電路、特殊應用積體電路(如顯示器驅動電路)等或上述組合。具體而言，如第6圖所示，該晶片220係可具有複數個凸塊下金屬層(under bump metallurgy layer, UBM layer)223，其係形成於該些第一銅柱230與該些銲墊222之間，該些凸塊下金屬層223係可利用濺鍍方式形成，通常由三層導電金屬層(圖未繪出)所主要構成，即一黏著層(adhesion)、一溼潤層(wetting layer)及一抗氧化層(oxidation barrier layer)，用以增進該些第一銅柱230與該些銲墊222之間的連結。該晶片220之該主動面221另可覆蓋一電絕緣性之保護層(passivation layer)224，該保護層224係大致覆蓋該主動面221但顯露該些銲墊222，可提供保護該主動面221上之積體電路元件並使該主動面221較為平 坦。該些凸塊下金屬層223係結合於該些銲墊222並覆蓋至該保護層224之開孔周邊部分表面。
如第4圖所示，該些第一銅柱230係設置於該些銲墊222上。該些第二銅柱240係設置於該些連接墊214上。其中上述的銅柱係指純銅柱、銅合金柱或是硬度大於金之高剛性導電柱。如第5圖所示，該些第二銅柱240突出於該些連接墊214的高度H3係可不小於該些第二銅柱240在對應連接墊214上設置區域之一長度或一直徑D，以呈具體柱狀。如第5圖所示，在本實施例中，該防焊層213之該些開孔215之孔徑或一長度係稍小於該些連接墊214但大於該些第二銅柱240之一長度或一直徑D。如第5圖所示，該些開孔215概呈方形，而該第二銅柱240係為圓柱體，該些開孔215之一較短邊長度係大於該第二銅柱240之直徑D。因此，在一較佳的型態中，該些第二銅柱240係可不與該防焊層213接觸，以使該防焊層213局部顯露該些連接墊214不被該些第二銅柱240覆蓋之區域214A。如第5圖所示，每一連接墊214之區域214A係不被對應第二銅柱240覆蓋，亦不被該防焊層213所覆蓋，該區域214A能用以固著多餘之焊接材料250在該些第二銅柱240之周邊，防止錫珠的產生。
因此，該晶片220與該基板210皆設置有凸起之銅柱。並利用該焊接材料250連接該些第一銅柱230與該些第二銅柱240，以將其機械性焊接接合。詳細而言， 如第6及7圖所示，該焊接材料250係可預先設置在該些第一銅柱230之頂端，在覆晶壓合之後，再經回焊(reflowing)以使該焊接材料250熔化接合該些第一銅柱230與該些第二銅柱240並形成電性連接與機械結合關係(如第8圖所示)。通常該焊接材料250係可選用無鉛銲劑為較佳，以錫96.5%－銀3%－銅0.5%之焊接材料為例，在到達回焊溫度約攝氏217度以上，最高溫約為攝氏245度時能產生焊接之濕潤性，而且該些第一銅柱230與該些第二銅柱240則必須具有高於上述回焊溫度之熔點。
並且，如第8圖所示，該些第一銅柱230與該些第二銅柱240概約等高，以使該焊接材料250的焊接中心點251位於該晶片220與該基板210之間間隙H2的等分分隔面P。由該等分分隔面P的任意點到該晶片220與到該基板210之最短距離為相同。當該基板210有一相對於該晶片220之翹曲度差異時，該等分分隔面P的翹曲度則約為該翹曲度差異之二分之一。故該些第一銅柱230與該些第二銅柱240位置係互相垂直對應，並具有相等高度，其高度大約為30至90 μm。由於該些第一銅柱230與該些第二銅柱240具有高剛性與低成本之特性，該晶片220係疊設在該基板210之上並能維持一致的覆晶間隙H2，約為兩倍的銅柱高度。較佳地，如第8圖所示，該些第二銅柱240之高度H3係可不小於該晶片220之厚度T之二分之一。藉由該基板210上該 些第二銅柱240的高度增加使該晶片220與該基板210之間間隙H2直至不小於該晶片220厚度T，可提高在銅柱之間該些焊接中心點251的最大可承受應力
如第9圖所示，當該基板210受到熱應力而翹曲變形或有熱脹冷縮現象時，該焊接材料250的焊接中心點251仍位於該等分分隔面P，能減緩該基板210與該晶片220翹曲度差異或是該基板210熱脹冷縮現象對該些焊接中心點251與該些連接墊214的直接應力作用，以避免該焊接材料250在焊接中心點251處斷裂。因此，本發明係利用等高對應之該些第一銅柱230與該些第二銅柱240以及該焊接材料250取代習知的銲球、錫鉛凸塊或金凸塊，不會有高溫下使覆晶間隙變化的問題，更可符合無鉛化、高可靠度與低製造成本之要求。
此外，該些第一銅柱230與該些第二銅柱240係可利用電鍍(electroplating)形成。如第4圖所示，該些第一銅柱230與該些第二銅柱240係可具有相同尺寸與外形，例如在本實施例中，該些第一銅柱230與該些第二銅柱240係可為圓柱體(如第5圖所示)，但不受限制地，亦可為各種形狀之多角柱體。如第10A及10B圖所示，該些第二銅柱240’係可為八角柱體，其具有複數個壁面241，該些壁面241係朝向該些連接墊214之複數個角隅214B，藉由該基板210上該些第二銅柱240’之複數個壁面241朝向該些連接墊214之該些個角隅214B，以使該些連接墊214具有增多的多餘焊接材料固 著區域。此外，利用該些朝向角隅214B之缺角型壁面241，該些第二銅柱240’不會有朝向該些連接墊214之該些角隅214B的側邊角。當該些第二銅柱240’受到某一方向的應力時會分散在該些連接墊214，不會直接拉扯該些連接墊214之該些角隅214B而產生剝離。如第5圖所示，第一實施例的該些第二銅柱240為圓柱體，亦具有同樣的功效，該些第二銅柱240朝向該些連接墊214之角隅係為圓弧狀壁面，亦可防止該些連接墊214由角隅產生剝離。
再如第4與8圖所示，利用該焊接材料250接合該些第一銅柱230與該些第二銅柱240之後，可以一高流動性之底部填充膠260填滿該晶片220與該基板210之間間隙H2，以全面結合該晶片220與該基板210，並保護該間隙H2免於受到濕氣與灰塵的污染。而本發明之該基板210上該些第二銅柱240的高度增加有助於該底部填充膠260之填充速度的控制與填滿效果。
此外，本實施例之柱對柱覆晶結構200係為一微小化半導體封裝構造。如第4圖所示，該柱對柱覆晶結構200可另包含設置複數個銲球270，其係設置在該基板210之該下表面212，以使載設於該柱對柱覆晶結構200之該晶片220得與外部印刷電路板(printed circuit board, PCB)達成電性連接關係。該柱對柱覆晶結構200係為裸晶型態之覆晶封裝構造(flip－chip package)，並可具有球格陣列封裝(Ball Grid Array package)之型態。
依據本發明之第二具體實施例，另一種柱對柱覆晶結構舉例說明於第11圖之截面示意圖。該柱對柱覆晶結構300主要包含一基板210、一晶片220、複數個第一銅柱230、複數個第二銅柱240以及一焊接材料250。P。其中與第一實施例相同的主要元件將以相同符號標示，故可以理解亦具有相同功能並能達成上述功效，不再詳予贅述。
在本實施例中，該些第二銅柱240係可為平錐形，例如半圓錐形或半角錐形。每一第二銅柱240係具有一頂面342與一底面343，該頂面342之直徑係小於該底面343之直徑，可使該焊接材料250往位於該晶片220與該基板210之間間隙H2的該等分分隔面P集中，以避免該焊接材料250在該基板210之該些連接墊214上的擴散污染。故可控制該焊接材料250之用量，並藉由平錐形之該些第一銅柱230與該些二銅柱240讓焊接材料250集中在該等分分隔面P，使該焊接材料250不會擴散到該些連接墊214上，而污染了該基板210之該上表面211。
此外，該柱對柱覆晶結構300可另包含一封膠體380，其係填滿該晶片220與該基板210之間間隙H2並密封該晶片220、該些第一銅柱230與該些第二銅柱240。由於該晶片220與該基板210之間間隙H2相較於習知之間隙為大，可提高銅柱間該些焊接中心點251的最大可承受應力，並有助於該封膠體380的無空隙填 充。
以上所述，僅是本發明的較佳實施例而已，並非對本發明作任何形式上的限制，本發明技術方案範圍當依所附申請專利範圍為準。任何熟悉本專業的技術人員可利用上述揭示的技術內容作出些許更動或修飾為等同變化的等效實施例，但凡是未脫離本發明技術方案的內容，依據本發明的技術實質對以上實施例所作的任何簡單修改、等同變化與修飾，均仍屬於本發明技術方案的範圍內。
H1‧‧‧晶片與基板之間間隙
H2‧‧‧晶片與基板之間間隙
H3‧‧‧第二銅柱高度
D‧‧‧第二銅柱直徑
P‧‧‧等分分隔面
T‧‧‧晶片厚度
110‧‧‧基板
111‧‧‧上表面
112‧‧‧下表面
114‧‧‧連接墊
120‧‧‧晶片
121‧‧‧主動面
122‧‧‧銲墊
130‧‧‧銅柱
150‧‧‧焊接材料
151‧‧‧焊接中心點
200‧‧‧柱對柱覆晶結構
210‧‧‧基板
211‧‧‧上表面
212‧‧‧下表面
213‧‧‧防焊層
214‧‧‧連接墊
214A‧‧‧區域
214B‧‧‧角隅
215‧‧‧開孔
220‧‧‧晶片
221‧‧‧主動面
222‧‧‧銲墊
223‧‧‧凸塊下金屬層
224‧‧‧保護層
230‧‧‧第一銅柱
240‧‧‧第二銅柱
240’‧‧‧第二銅柱
241‧‧‧壁面
250‧‧‧焊接材料
251‧‧‧焊接中心點
260‧‧‧底部填充膠
270‧‧‧銲球
300‧‧‧柱對柱覆晶結構
342‧‧‧頂面
343‧‧‧底面
380‧‧‧封膠體
第1圖：習知覆晶結構於覆晶前的截面示意圖。
第2圖：習知覆晶結構於覆晶後的截面示意圖。
第3圖：習知覆晶結構於覆晶後產生基板翹曲的截面示意圖。
第4圖：為依據本發明第一具體實施例的一種柱對柱覆晶結構的截面示意圖。
第5圖：依據本發明第一具體實施例的該柱對柱覆晶結構中連接墊設有第二銅柱的放大立體示意圖。
第6圖：依據本發明第一具體實施例的該柱對柱覆晶結構中晶片設有第一銅柱的局部放大截面示意圖。
第7圖：依據本發明第一具體實施例的該柱對柱覆晶結構在覆晶前的局部截面示意圖。
第8圖：依據本發明第一具體實施例的該柱對柱覆晶結 構中在覆晶後的局部截面示意圖。
第9圖：依據本發明第一具體實施例的該柱對柱覆晶結構在覆晶後產生基板翹曲的局部截面示意圖。
第10A與10B圖：為依據本發明第一具體實施例的該柱對柱覆晶結構中另一變化例的第二銅柱的放大立體示意圖與俯視圖。
第11圖：為依據本發明第二具體實施例的另一種柱對柱覆晶結構的截面示意圖。
200‧‧‧柱對柱覆晶結構
210‧‧‧基板
211‧‧‧上表面
212‧‧‧下表面
213‧‧‧防焊層
214‧‧‧連接墊
215‧‧‧開孔
220‧‧‧晶片
221‧‧‧主動面
222‧‧‧銲墊
230‧‧‧第一銅柱
240‧‧‧第二銅柱
250‧‧‧焊接材料
260‧‧‧底部填充膠
270‧‧‧銲球

Claims (13)

  1. 一種柱對柱覆晶結構，包含：一基板，係具有一上表面以及一下表面，該上表面係設置有一防焊層以及複數個連接墊，該些連接墊係顯露於該防焊層之外；一晶片，係設於該基板之該上表面，該晶片之一主動面係設有複數個銲墊；複數個第一銅柱，係設置於該些銲墊上；複數個第二銅柱，係設置於該些連接墊上；以及一焊接材料，係連接該些第一銅柱與該些第二銅柱，其中該些第一銅柱與該些第二銅柱概約等高，以使該焊接材料的焊接中心點位於該晶片與該基板之間間隙的等分分隔面。
  2. 如申請專利範圍第1項所述之柱對柱覆晶結構，其中該些第二銅柱之高度係不小於該晶片之厚度之二分之一。
  3. 如申請專利範圍第1項所述之柱對柱覆晶結構，其中該些第二銅柱係為平錐形。
  4. 如申請專利範圍第1項所述之柱對柱覆晶結構，其中該些第二銅柱突出於該些連接墊的高度係不小於該些第二銅柱在對應連接墊上設置區域之一長度或一直徑。
  5. 如申請專利範圍第1項所述之柱對柱覆晶結構，其中該些第二銅柱係不與該防焊層接觸。
  6. 如申請專利範圍第1項所述之柱對柱覆晶結構，其中該晶片係具有複數個凸塊下金屬層，其係形成於該些第一 銅柱與該些銲墊之間。
  7. 如申請專利範圍第1項所述之柱對柱覆晶結構，另包含一底部填充膠，係填滿該晶片與該基板之間間隙。
  8. 如申請專利範圍第1項所述之柱對柱覆晶結構，另包含一封膠體，係填滿該晶片與該基板之間間隙並密封該晶片。
  9. 如申請專利範圍第1項所述之柱對柱覆晶結構，其中該基板係為一印刷電路板。
  10. 如申請專利範圍第1項所述之柱對柱覆晶結構，其中該防焊層係具有複數個開孔，其孔徑係稍小於該些連接墊但大於該些第二銅柱之一長度或一直徑，以使該防焊層局部顯露該些連接墊不被該些第二銅柱覆蓋之區域。
  11. 如申請專利範圍第1或10項所述之柱對柱覆晶結構，其中被該些第二銅柱係為圓柱體。
  12. 如申請專利範圍第1或10項所述之柱對柱覆晶結構，其中該些第二銅柱係為多角柱體。
  13. 如申請專利範圍第12項所述之柱對柱覆晶結構，其中該些第二銅柱係具有複數個壁面，係朝向該些連接墊之複數個角隅。
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