TWI286830B - Electronic carrier board - Google Patents

Abstract

An electronic carrier board including a main body, at least two paired bond pads provided on a surface of the main body, and a protective layer for covering the surface of the main body is provided. The protective layer is formed with openings at positions corresponding to the bond pads, and each of the openings is provided in the same direction and exposes at least a first sidewall and an identical second sidewall of each of the paired bond pads. The first sidewall is perpendicular to an aligned direction of the paired bond pads, and the second sidewall is parallel to the aligned direction of the paired bond pads. A distance between one of the openings and the first sidewall of at least one of the bond pads is at least 50 mum greater than a distance between the opening and the second sidewall thereof so as to provide the same bond pad area (wetting area) for attaching an electronic device to the paired bond pads even if a position shifting problem is generated during forming the openings. Thus, an insulating resin for covering the electronic device can be filled under the electronic device and in the openings and covers at least a side edge of each of the bond pads to prevent voids and bridging from being generated under the electronic device, so as to eliminate an electrical bridging problem from being generated between adjacent electronic devices.

Description

1286830 IX. Description of the Invention: [Technical Field] The present invention relates to an electronic carrier board, and more particularly to an electronic carrier board applied to Surface Mounted Technology (SMT). [Prior Art] With the advancement of integrated circuit fabrication technology, the design and manufacture of electronic components continue to move toward a trend of miniaturization, and because of its larger scale and high integration of electronic circuits, Its product features are also more complete. • In this case, traditional use of plug-in assembly technology (Through

Hole Technology; THT) The electronic components that are connected are not able to be further reduced in size, and thus occupy a large number of electronic carriers such as printed circuit boards (PCBs), circuit boards, or substrates. Space, plus plug-in assembly technology, requires drilling on the electronic carrier for each foot position of each electronic component, so this type of electronic component pin actually occupies space on both sides of the electronic carrier, and the electron The solder joints between the components and the electronic carrier are also relatively large. Therefore, in today's electronic component assembly process, Surface Mounted Technology (SMT) is widely used to effectively provide electronic components for assembly on an electronic carrier. The electronic component using the surface adhesion technology, since the electrical connection end (pin) is soldered to the electronic carrier board on the same side as the electronic component, it does not need to be in the electronic carrier as the plug-in assembly technology A large number of holes are drilled for the pins of the electronic components. In other words, the surface adhesion technology can be used to assemble electronic components on both sides of the electronic carrier, and the electronic load is greatly improved. 'Because of the surface-adhesive technology, the electronic component volume car X i is compared with the traditional plug-in assembly technology electronic components, the electronic components using the 2 adhesive technology can be placed on the electronic carrier board in a larger amount, set, plus surface Adhesive electronic components are also cheaper to manufacture, and have therefore become the mainstream of today's electronic components on electronic boards. j, based on electrical and performance requirements, such as capacitors (capacit0T), resistors (Resist〇r) or inductors (4) such as (4) passive = (Passive CGmponents) has been maintained on the electronic carrier to maintain the electrical quality of electronic products An indispensable step to stability. Please refer to Figure 1A, which is a schematic plan view showing the surface-attached passive parts on the substrate. Referring to Figures 1B and 1C, it is the corresponding line 1β_1Β and the section line ic_ic in Figure 1A. The formed uj surface is a reflection. The main purpose is to form a t-pair of spaced apart solder pads 12 at a predetermined position on the substrate, the two solder pads 12 are respectively exposed to cover the solder resist layer 13 on the substrate u. Appropriate amount of solder paste (12 〇 P P 上 上 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 被动 被动 被动 被动 被动 被动 被动 被动 被动 被动 被动 被动 被动(Reflow Soldering) processing, the passive component 14 can be appropriately electrically connected to the fresh pad 12 by the solder paste 15. In order to avoid the passive component\ corresponding to the solder pad, the two sides of the paste 15 are not flattened (T〇mbstone)', so the size of the wett area of the tin f 15 is designed to be uniform, The opening π dimensions of the solder resist layer 13 formed to expose the opposing pads η are all symmetrical and the same in size. However, when applied to a semiconductor package, since the solder paste 15 is coated with 19294 1286830 and the solder paste is precisely controlled during reflow processing, and the solder resist is added, the passive component 14 is highly difficult to cause passive I: the surface is not When there is a flattening, there is a depression and (:,) 17'. These gaps are more than η. To 3. :;= =: (Formed two-pass passive element... The encapsulation colloid 2 is about 50 microns, which is greater than the height of this gap. Because - no =: r:; r The gap between the bottom of the passive component 14 is strictly produced by \^ Void, resulting in a subsequent high-load structure: the p°pcorn effect, causing the entire structure 13' or the molten solder 15 to pass through the gap 17 (ie, hair

, , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , - and the molten solder paste 15 for electrically connecting the different passive π members 14 to the bonding pads 12 due to the arrangement of the adjacent passive elements 14 is also likely to flow, and the gap between the surface of the bonding pad 12 and the solder resist layer 13 is Further, the electrodes are diffused and contacted along the gap between the substrate u and the fresh layer 13, so that a solder extrusion phenomenon occurs, causing a short circuit problem between the adjacent passive elements 14 as indicated by reference numeral SE in FIG. 1C. Referring to FIG. 2A, the technique disclosed in US Pat. No. 6,521,997 is to add a trench (Gr〇ove) 230 between the openings of the solder resist layer 23 formed between the opposing pads 22, by opening the trench 230. The gap is enlarged to provide resin traversal. However, the opening of the trench 330 is limited by the lower resolution of the photosensitive solder resist layer 33, and the width dimension can be as small as 8 19294 1286830 to 150 micrometers (μιη), and the opening of the pad is opened. The reticle alignment accuracy is limited, and the solder pad solder mask width Μ is required to be 75 μm wide. Therefore, as the component volume is gradually reduced, it is more difficult to set the trench in a limited solder (four) pitch.

Because the passive component size specifications (such as _3 type, 0402 type) currently used in the semiconductor industry are generally represented by two sets of numbers representing the length and width of the passive component, the length and width units are in English (generally in English).吋) is the unit, and is ranked first with a larger number. Taking the passive component of the 2 type wafer as an example, the 〇402 is a passive component of a specific specification. When the size of the component is 0.040 inches (length) x 0.020 觅 (觅), the conversion to a metric unit is equivalent to a length of 0.040 X 25.4 = 1.016 mm (approximately 1000 microns), a chip type capacitor, resistor or inductor having a width of 〇2〇X 4 〇·508 mm (approximately 500 μm) and a height of typically 500 μm. As shown in FIG. 2B, as semiconductor products are gradually moving toward light, thin, new, and small directions, the current package of thin ball grid array semiconductor packages (Thin &amp; Fine Ball Grid Array, TFBGA) (EjiCapsulant) The thickness has been developed to 53 〇 micron, so in the future, thin packages will inevitably be able to accommodate 被动4〇2 wafer passive components with a thickness of 500 μm, and the 〇2〇1 wafer passive components will be smaller to reduce the package. The overall thickness of the piece. The length, width and height of the 0201 type passive component are half of the passive components of the 04〇2 type wafer, that is, 5 〇〇 micron (length) X micron (width) X 250 micron (height), which is suitable for the 0201 type. The length of the passive component (500 彳 米) is limited, and the spacing between the two pairs of fresh enamel on the substrate is also reduced from 400 microns to 275 microns. However, the solder resist layer is a photosensitive (Ph〇t〇image) material, which is limited by the low sensitivity resolution of the 9 19294 1286830 and the aligning accuracy of the reticle opening between the zinc pads. Having a width of 75 microns, in this case, as shown in FIG. 2B, the technique disclosed in the above-mentioned U.S. Patent No. 6,521,997 discloses a groove having a twist of 150 micrometers on the anti-fresh layer between the solder fillets. The solder mask opening distance of each exposed solder pad is only dry: (275-15G)/2=62.5 micron'. Therefore, when the solder pad of the exposed pad is opened, the trench is opened. The width of the gap is reduced to 62.5 microns, which is beyond the current 75 micron manufacturing capability and cannot be made in existing processes. </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; 33〇, and a barrier strip 331 is disposed between the openings to form the flow channel 33(10), and the insulating resin is filled with 0. However, the technique is still limited by the lower resolution of the photosensitive solder resist layer, and is limited. The fresh pad spacing is less than 275 micron, which means that the barrier strip 331 cannot be formed, so it cannot be applied to the 〇2〇1 passive component.

In addition, when the solder resist layer is offset, the wetted regions of the two solder pads may be unequal. As shown in FIG. 3B, the area of the solder pads that can be soldered (the outer solder mask layer) The opening area is A*B, and if the solder mask is shifted to the left by X microns (the traditional substrate process offset capacity is 75 microns), the area of the left pad will be B*(A+X), right pad The area of B* (A area will have a difference in commission, this kind) will not cause the wetted area, which will lead to the phenomenon of tombstoning of passive components soldered to the pad (Tombstone) 〇19294 10 1286830 In the techniques disclosed in U.S. Patent Nos. 5,521,997 and 2005/0253231, the effects of adjacent passive component configurations are not provided to effectively address the possibility of solder paste between adjacent passive components via the substrate surface and the solder resist layer. The gap between the gaps and the mutual diffusion, contact, etc., caused by the phenomenon of sharp tin protrusion and even the short circuit of adjacent passive components. In summary, how to provide an electronic carrier board can avoid the electronic components, when placed on the 'cause of the gap between the electronic components and the electronic carrier caused by the occurrence of air holes and electrical bridging and solder protruding problems, Avoiding the problem of the formation of the exposed pad by the process error, which causes the deviation of the opening of the exposed pad, which causes the difference in the size of the outer surface of the δ hai zinc pad, which is a problem that needs to be solved in the industry. SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, the main object of the present invention is to provide an electronic carrier plate, which can avoid the deviation of the opening of the exposed two-pair material due to process precision and error problems. The problem is that the size of the exposed soldering iron is different. The re-invention of the invention is to provide an electronic carrier board to prevent the phenomenon of tombstoning when the electronic yak is placed on the electronic carrier (10) (4). In addition, the purpose is to provide an electronic carrier for effective guidance; between the component and the electronic carrier, avoiding the problem of bursting and electrical bridging caused by the gas cavity. The purpose of this is to provide a type of sub-carrier to prevent short-circuiting between electrical components of the electronic components. The purpose of this month is to provide an electronic carrier board that solves the problem that the surface of the surface mounted technology (SMT) passive parts of the small 19294 11 1286830 cannot form a resin resin into the trench. For the purpose of achieving the above and other objects, the present invention includes: - a body; at least two pairs of | 设 provided on the surface of the body; two: - a protective layer covering the surface of the body, the protective layer corresponding to the An opening is formed in the 塾 position, the openings are in the same direction and the second welding is exposed: the first and second sidewalls are the same, and the first sidewall of the soldering pad is perpendicular to the direction of the pair (four) (d) parallel to the pair of fresh smear, and at least - the first side of the weld bead is spaced from the opening by a distance of 5 〇 micrometers (4) from the distance between the two sidewalls. In addition, in the two pairs of pads of the protective layer opening, the distance between the walls and the opening is wn, 5G^, and at least for the protective layer located under the electronic component connected to the first side= The opening 'is spaced apart from the sidewall of the pad by more than _5g micrometers from the second sidewall. In another preferred embodiment, the 哕ψ ^ ^ , , μ ′ ” layer openings are in the same direction and the at least three identical first and first side walls are perpendicular to the pair. The pad cloth 7:: wall' is parallel to the direction in which the pair of pads are laid, and at least one wall is spaced apart from the opening by at least a distance _ / the distance between the black pad and the side port is 50 micrometers. The third sidewall is spaced apart from the opening: in the preferred embodiment, the openings of the protective layer are in the same direction of each other and are finished, and the first one of the two solder pads is the same as the first soldering pad.筮~ Le 2, the third and fourth side walls, &quot;I Haidi, the fourth side wall of the brother is perpendicular to the direction of the pair of welding dies, the 12th 19294 1286830 second, the third side wall parallel to the pair of welding (four) The distance between the walls of the square n is at least 50 microns above the distance of the opening. The second sidewall is spaced apart. In the preferred embodiment, the protective layer openings are oriented in the same direction as the first side of the solder pads. ▲ 5 Xuandi one side wall is vertically exposed in pairs: in the example: in the embodiment, the protective layer openings are in the same direction, and the first side wall and the fourth side wall are the same in the same direction. The direction of the layout. &quot;Hai Di and Si Si are the same as in ===, the two pairs of laid solderings are not the first, the first layer of the opening is in the same direction and the outer wall and the fourth side wall are exposed. , :: and :: the side wall, and the first direction of the other - the soldering pad is exposed, the second = four side wall is perpendicular to the pair of fresh enamel, so the direction of the slab is laid. . The structure of the structure is disclosed in (1). The structure of the surname includes the following: And the electrons are placed under the electronic component and the electrons are contained in the opening of the Bu Wan and the "sub-board". The layer is a solder mask, and the electronic component is a passive component. The protective layer of the electronic carrier board surface of the invention is reappeared on the surface of the rafter board at $, , 1 丨, and the same position of the solder joint is formed by the same place. f Η sidewalls 'so' in the formation of a protective layer (under the degree and error considerations, since the opening 19294 13 1286830 mouth is located in the same pair of pads, so even if it is biased, The area of the soldering pad of the opening is different, and the follow-up on the bonding pad is followed by the day of the private component, and the tombstoning phenomenon caused by the imbalance of the wetting area. Exposing the first and second sidewalls of the at least two phases of the solder fillet, or exposing the solder pads to at least three The same 'different one second and third side wall, the first side wall of the bonding pad is perpendicular to the paired welding φ cloth, and the second (third) side wall is parallel to the pair of bonding pads And the distance between the sidewalls of the wall is at least greater than the distance between the second (first:) sidewalls and the opening by 5 μm. Thus, even if the opening occurs, the same soldering exposed area can be maintained. The insulating resin for the two pieces of electric coating (average 5 () micron) is filled in the lower part of the electronic component = the phase mouth, to avoid the gas explosion caused by the generation of the air hole, and at the same time, the insulating resin can be coated at least At least one side of the solder pad, free of: the solder solder protrusion (10) dere coffee - phenomenon, even the short circuit of the φ sub-piece. In addition, the protective layer opening can be the same direction and the same as the first -, second, third And a fourth side wall, the member: the first out = the fourth side of the younger brother is perpendicular to the direction in which the pair of pads are laid out _ in parallel with the direction in which the pair of fresh shovel is laid, and the first side = away from at least greater than the second The third sidewall is spaced apart by two micrometers. Thus, even if the opening is misaligned The exposed area is still provided to provide the electronic component and the original design phase, ... the wetted area of the P绫±D which is both available for covering the electronic component, and the 1 bar edge resin is filled under the electronic component 19294 14 In 1286830 and the opening, the gas explosion and the electrical bridging problem caused by the generation of the air hole are avoided, and the insulating resin can completely cover the side of the soldering pad to avoid the phenomenon of solder protruding. In addition, the protection is in the present invention. The layer opening may expose only the first sidewall of the solder pad, the first sidewall is perpendicular to the direction in which the pair of pads are disposed, and thus, when forming the opening of the protective layer, due to process precision and error consideration, due to the ' The opening is not in the same direction as the pair of pads, so even if the offset occurs, the area of the exposed opening of the pair of pads is prevented from being different, so that when the electronic component is subsequently attached to the dry pad, it is wet. The imbalance of the area creates a monument. Further, in the present invention, the protective layer opening may expose the first and fourth sidewalls of the bonding pad, the first and fourth sidewalls are perpendicular to the direction in which the pair of pads are disposed, and the first sidewall The distance separating the openings is at least greater than the distance of the fourth sidewall from the opening by about 5 G microns. In this way, even if the opening is misaligned, the exposed area of the solder pad can be maintained to provide the same wetted area as the original design of the electronic component, and the resin can be filled with the resin. Under the electronic component and in the opening, air explosion and electrical bridging problems caused by air hole generation are avoided. Meanwhile, in the present invention, one of the openings of the protective layer exposes the first, second, third and fourth side walls of one of the pads, and the first one of the other pads is chromed out of the other opening. And a fourth sidewall, and the first sidewall is spaced apart from the opening by a distance greater than a distance of about 50 micrometers from the second, third, and fourth sidewalls. In this way, even if the opening is misaligned, the β, the quasi-holding has the exposed area size, so as to provide the same wetted area as the original 19294 15 1286830, and at the same time Under the insulating resin embossed electronic component of the sub-piece, and in the opening, 'avoiding gas explosion and electrical bridging caused by the generation of the cavity. [Embodiment] The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can easily implement or apply the details of the present specification by the contents disclosed in the present specification. Modifications and changes. Embodiments of each of the embodiments are described in the spirit of the present invention. Referring to Figures 4 and 4, a schematic plan view of each embodiment of the present invention is shown. The electronic carrier board of the present invention comprises: a main body 411; at least two pairs of solder pads 42 disposed on the surface of the main body 411 and weeping 4 for reclaiming the main body 2 The protective layer 43 corresponds to the second welding = open:, and 431, the openings 43 〇 and 431 are the same in the same direction and the second side of the road is the same as the first side wall of the width The second (four) 422 (or the third side wall) of the crucible is such that the exposed area is A*B, and the first (four) cutting line is perpendicular to the direction in which the pair of pads 42 are laid. The two sidewalls 422 (or the second sidewall 423) are parallel to the direction in which the pair of pads 42 are disposed, and the first sidewall 421 is spaced apart from the opening 43 〇, 431 by a distance d that is at least greater than the two sidewalls 422 (or the third sidewall 423) ) The distance between the opening 43 〇, 431 is ^ 19294 1286830 50 μm (μηι). In the present embodiment, the process of using the industry's alignment error of 75 micrometers is used to ensure that the ability of the alignment error is 75 micrometers, which can be greater than or less than 75 micrometers. The distance 〇 is greater than or equal to U5 microns. Another = if the alignment error capacity is 5 〇 microns, then the distance (four), can be greater than or equal to 50 microns, the distance 〇 is greater than or equal to the micron. Even The openings 430, 431 are offset (such as the leftward offset is micron) m shown in the two pairs of set material area = 75 Γ ' not only can provide the same solder pad connection area (tweezing surface and = coated electronic components) The insulating resin (average particle size % micro-magic = under the core element and in the opening, avoiding the extrusion caused by the generation of the cavity), and even causes the short circuit of adjacent electronic components. The electronic carrier 41 can be a wafer material. The package substrate, the circuit board or the (four) transfer board used, etc., the main package of the electronic package (4) is an example (4). The body 411 of the electronic carrier 41 may be an insulating layer or a circuit stacked in the middle thereof. Layer 'and has a plurality of conductive lines on its surface Figure No. and #垫42, the towel portion of the pad is arranged in pairs. The insulating layer is, for example, glass fiber, epoxy resin (Ep〇xy), polyamidoline 0-de) film, FR4 resin. And a material such as BT (Bismaieimide Triazine), which is, for example, a copper layer. The electronic body 411 is covered with a protective layer 43 which is, for example, a 19294 1286830 solder mask. The solder resist layer is made of a highly fluid, compound (Pc) lymer). Epoxy resin (Cai (10) (4) 寻.Haibao "Layer 43 corresponds to at least two pairs of sets of fresh enamel to form openings 430 and 431, JL Φ 兮p bow „ j, , 忒 opening 43 〇 and 431 series with each other The first side wall 421 422 is the same as the outer side of the pad 42. The second side wall 421 422 of the same type of the pad 42 is not the same as the 4D picture of the Fuming Mingfen. The protective layer opening 43 under the electronic component, that is, the protective layer opening 431 located between a pair of soldering #42 is a distance from the first = wall of the soldering wire, and under the condition of a registration error of 75 micrometers, Can be equal to 75 U meters (other than 5G micron under the condition of 5 〇 micro-division), so that even if the opening 431 is biased (such as the meter), the same electronic connection can be provided. Setting surface = two insulating tree contacts for covering electronic components = heart: under the electronic components and the opening In the mouth, avoid the generation of air holes, less package and electrical bridging problems, and at the same time can make the insulating resin to: reduce the side of the _ less side to avoid the occurrence of solder bump _ ~ phenomenon, and even cause short circuit of adjacent electronic components Referring to Figure 5, the electronic carrier of the present invention is not intended. The smack of the hacker, the identification of the electronic carrier board of an embodiment #盘命,+,》

The openings are mainly the same, and the main difference is that the acoustic sound CW on the electronic carrier 41 is formed with at least two pairs of soldering holes 42 provided with openings 19294 18 1286830. The openings 430 and 431 are in the same direction. And exposing the first side wall 421, the second side wall 422, and the third side wall of the same H42, the == side wall 421 is perpendicular to the direction in which the pair of fresh shovel 42 is disposed, the first::: 2, the third side wall 423 is parallel to the pair of pads 42. The side wall 421 of the square is spaced apart from the opening 430 and 431 by a distance D: greater than the distance d between the second side wall 422 and the third side wall 423 by about 5G micrometers. Wherein the distance (4) is greater than or equal to greater than or equal to 125 microns from the D system; in addition, if the alignment error is 50 microns, the distance may be greater than or equal to % micrometer, and the distance D is Greater than or equal to 1 〇〇 micron. " Thus, even if the openings 430 and 431 are offset = ^ as described in the foregoing - the embodiment, the electrons can be provided; the contact area (wet area), and Insulation t-flat, uniform particle #5〇micron for covering electronic components is filled under the electronic component and in the opening, = gas explosion caused by gas hole and electrical bridging problem, and re-energy, phase ^ at least covering the sides of the pad to avoid the occurrence of esolder extrusion, which causes short circuit of adjacent electronic components.

At the same time, when the electronic component is subsequently attached to the pair of pads, the protective layer opening 43 under the electronic component is not located at the protective layer opening 431 of the second pair &amp; 42 (5). The first side wall of the pad is Λ» under the condition that the difference of 5 is Μ micron, the complex can also be greater than or equal to j U m (other than greater than or equal to the case where the alignment error is 5 〇 micron) % micron), so that even if the openings 430, 431 are offset, the same solder pad contact area (wetting area) of the electronic 19 19294 1286830 component can be provided, and the insulating resin (average particle size 50 μm) for covering the electronic components can be provided. Filling the underside of the electronic component and the opening to avoid the gas explosion and electrical bridging caused by the generation of the gas hole, the same day the Shouba resin can cover at least the side of the soldering pad to avoid the occurrence of fresh tin The phenomenon of solder extrusion, even causing a short circuit between adjacent electronic components. Embodiments Referring to Figure 6A, there is shown a plan view of a third embodiment of an electronic carrier board of the present invention. The electronic carrier of the second embodiment is the same as the first embodiment described above. The main difference is that the protective layer 43 on the electronic carrier 41 has an opening formed corresponding to at least two pairs of pads 42 disposed. And the first side wall 421, the second side wall 422, the third side wall 423, and the fourth side wall 424 of the second side of the bismuth I2 are in the same direction and completely reveal the same. The fourth side wall 421, 424 is perpendicular to the direction in which the fresh shovel 42 is disposed. The second and third side walls 422, 423 are parallel to the direction in which the pair of welding dies 42 are disposed, and the first side wall 421 (5) is separated from the opening 1 The distance!) is at least larger than the second and third side walls like (3):=43. and the distance of 431 is _5.micron. Its _= or is specific to 75 microns, and the distance D is greater than or equal to the opening 430 and 431. The distance is greater than or the distance d is greater than the block. When the force b is 50 microns, it is equal to _micron. Looking for 50 microns, the distance is greater than or 19294 20 1286830 - so 'even the opening 430 and 431 are offset, if the first line is not shifted to the right by 75 microns, the pad can still be maintained. There is an exposed material size to provide the same wetted area as the original design of the electronic device. On the same day, the insulating resin for covering the electronic component is filled under the electronic piece and the knife in the J is avoided. The resulting gas explosion and electrical bridging problems are now covered by the ^, eucalyptus, and eucalyptus to prevent the occurrence of solder bumps, and when the components are connected to the electronic components on the pair of pads. The protective layer opening 431 under the sub-element, that is, the unshielded layer opening 431 is at a distance of 75 micrometers from the pad side wall 421, and may be greater than or equal to =: wide (Another: the alignment error is 5. Micron can be == Outside t is open 43°, 4... The pad 42 has both exposed area dimensions to provide the wetted area of the electronic components, and is available for & Under the stomach and the sub-components, ΡΓ: The insulating resin is filled under the electronic component and in the opening to avoid the problem of gas explosion 3 bridging caused by the generation of the air hole, and the insulating resin can completely cover the side of the soldering pad. To avoid the phenomenon of solder protruding. In (4) 逯, avoid the farmer's four real difference Read the 7th to 7th (: figure, which is a schematic diagram of the embodiment of the present invention. The electric board is roughly the same as the third embodiment. The main difference is that And the solder pad "except for the left and right sides of the fresh enamel - can also be placed above, below, above / below or at the corner of ^ 19294 21 1286830 instead of the illustration, and not ^ ^ ' It can be used in conjunction with the actual circuit arrangement, and can also be applied to each of the embodiments. Please refer to Figures 8A and 8B for the four side walls. The plane and profile of the structure formed by A Temple is as follows: The board carrier board 4i, the electronic carrier board 41; ^ 糸匕 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 The electrically insulating 42' insulating resin 46' covers the electronic component 44 and is filled; the side surface of the bonding pad 42 is charged under the electronic component 44 and the openings 43A and 431. Wherein the electronic carrier board or the printed circuit board, the protective layer of soil, the circuit board (4) is a passive material. The 3 series is called a layer 'the electronic component (four) sub-element 44 can be placed through a guide such as solder paste Exposed on the solder bumps 42 of the protective layer openings 430 and 431, the iron=••refraction operation 'solds the electronic component 44 to the solder bumps 42 by solder paste_ and forms an electrical coupling relationship. Even if the protection layer opening position shift occurs due to the process precision and the error, and the protective layer openings 430 and 431 are shifted up, down, left, and right by a micrometer, the exposed solder pads are not caused to have the same size. change. In addition, in this embodiment, since the opening of the protective layer simultaneously exposes the four sidewalls of the zinc pad, the insulating resin 46 can be completely covered on the side of the bonding pad 4 2 in the subsequent operation, so as to avoid the passive component. When soldered onto the substrate by solder paste, 'the molten solder paste may flow through the gap between the surface of the pad and the anti-friction layer 19294 22 1286830' and then spread and contact each other along the gap between the substrate and the solder resist layer to cause solder bumps. The problem of stretching (extander extrusi〇n), even the short-circuit of the guiding element. ^ Broken

The fifth implementation of your I 4 reading Figure 9 is a schematic diagram of the electronic carrier board of the present invention. The electronic carrier board 41 of the present invention includes: a main body 411 · at least, a pair of pads 42 disposed on the surface of the main body 411, and the fresh sputum has the same size; And a protective layer 43 </ RTI> covering the surface of the main body 411. The protective layer 43 is formed with openings 431 and 431 at positions corresponding to the solder dies 42. The HAI and the 431 are adjacent to each other and expose the two pads 42. The same first sidewall 421 is perpendicular to the direction in which the 42 is disposed. the Lord

The distance D' of the first sidewall 421 of the pad from the openings 430 and 431 is greater than or equal to 125 micrometers; if the alignment error capability is % micrometer, the distance D is greater than or equal to 100 micrometers. Therefore, when the protective layer (solderproof layer) openings 430 and 43 1 are formed, the opening galax is disposed at the second pair of pads 42 due to the accuracy of the clothing and the block difference, so even if In the event of a misalignment, it is still necessary to avoid the difference in the area of the exposed openings 43A and 431 of the pair of pads 42, so that when the electronic components are subsequently attached to the pads 42, the phenomenon of the wet area is established. When the opening of the opening is 75 micrometers to the left, the distance D of the first side wall 421 of the bonding pad from the opening 43 is changed to 5 〇 micrometers (or 23 19294 1286830 Ϊ; The micro-magic gas burst and the electrical bridge =: 43 ° in the '--the guide is set to be connected to the pair of soldering irons on the electronic components, the protective layer opening 431 under the untracked electric That is, under the condition that the protective layer opening 431 which is not located between the two pairs of ^^2 is 7 micrometers away from the first side wall of the fresh sputum, the error may be greater than or equal to = her error is 5. Micron Under the condition (10), even if the opening (four), 431 is misaligned, it is still necessary to avoid pairing: 42 is exposed outside the opening 43〇, the area of 431 is different, and the subsequent wetted area is not included in the soldering of the electronic component. Balanced creation of the phenomenon of the monument 0 more than six embodiments, see Fig. 10, is a plan view of the sixth embodiment of the electronic carrier of the present invention. The electronic carrier of the sixth embodiment of the present invention and the foregoing first embodiment Roughly the same, the protective layer openings 430 and 431 are still in the same direction, and the soldering holes 42 are exposed. The first side wall 421 and the fourth side wall 424 of the soldering ring 42 are exposed outside the protective layer openings 430 and 431. The first side wall 421 and the fourth side wall 424 are perpendicular to the paired soldering. The distance between the first side wall 421 and the opening 43 is at least greater than the distance d between the fourth side wall 424 and the opening 43 and 431. The distance d is The system is greater than or equal to micrometers, and the distance D is greater than or equal to 125 micrometers; in addition, if the alignment error capability is 19294 24 1286830 is 50 micrometers, the service distance (four) can be cut off from D to be greater than or equal to (10) (four). , the heart is not, the distance = the deviation (regardless of the left = inch to =): can still maintain the exposed surface of the weld 42 can be the same wetted area as the original design, while avoiding the mouth: = ΓΤ _ Under the electronic component, there is a gas explosion and electrical bridging problem caused by the rotten two-story. 'From the subsequent attachment of the electronic component to the pair of materials, the trapping layer τ /her埶 below the electronic component The heart opens 431, that is, the protective layer opening 43 that is not located in the second pair and the dry art 2 is 1 75 距离Under the ##, under the piece, the complex can also be greater than or equal to the state "may be greater than or equal to 50 ^ under the condition of 50 micron difference", so that even if the opening 43〇, 431 is offset, the pad 42 can be maintained. Both the exposed area size, Kong, 'wet area, and the sub-components are the same as the original design. The insulating resin of the μ 疋 疋 疋 充 充 该 该 该 该 ... 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免 避免For the seventh embodiment of the present invention, reference is made to the first embodiment of the present invention. The protection layer is opened to the arrangement of the pads. As shown, the planar dimensions of the two pairs of pads 42 on the electronic carrier 41 can be different from each other, and the protective layer openings 430 and 431 are in the same direction as each other '25 19294 1286830, wherein the opening 430 is fully exposed. The first sidewall c of the pad 42 includes a sidewall 422, a third sidewall 423, and a fourth sidewall 424. The first sidewall and the fourth sidewall of the fresh pad 42 are exposed outside the opening 431. 1 - the side wall 4 21 is spaced apart from the opening 4 3 〇 and 4 3 距离 the distance D is at least ^ side soil 422 the first side wall 423 and the fourth side wall 424 are spaced apart from the opening 431 and the distance 431 is about 50 microns. Wherein the distance d is greater than or equal to 75 microns: the distance D is greater than or equal to 125 microns; and, if the alignment error capability is 5G microns, the distance d can be greater than or equal to, the distance 〇 It is greater than or equal to 100 microns. ^, even if the openings 430 and 431 are offset (regardless of the leftward or downward bias), the exposed surface of the pad 42 can be maintained to provide the same wetted area as the original design of the electronic component. At the same time, the insulating resin of the 匕 匕 composite element can be filled with the air blast and the electrical bridging problem caused by the underside of the electronic component and the opening of the air-free hole. At the same time 'When the follow-up ☆ the paired soldering is connected to the electronic components:: the protective layer opening-1 below the electronic component, that is, not located in the second; Γ ^ 塾 42 protective layer open state distance from its solder pad - (4) The distance of 421 is ≤ Μ, 430, 43 i In the event of a misalignment, the weld can be maintained to have a size of the outer casing area to provide the same electronic component as the original design: #贝' at the same time, the insulating resin for covering the electronic component is filled with the electric bridge. μ 'avoiding the gas explosion caused by the generation of the atmosphere and 19294 26 1286830 Therefore, in the electronic carrier of the present invention, the protective layer covering the electric surface is welded to the second and second pairs. The pad is formed with the same direction of the mouth" by the outside of the Xia Ψ containing a sweat (. ~ - welding the same side wall, so, in the formation of protection; solder mask) opening settings, due to process accuracy and error considerations, Because the ", the same direction sighs at the pair of pads, even if it is biased , Derived from different pad area, the outer free path of an opening, so that the subsequent connection to the bonding pad ^ - keep member days, due to the phenomenon of tombstoning wetted area (wetting area) of the imbalance caused.

On the same day, the opening of the protective layer may expose the stem 1/day of the pair of solder pads in the direction of the pair of pads, and the insulating resin for covering the electronic components is filled under the sub-element and In the opening, avoid the gas explosion caused by the generation of the air hole to bridge the electricity problem. In addition, the opening of the protective layer may expose at least two identical first and second sidewalls of the two zinc bismuth, or expose at least three identical bismuth, knot _ + two, brother-, brother The three side walls, the first side wall of the solder pad is perpendicular to the direction in which the crucible is laid, and the second (third) side wall is parallel to the pair of fresh f. In a further direction, the first sidewall is spaced apart from the opening by a distance greater than at least 5 μm from the second (second) sidewall of the wall. In this way, even if the interface is biased, not only can the same exposed area of the pad be maintained, but also the insulating resin (average particle size of 50 μm) covering the electronic component can be filled under the electron and under the opening. The gas explosion caused by the generation of the gas hole and the electrical contact 4 can simultaneously make the insulating resin at least cover the solder pad to avoid solder extrusion, and even cause short circuit of adjacent electronic components. The problem. In addition, the protective layer openings may be in the same direction and completely reveal the second 19294 27 1286830: the same ... second, third and fourth side walls of the pad, wherein the first and fourth side walls are perpendicular to the paired welding The direction of the 塾 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , ,如此 In this way, even if the opening is misaligned, the weld bead can be maintained to have the same area as the original design, and the insulation area of the electronic component is the same as that of the original design. Filling the bottom of the electronic component with 7 π to avoid the gas explosion caused by the generation of the gas hole and the electrical bridging can also make the insulating resin completely cover the side of the soldering pad to avoid the phenomenon of solder protrusion. In addition, in the present invention, the opening of the protective layer may expose only the first side m sidewall of the solder pad to be perpendicular to the direction in which the pair of pads are disposed, so that when the protective layer opening is formed, due to process precision and error considerations Since the two openings are disposed in the same pair of pads, even if the offset occurs, the area of the exposed opening of the pair of pads is prevented from being different, so that the electronic components are subsequently attached to the recording pad. In addition, in the present invention, the opening of the protective layer may expose the first and fourth sides of the bonding pad i '5 hai - and the fourth sidewall is perpendicular to the pair The distance between the X sidewalls and the opening is at least greater than the distance of the fourth side soil gate Ik «Hai opening is about 5 〇 micrometers. Thus, even if the opening is misaligned, the exposed area of the solder fillet can be maintained to provide the same wetted area of the electronic component as the original sigh 4, and the insulating resin for covering the electronic component is filled with the electron. Underneath the components and the slings, avoiding the hole explosion and the electrical bridging caused by 28 19294 1286830. In the present invention, one of the openings of the protective layer is fully exposed - the first, second, third and fourth side walls of the middle-pad are exposed to the other opening The first and fourth side walls, and the first side wall is spaced apart from the opening by at least a distance of about 10 micrometers at a distance between the outer hole and the outer wall of the fifth side. Thus, even if it is opened, the fresh enamel has both exposed area dimensions to provide an electronic element flat piece with the same wetted area as: _ Γ 同时 可供 同时 同时 同时 同时 包覆 包覆 包覆 包覆 包覆 包覆 包覆 包覆 ' 5 5 In this opening, the gas explosion caused by the generation of the air hole and the electrical bridging problem are avoided. The above-described embodiments are merely illustrative of the principles of the invention and its effects, and are not intended to limit the invention. Any person skilled in the art can make modifications to the above embodiments without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the scope of the application patents described below. _ [Simple diagram of the diagram] The 1A series is a schematic plan view of the surface-attached passive component on the substrate; the 1B and 1C diagrams correspond to the section line and section 1 line CMC in Figure 8 FIG. 2A and 2B are diagrams showing the assembly of passive components disclosed in US Pat. No. 6,521,997; and Figures 3A and 3B are passive as disclosed in US Patent No. 2005/025323 i. 19294 29 1286830 4A and 4B are schematic plan views of the first embodiment of the electronic carrier of the present invention; FIG. 4C is a leftward bias of the protective layer opening in the electronic carrier of the first embodiment of the present invention; FIG. 4D is a plan view showing a protective layer in an electronic carrier according to a first embodiment of the present invention; a plan view showing a different opening size; and FIG. 5 is a plan view showing a second embodiment of the electronic carrier of the present invention. FIG. 6 is a plan view of the third embodiment of the electronic carrier of the present invention. FIG. 6B is a plan view showing the opening of the protective layer in the electronic carrier of the third embodiment of the present invention shifted to the right; The brothers 7A to 7C are The electronic carrier board of the invention is not intended; the N 8th and 8B drawings are the plane and cross-sectional view of the skirt structure of the present invention; the pattern formed by the buns carrier board; Fig. 9 is the electronic carrier board of the present invention. 5th Embodiment FIG. 10 is a plan view of an electronic carrier board according to the present invention; and FIG. 11 is a seventh embodiment of an electronic carrier board according to the present invention. 30 11 1286830 12 Pad 13 Solder Mask 14 Passive Element 15 Solder Paste 17 Gap ' 22 Pad ' 23 Solder Mask ^ 230 Groove 32 Pad * 330 Opening 331 Bar 3300 Runner 41 Electronic Carrier 411 Body 42 Fresh 421 first side wall 422 second side wall -• 423 third side wall 424 fourth side wall 43 protective layer 430 opening 44 electronic component 45 conductive material 46 insulating resin 420 conductive line M, Al, A2, D, d, A, B, X distance 31 19294

Claims (1)

1286830 'Scope of application for patents · · An electronic carrier board comprising: a body; (4) a soldering iron provided on the surface of the body; and a TI layer covering the surface of the body for a long time, The protection layer 4 is formed with an opening corresponding to the position of the peak pad, tt-r^„, the openings are in the same direction and the outer first and second sidewalls of the two cups are exposed, and the pad is the same Vertically, the direction in which the pair of pads are laid is 'the second side wall is flattened in the direction 4 of the butt welds at least—the first of the pads: the distance between the sides of the soil IV is at least greater than the distance between A and ... The distance of the opening is 50 micrometers. 2. : The electronic carrier board of the scope, which is one of the package substrate, the circuit board and the printed circuit board used for the package of the cymbal package. The electronic carrier board of the item is touched by π ▲ The son board is one of the board layers, and the edge layer and the insulating layer of the circuit layer are stacked in the middle. , wherein the solder paste can be coated with solder paste for the electronic element The solder paste is electrically connected to the solder pad, and the protective layer opening under the electronic component is spaced apart from the solder pad by a distance of at least 50 micrometers from the second sidewall. 5. As claimed in claim 4 An electronic carrier board, wherein the electronic component is a passive component for encapsulating the passive component with an insulating resin, and is filled under the passive component and in the opening. 19294 32 1286830 6. If the patent application scope is the first item The electronic carrier board, wherein the sidewall of the solder pad is greater than or equal to 125 micrometers from the opening, and the first side wall is greater than or equal to 75 micrometers from the opening. Brother-side. The electronic carrier board, wherein the pair of fresh lines can be used for connecting electronic components, and the protective layer under the unguarded electronic components is π from the first side wall of the soldering iron to be 75 micrometers. 8. ^_ The electronic carrier board of claim 1, wherein the first side of the bonding pad is greater than or greater than or equal to (丨) (10) micrometers, and the opening is greater than or equal to 5 micrometers. Electronic carrier board, wherein the pair is fresh仏 can be connected to the electronic component 'and correspondingly not disposed under the electronic component 50 = the sheath opening is from the solder joint - (4) distance is greater than or equal to 50 microns. 10 · The second solder pad is exposed as disclosed in the patent application scope The same third outer m...one electronic carrier board', wherein the opening is reconfigurable ^^^^, the first one and the third side wall, the side wall is perpendicular to the pair of solder pads: three: the wall is parallel The orientation of the pairs is freshly arranged, and the distance of the ί:2:: Guanghai opening is at least greater than the distance between the second and third sides of the opening by 5 〇 micrometers.] 11· An electronic carrier board, including: a body; a second pair of solder pads disposed on the surface of the body; and a protective layer covering the surface of the body, the protective layer corresponding to 19294 33 1286830, the pad position is formed with the openings being in the same direction It completely reveals that the two pads are the same ^ φ ^ ^ ^ brothers, brothers and brothers, and the other four sides of the wall, &quot; two brothers, the fourth side wall is perpendicular to the pair of pads placed on the side (four) parallel to the Lang pad Direction, . ☆ complex two one 3 hai:: the first side of the pad - sidewall spacing The distance of the mouth is at least • 19/1, a brother 'third sidewall of the opening distance of 50 microns. • 12. If the patent application scope U is the mine + #, the board is used for chip packaging. One. 3. The electronic carrier board of claim 5, wherein the body is an insulating layer and an insulating layer in which the wiring layer is stacked in the middle. /, the electronic board of the „ 项 item, where = 锡锡斧' is used for the electronic component to be electrically connected to the 'dry pad by the solder paste, and the protective layer opening distance under the electronic component is soldered The first-side wall distance is at least greater than the second side wall distance of 5 μm. The electronic carrier of claim 14 wherein the electronic component is a passive component for encapsulating the passive component with an insulating resin. Between the passive component and the opening. 16. (4) Material · (4) U-touch, the towel, the side wall of the fresh-skinned brother is greater than or equal to 125 microns, the second, third, and The four sidewalls are greater than or equal to 75 micrometers from the opening. 17. The electronic carrier of claim 16, wherein the pair of pads is adapted to be connected to the electronic component, and the corresponding component is not disposed on the electronic component. 19294 34 1286830 The distance between the first side wall of the pad is greater than or equal to 19. The electronic carrier board of claim 18, wherein the pair of pads is for attaching electronic components, / in pairs 1 child is in the 兀仵 and the correspondence is not set in the electronic Item The protective layer below is open at 75 microns. A. The electronic carrier of claim U, wherein the outer first sidewall is greater than or equal to i 0 micrometers from the opening, and the sidewall is greater than or equal to 5 micrometers from the opening. A lower protective layer opening is 50 microns from the first sidewall of the solder fillet. The second transmission 20 · If the patent application scope of the nth division of the main sub-board' complex includes a conductive circuit disposed thereon, wherein the conductive circuit is disposed on the left side, the right side of the pad, above and below the upper surface, One of the top/bottom and the corner. 21. An electronic carrier board comprising: a body; to &gt; a pair of pads disposed on a surface of the body; and a protective layer of the second and the surface of the body, the protective layer corresponding to the pad position An opening is formed which is in the same direction of each other and exposes the same first side wall of the fresh pad, the first side wall being perpendicular to the direction in which the pair of pads are laid. 22. The electronic carrier board of claim 1, wherein the electronic carrier board is one of a package substrate, a circuit board, and a printed circuit board used for sealing the cymbal. 23. The electronic carrier board of claim 21, wherein the body of the electronic carrier is one of 35 19294 1286830 having an insulating layer and an insulating layer in which the wiring layer is stacked. 24. The electronic carrier board of claim 21, wherein the solder pad is coated with a solder paste for electrically connecting the electronic component to the solder material. 25. The electronic carrier board of claim 24, wherein the electronic component is a passive component for encapsulating the passive component with an insulating resin and is filled under the passive component and in the opening. 26. The electronic carrier of claim 21, wherein the first sidewall of the pad is greater than or equal to 125 microns from the opening. 27. The electronic carrier board of claim 26, wherein the pair of fresh pads are adapted to be connected to the electronic component, and the opening of the protective layer not disposed under the electronic component is away from the first sidewall of the bonding pad The distance system is greater than or at 7 5 micro. 28. The electronic carrier of claim 21, wherein the sidewall of the pad is greater than or equal to 〇〇 micron. The electronic carrier board of the third aspect of the invention, wherein the pair of pads is adapted to be connected to the electronic component, and the opening of the protective layer not disposed under the electronic component is away from the first sidewall of the bonding pad The system is greater than or equal to 30, an electronic carrier board comprising: a body; a pair of pads on the surface of the body; and a protective layer for covering the surface of the body, the protective layer corresponding to 5 The first dry pad and the fourth side wall are perpendicular to the pair of dies. The pad is disposed in a direction, and at least one of the second sidewalls is spaced apart from the opening by at least a fourth distance: J is spaced apart from the opening by a distance of 50 microns. 31. ::Γ! The electronic carrier board of the 3rd item of the patent range&apos; wherein the electronic carrier: one of the sealing plate, the f-plate and the printed circuit board of the chip package. 32. The electronic carrier board of claim 30, wherein the main body of the electronic carrier 2 is an insulating layer and an insulating layer in which a circuit layer is stacked in the middle. Wherein the solder pad is soldered to the electronic component by the solder paste and electrically connected to the dry and the protective layer opening under the electronic component is at least greater than the second sidewall distance of the solder pad Side wall (four) 50 microns. The electronic carrier board of claim 33, wherein the electronic component is a passive component for encapsulating the passive component with an insulating resin and is filled under the passive component and in the opening. 35. The electronic carrier of claim 30, wherein the bead of the soldering iron is greater than or equal to 125 microns from the opening, the fourth sidewall being greater than or equal to 75 microns from the opening. The electronic carrier board of claim 35, wherein the pair of soldering systems is adapted to connect the electronic components, and the opening of the protective layer not disposed under the electronic component is 75 micrometers away from the first sidewall of the soldering pad. A Temple 19294 37 Ϊ286830 37. As claimed in the third section of the patent scope - the side wall distance gate "1, the distance from the weld is greater than or equal to 100 microns, and the case is greater than or equal to the opening system. 50 micron. &quot;4.0 凊 凊 凊 凊 凊 塾 塾 塾 ' ' ' ' ' ' ' ' 其中 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' Etc. 39. If the scope of the patent application is 30#, the cushion board P, among the pair of fresh sheath openings, ri: the direction of the brother and the third side of the guard in the direction of the protection:苡S three side walls are parallel to the pair of front 塾 少 少 大于 大于 大于 少 少 侧壁 侧壁 侧壁 侧壁 侧壁 侧壁 侧壁 侧壁 侧壁 侧壁 侧壁 如 如 如 如 如 如 如 Α Α Α Α Α Α Α Α Α Α Α Α Α Α Α Α Α The electronic carrier board, wherein the solder pad=side wall edge is greater than or equal to 125 (four), and the second side: the side wall is greater than or equal to 75 micrometers from the opening. - ^The electronic carrier board of the siblings Wherein the pair of soldering systems are connected to the electronic component, and the corresponding component is not disposed in the electronic component The opening of the protective layer is at a distance of 75 micrometers from the first sidewall of the bonding pad. The secondary carrier 42. == the electronic carrier of the 39th patent range, wherein t, the wall of the bonding pad is larger than the opening system Or equal to 100 micrometers, the second and third sidewalls are greater than or equal to 5G micrometers from the opening. The electronic carrier board of claim 42 of the patent application range, wherein the pair of frontal systems can be connected to the electronic device. The electronic component board of claim 39, wherein the distance between the protective layer opening not under the electronic component 19294 38 1286830 is greater than or equal to 50 micrometers from the first sidewall of the bonding pad. The paired pads are different in planar dimensions from one another. 39 19294