CN102194806A - 堆栈式双晶片封装及其制备方法 - Google Patents
堆栈式双晶片封装及其制备方法 Download PDFInfo
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- CN102194806A CN102194806A CN2011100716003A CN201110071600A CN102194806A CN 102194806 A CN102194806 A CN 102194806A CN 2011100716003 A CN2011100716003 A CN 2011100716003A CN 201110071600 A CN201110071600 A CN 201110071600A CN 102194806 A CN102194806 A CN 102194806A
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Abstract
本发明堆栈式双晶片封装及其制备方法涉及一个引线框,具有一个带有中间金属化的夹片结构的半导体晶片堆栈。水平突出物从夹片结构开始延伸,以便在制备过程中,确保夹片结构保持水平。
Description
技术领域
本发明涉及一种半导体封装,更确切地说,是关于多半导体晶片封装及其制备方法。
背景技术
在直流到直流的转换器中,一个公共封装中通常电连接数个场效应晶体管(FET)。一个直流-直流转换器包括一个高端(HS)场效应晶体管和一个低端(LS)场效应晶体管。其特点是,并列组装高端场效应晶体管和低端场效应晶体管,并利用导线将它们电连接起来。这种直流到直流的转换器的引脚,大于其他方式设计的引脚。
因此,十分有必要制备封装尺寸小于现有设备的直流到直流的转换器封装
发明内容
本发明提供了一种堆栈式双晶片封装及其制备方法,它可以制备出封装尺寸小于现有设备的直流到直流的转换器封装。
为了达到上述目的,本发明通过以下技术方案实现:
一种半导体晶片堆栈,其特点是,该半导体晶片堆栈包含:
一个基础引线框;
一个通过倒装法安装在所述的基础引线框上方的第一半导体晶片;
一个第二半导体晶片,其堆栈在第一半导体晶片上方,即所述的第一半导体晶片与基础引线框相对的一侧;
以及一个位于第一和第二半导体晶片之间的夹片结构。
其中,所述的第二半导体晶片为一个p-通道垂直场效应管,所述的第一半导体晶片为一个n-通道垂直场效应晶体管,其中所述的第二半导体晶片不是通过倒装法安装在第一半导体晶片上。
所述的第二半导体晶片通过倒装法安装在第一半导体晶片上方,第一和第二半导体晶片是串联的垂直晶体管。
所述的第一半导体晶片具有面向第二半导体晶片的第一接头,所述的第二半导体晶片具有面向第一半导体晶片的第二和第三接头,其中所述的夹片结构还包括一个第一导电段,将所述第一半导体晶片的第一接头连接到所述第二半导体晶片的第二接头上,以及一个第二导电段,连接到所述第二半导体晶片的第三接头上,但与第一半导体晶片绝缘。
所述的第二导电段在第一导电段附近,但相互隔开。
所述的第二导电段非导电地连接到第一半导体晶片上。
该半导体晶片堆栈还包含非导电的水平突出物,位于夹片结构和第一半导体晶片之间,使第一和第二导电段的顶部共面。
该半导体晶片堆栈还包括一个集成电路芯片,与第一半导体晶片一起封装在基础引线框上。
所述的第一和第二半导体晶片为垂直场效应管,其中集成电路芯片通过引线框引线,连接到第一和第二半导体晶片的栅极上。
所述的第一和第二半导体晶片都是垂直场效应管。
所述的第一导电段在其顶部具有一个凹陷部分,其中第二导电段非导电地连接到所述的凹陷部分上。
所述的第一导电段具有上部和下部的锯齿形形状,下部接触第一半导体晶片,上部接触第二半导体晶片,其中所述的凹陷部分对应下部中的一个。
所述的第一导电段所述的凹陷部分为半刻蚀部分。
一种堆栈式结构,其特点是,该堆栈式结构包含:一个第一半导体晶片和一个第二半导体晶片,
所述的一个第一半导体晶片和一个第二半导体晶片堆栈在一起,其中所述的第一半导体晶片具有一个第一晶片第一接头,对着第二半导体晶片;
所述的第二半导体晶片具有一个第二晶片第一接头和第二晶片第二接头,都对着第一半导体晶片,其中所述第二晶片第二接头与所述第一半导体晶片相互重叠,但不与它电接触,其中所述第二晶片第一接头与所述第一晶片第一接头相互重叠,并电接触。
该堆栈式晶片结构还包含:
一个位于第一和第二半导体晶片之间的夹片结构,具有第一和第二导电段,
其中第一导电段电连接到第一晶片第一接头和第二晶片第一接头上,第二导电段电连接到第二晶片第二接头上,但不连接到第一半导体晶片上。
所述的第一和第二导电段与封装引线电接触。
所述夹片的第二导电段与第一导电段电绝缘。
所述的第一半导体晶片比第二半导体晶片大。
所述的第一和第二半导体晶片为垂直场效应管。
所述的第一晶片第一接头是一个漏极接头,所述的第二晶片第一接头是一个源极接头,所述的第二晶片第二接头是一个栅极接头。
所述的第一半导体晶片背对着第二半导体晶片,通过倒装法安装,所述的第二半导体晶片朝着第一半导体晶片,通过倒装法安装。
一种半导体封装,其特点是,该半导体封装包含:
一个第一半导体晶片;
一个连接到第一半导体晶片上的夹片结构;
以及位于夹片结构和第一半导体晶片之间的数个水平突出物,使夹片结构与半导体晶片平行,其中粘合材料位于至少某些水平突出物之间,将夹片结构连接到第一半导体晶片上。
所述的水平突出物具有共同的高度。
所述的夹片结构与封装引线电接触。
所述的水平突出物是非导电的。
至少某些所述的粘合材料是导电的,位于至少某些水平突出物之间,将至少一部分夹片结构电连接到所述第一半导体晶片上。
所述的夹片结构还包含一个第一导电段和一个第二导电段。
所述的第一和第二导电段的顶部是共面的。
所述的第一导电段导电连接到第一半导体晶片上,所述的第二导电段与第一半导体晶片相互重叠,但与第一半导体晶片电绝缘。
该封装还包含一个堆栈在夹片结构上的第二半导体芯片,所述的第二半导体芯片在第一半导体晶片的对面。
一种用于制备引线框封装的方法,其特点是,该方法包含:
将第一半导体晶片通过倒装法安装在导电的基础引线框上,即在所述的第一半导体晶片具有数个正面电接头,与所述的基础引线框电接触;
在所述的第一半导体晶片上方,所述的第一半导体晶片与基础引线框相对的一侧,设置第一夹片结构,其中所述的第一夹片结构包括第一和第二导电段;
并且通过倒装法将第二半导体晶片安装到所述的第一夹片结构上,所述的第二半导体晶片具有数个正面电接头,与所述的第一夹片结构电接触,第二半导体晶片的正面电接头的第一部分,连接到第一导电段上,并通过第一夹片结构的第一导电段,与第一半导体晶片的背部电接头电接触,第二半导体晶片的正面电接头的第二部分,连接到第一夹片结构的第二导电段上,但没有与第一半导体晶片电接触。
设置所述的第一夹片结构还包含,设置带有数个电绝缘的水平突出物的所述的第一夹片结构,对着所述的第一半导体晶片,在所述的第一夹片结构和所述的第一半导体晶片之间,构成一个空隙。
设置所述的带有数个电绝缘水平突出物的第一夹片结构还包含,使所述的数个绝缘突出物具有一个共同的高度。
附图说明
图1表示依据本发明的第一实施例,一种引线框封装的透视图;
图2表示除去密封成型材料后的图1所示的引线框封装的透视图;
图3表示连接在图2所示器件上的基础引线框和半导体晶片的透视图,图中省去了图2的其他部件;
图4表示安装在图3所示的结构上的第一夹片结构的透视图;
图5表示图4所示的夹片结构的倒置视图;
图6表示沿6-6线,图5所示的夹片结构的部分剖面图;
图7表示安装在图4所示的第一夹片结构上的第二半导体晶片的透视图;
图8表示图2所示的夹片结构的倒置视图;
图9表示依据第一可选实施例,图2所示的引线框封装的透视图;
图10A和10B表示两个公共半桥式电路的电路示意图;
图11表示依据本发明的第二实施例,类似于图4所示的引线框封装的透视图;
图12表示第二半导体晶片安装在图11所示的引线框封装的透视图;
图13表示第二晶片结构安装在图12所示的引线框封装上的透视图;
图14表示带有密封成型混料的图13所示的引线框封装的透视图;
图15A和15B分别表示同一个IC控制芯片一起封装的本发明所述的堆栈式结构的俯视图和剖面图;
图16A和16B分别表示基于美国申请案12/726,892的图片的俯视图和剖面图;
图17A至17I-3表示依据本发明的一个可选实施例,一个堆栈式晶片结构的组装方法俯视图和剖面图;
图18A至18C表示依据本发明的另一个可选实施例,一个堆栈式晶片结构的俯视图和剖面图;
图19A至19C表示依据本发明的另一个可选实施例,一个堆栈式晶片结构的俯视图和剖面图。
具体实施方式
参见图1和2,引线框封装10含有数个引线11-18、基础引线框20、第一和第二半导体晶片22和24以及第一和第二夹片结构25和26。第一夹片结构25位于第一和第二半导体晶片22和24之间。第一半导体晶片22位于基础引线框20和第一夹片结构25之间。第二半导体晶片24位于第一和第二夹片结构25和26之间。半导体晶片22和24在电学领域中众所周知。在本例中,半导体晶片22和24为功率场效应管(FET)或功率金属氧化物半导体场效应晶体管(MOSFET)等晶体管。
参见图2和3,半导体晶片22具有一个源极接头30、一个栅极接头31以及一个漏极接头32。源极接头30和栅极接头31位于半导体晶片22的一个公共面上,漏极接头32设置在半导体晶片22的另一个相对对面。因此,源极接头30如图中虚线所示。更确切地说,源极和栅极接头30和31面对着基础引线框20,并与之电接触。第一半导体晶片22具有一个与第一夹片结构25相互重叠的区域。
基础引线框20含有第一和第二33和34导电部分,由金、铜、铝或它们的合金等任意合适的导电材料构成。第一部分33与第二部分34电绝缘。第一和第二部分33和34的相对尺寸满足第一半导体晶片22的运行和电学要求。为此,第一部分33与第一半导体晶片22的源极接头30相互重叠并接触,第二部分34与第一半导体晶片22的栅极接头31相互重叠并接触。由于源极和栅极接头的特点是位于垂直金属氧化物半导体场效应晶体管晶片的正面,因此第一半导体晶片22可以利用倒装晶片法安装在基础引线框上,漏极接头32向上突出。
参见图2、3和4,夹片结构25连接在第一半导体晶片22的漏极接头32上。更确切地说,夹片结构25含有数个空间分离的导电段40和42。利用任意已知技术,导电段40可以与段42电绝缘。如图所示,在导电段40和42之间有一个空洞44。导电段40与漏极接头32电接触,并可以利用导电环氧树脂等任意已知技术,连接到漏极接头32上。利用非导电环氧树脂等,可以将导电段42非导电地连接到半导体晶片22上,从而与漏极接头32绝缘。
参见图5和6,从第一夹片结构25面对第一半导体晶片的那端开始延伸的是一个或数个由硅树脂制成的电绝缘突出物47。在将夹片结构25连接到第一半导体晶片22上之前,利用已知技术将突出物连接到夹片结构25上。在示例中,突出物47从段40和42开始,朝着第一半导体晶片22延伸,并利用任意合适的粘合剂,连接到第一半导体晶片22上。因此,在第一半导体晶片22和第一夹片结构25之间有一个空隙49,如图6中的剖面沿图5的线6-6所示。可以利用焊锡或导电环氧树脂等导电粘合剂,填充在空隙49中,将段40电连接到第一半导体晶片22上。使用突出物47是为了确保在制备封装10时,第一夹片结构25完全水平。因此,所有的突出物47都有一个公共高度。还可选择,突出物合适的高度,以校正第一夹片结构25的厚度或外形的非均匀性,从而维持一个完全水平的表面,在该表面上安装第二半导体晶片24。突出物47也有助于使段42与第一半导体晶片22绝缘。
参见他4和7,第二半导体晶片24连接在夹片结构25上。半导体晶片24含有栅极、源极和漏极接头46、48和50。尽管如图所示,漏极接头50是作为半导体晶片24背面的一个子部分,但实际上,漏极接头可以构成整个背面。栅极接头46对着导电段42,与导电段42相互重叠,并利用导电环氧树脂或焊锡等,与导电段42电接触。漏极接头50设置在半导体晶片24的一侧,背对着夹片结构25。由于栅极和源极接头46、48是倒装的,因此第二半导体晶片24可以用倒装法安装在第一夹片结构25上。要注意的是,突出物47使第一夹片结构25的段42位于第一半导体晶片22上方,同时与它电绝缘——因此,第二半导体晶片24的栅极接头46无需电连接到第一半导体晶片22上,就可以电连接到导电段42上。另外,突出物47确保第二半导体晶片24在段40和42上具有一个平坦的表面,突出物47将安装在段40和42上。
参见图2、7和8,利用导电环氧树脂或焊锡,将第二夹片结构26连接到漏极接头50上。如图8所示,第二夹片结构26也含有数个水平突出物51,如图5和6所示,第二晶夹片结构26以上述第一夹片结构25的方式,朝着第二半导体晶片24延伸。这些突出物有助于在整个组装过程中,使第二夹片结构26保持水平,并且可以是导电或非导电的。导电粘合剂(例如导电环氧树脂或焊锡)可以用于将第二夹片结构26粘合并电连接到第二半导体晶片24上。然后,如图1所示,利用任意合适的成型混料52,将这种堆栈全部或部分密封。如图所示,成型混料52完全密封了半导体晶片22和24,引线11-18的一部分裸露出来。
如图所示,每个引线11-18都同基础引线框20、第一夹片结构25或第二夹片结构26的其中之一集成起来。如图所示,引线12、17和18同基础引线框20集成起来,引线11、13和14同第一夹片结构25集成起来。引线15和16同第二夹片结构26集成起来。因此,引线12和17作为引线框封装10以外的一个引脚,用于第一半导体晶片22的源极接头30。引线18作为第一半导体晶片22的栅极接头31的引脚外露。引线11作为第二半导体晶片24的栅极接头46的引脚外露,引线13和14作为第二半导体晶片24的源极接头48以及第一半导体晶片22的漏极接头32的引脚外露。引线15和16作为第二半导体晶片24的漏极接头50的引脚外露。
尽管图中所示的引线11-18可以同基础引线框20、第一夹片结构25或第二夹片结构26的其中之一集成起来,但这并不是必须的。例如,引线11-18中的任何一个引线,都可以利用与引线接合或带接合技术有关的任意已知技术(例如利用引线接合或导电带54),与基础引线框20、第一夹片结构25或第二夹片结构26的其中之一电接触,如图9所示。在这种情况下,第二夹片结构26并不是必须的,第二半导体晶片24的漏极接头50可以利用引线接合或带接合技术,直接接合到引线15和16上。而且,还可选择将第一和第二夹片结构接触到基础引线框的引线上,以代替将引线与第一和第二夹片结构集成起来。
图10A表示两个串联晶体管的半桥式电路。更确切地说,图10A表示两个串联n-通道金属氧化物半导体场效应晶体管,其中低端金属氧化物半导体场效应晶体管8的漏极连接到高端金属氧化物半导体场效应晶体管90的源极上。该电路结构尤其适用于功率转换系统。其特点在于,低端金属氧化物半导体场效应晶体管80的电流高于高端金属氧化物半导体场效应晶体管90。因此,它需要比高端金属氧化物半导体场效应晶体管90更大的晶片尺寸。此外,在一种典型的垂直金属氧化物半导体场效应晶体管中,其源极和栅极接头位于上部,漏极接头位于底部。综合考虑,这会带来半桥式电路中堆栈金属氧化物半导体场效应晶体管的问题。出于几何和稳定性等原因,较大的晶片(例如低端金属氧化物半导体场效应晶体管)应位于底部。因此,(图2所示的)第一半导体晶片22为低端金属氧化物半导体场效应晶体管80,第二半导体晶片24为高端金属氧化物半导体场效应晶体管90。但是,为了将低端的漏极有效地连接到高端的源极上,这两个金属氧化物半导体场效应晶体管必须采用倒装法安装。然而,由于栅极接头向下朝着低端金属氧化物半导体场效应晶体管,因此要连接到高端金属氧化物半导体场效应晶体管的栅极,目前比较困难。本发明利用第一夹片结构25的导电段42底部上的非导电突出物47,解决了该难题。这样一来就可以连接第二半导体晶片24的栅极接头46,而无需将它短接至第一半导体晶片22上。
在图10B所示的可选电路中,将两个金属氧化物半导体场效应晶体管串联起来,但是在这种情况下,低端金属氧化物半导体场效应晶体管85为n-通道金属氧化物半导体场效应晶体管,高端金属氧化物半导体场效应晶体管95为p-通道金属氧化物半导体场效应晶体管。在该结构中,高端金属氧化物半导体场效应晶体管95的漏极连接到低端金属氧化物半导体场效应晶体管85的漏极上,构成一个如图11至14所示的较简单的堆栈结构。
参见图11和12,依据图10B所示的另一个实施例和电路,第一半导体晶片122与图3类似地倒装安装在基础引线框120上。第一夹片结构125连接到第一半导体晶片122的漏极上;但是在这种情况下,第一夹片结构125仅由一个导电段构成。安装第二半导体晶片124,使栅极接头146和源极接头148背对第一半导体晶片122。第二半导体晶片124的漏极接头150对着第一夹片结构125。与第一夹片结构25不同,第一夹片结构125具有由单独导电元件构成的单一结构,并同第二半导体晶片124的漏极接头150以及第一半导体晶片122的漏极接头电连接起来。
栅极和源极接头146和148与第二夹片结构126电接触。与第一夹片结构25类似,第二夹片结构126含有数个空间分离的导电段140和142。利用任意已知技术,导电段140与源极接头148电接触,并与段142电绝缘。如图所示,导电段140和142之间,存在一个空洞144。导电段140与栅极接头146电接触,并利用导电环氧树脂等已知技术,连接到栅极接头146上。然后,如图14所示,将该堆栈部分或全部密封在成型混料152中。
如图所示,引线112、117和118与基础引线框120集成起来,引线113和114与第一夹片结构125集成起来。引线111、115和116与第二夹片结构126集成起来。因此,引线112和117作为引线框封装110的引脚外露,用于第一半导体晶片122的源极接头。引线118作为第一半导体晶片122的栅极接头的引脚外露。引线113和114作为第二半导体晶片124的漏极接头150以及第一半导体晶片122的漏极接头的引线外露。引线115和116作为第二半导体晶片124的源极接头148的引脚外露,引线111作为第二半导体晶片124的栅极接头146的引脚外露。在这种情况下,第一半导体晶片122为低端n-通道金属氧化物半导体场效应晶体管85(如图10B所示),第二半导体晶片124为高端p-通道金属氧化物半导体场效应晶体管95。
尽管,如图所示的引脚111-118与基础引线框120、第一夹片结构125或第二夹片结构126的其中之一集成起来,但这并不是必须的。例如,引线111-118中的任何一个引线,都可以集成在基础引线框的一段上,并利用上述的任意已知技术,与第一夹片结构125或第二夹片结构126电接触。此外,也可以如上所述,用引线接合或带接合代替第二夹片结构。
如上所述的晶片堆栈结构也可以同控制集成电路(IC)芯片一起封装,以形成如图15A和15B所示的集成功率IC封装。图15B表示图15A沿线15B的剖面。对于一个5x5的QFN(四芯平板无引线)封装而言,基础引线框220含有数个引线221。在这种情况下,基础引线框220的引线221可能在两个正交方向上延伸。如上所述,第一半导体晶片222可以利用倒装法安装在基础引线框220上。由导电段240和242构成的第一夹片结构225可以连接在第一半导体晶片222上方。非导电的突出物147首先形成在第一夹片结构225的底部,以实现水平放置,并如上所述,使段242电连接到第一半导体晶片222上。突出物247之间的导电粘合剂可以将段240电连接到第一半导体晶片上。第二半导体晶片224可以安装在第一夹片结构的段240和242上。第二夹片结构226可以位于第二半导体晶片224上方。如图所示,第一和第二夹片结构225和226不具有在它们内部集成的引线,但却连接到其他结构上,引线221就形成在这些其他结构上。控制器IC芯片299位于堆栈式半导体晶片222和224附近,一同封装在基础引线框220上。例如通过非导电环氧树脂,可以将控制器IC芯片299非导电地安装在基础引线框220上。从而,构成一个集成功率IC封装。该芯片封装的结构如图中虚线254所示。接合引线231可以将IC芯片299连接到各个引线221上,并通过引线221连接到半导体晶片222和224的栅极上,以便控制半导体就。例如,IC芯片299可以是一个功率IC控制芯片,第一和第二半导体晶片222和224可以分别是低端和高端场效应管(FET),以构成一个集成功率IC封装。
这种非导电突出物也可以用于2010年3月18日存档的美国申请案12/726,892的延续部分中。在图16A和16B(摘自美国申请案12/726,892的图26和28)中,表示了一种堆栈式晶片半导体封装910。图16B表示图16A的剖面28-28。一个含有导电段906、907、908、909、910和911的基础引线框位于底部。第一半导体晶片900安装在基础引线框的段907上。如图所示,半导体安装在器件正面,也就是说,没有采用倒装法安装。含有导电段912和913的第一夹片结构位于第一半导体晶片900上。第二半导体晶片902位于第一夹片结构段912和913上方。一个单独的非导电突出物947位于夹片结构段913上方,以便防止电连接到第二半导体晶片902上。第二半导体晶片902也安装在器件正面。最终,含有导电段920和921的第二夹片结构位于第二半导体晶片902上方。封装910装入成型混料986中。
在这种情况下,第一半导体晶片900为高端金属氧化物半导体场效应晶体管80(如图10A所示),第二半导体晶片902为低端金属氧化物半导体场效应晶体管90,并具有朝上的源极和栅极接头(图中没有表示出),以及朝下的漏极接头(图中没有表示出)。在这种情况下,低端金属氧化物半导体场效应晶体管晶片902堆栈在高端金属氧化物半导体场效应晶体管晶片900上方,但至少与高端金属氧化物半导体场效应晶体管晶片900一样大。由于高端栅极夹片913没有电连接到低端金属氧化物半导体场效应晶体管晶片902上,因此低端金属氧化物半导体场效应晶体管晶片902可以重叠在高端金属氧化物半导体场效应晶体管晶片900的栅极接头(图中没有表示出)上。非导电突出物947有助于确保这两个金属氧化物半导体场效应晶体管晶片之间没有电接触,并当安装在第一夹片结构段912和913上时,使第二半导体晶片902水平和稳固。
堆栈式晶片结构也可以在由两个重叠段构成的第一夹片结构的可选结构中实现。参见图17A-17C,含有导电段333和334的第一半导体晶片322利用倒装法,以一种类似于上述的方式安装在基础引线框320上。图17A表示基础引线框320的俯视图。基础引线框320也含有导电引线段335、336和337。图17A-1为图17A沿线17A-1的剖面图,在图中所示的引线段(例如335)具有升高的末端。作为示例,在连接第一半导体晶片322之前,首先在导电段333和334(图17B所示)上方使用导电粘合剂307。还可选择,如图17A’所示,基础引线框320’含有一个凹槽313,位于其边缘附近的顶面上。凹槽313可以用于在连接过程中,容纳焊锡等导电粘合剂。图17A’-1表示凹槽313的剖面图。半导体晶片322导电连接到基础引线框段333和334上。晶片322的栅极接头331面朝下,但其相对位置如图17C中的虚线所示。栅极接头331接触基础引线框320的导电段334,同时源极接头(图中没有表示出)接触基础引线框320的导电段333。图17C-1为图17C沿线17C-1的剖面图,该图表示半导体晶片322安装在基础引线框段333和334上方。作为示例,基础引线框段335升高部分的顶部,可以与半导体晶片322的顶部共面。
参见图17D-17F,在第一半导体晶片322上合基础引线框320的引线段335上,使用导电粘合剂308。第一夹片结构325的第一段340连接在第一半导体晶片322上。第一段340的一端也连接到基础引线框的引线段335上。第一夹片结构325的第二段342非导电地(例如通过非导电环氧树脂)连接在第一段340上;第二段342也在另一端连接到基础引线框的引线段336上。还可选择,利用非导电突出物(图中没有表示出),在第一段340和第二段342之间,确保合适的空间和非导电。如图17E-1沿线17E-1的剖面图所示,第一段340含有一个锯齿形结构。锯齿形形状具有弹性,缩小的固定接触区使晶片/夹片交界面处的应力释放出来。锯齿形结构还使导电粘合剂排气,从而减少空洞的形成,并改善电学性能和可靠性。锯齿形模式含有一系列较低的底面340a,在这些底面上夹片第一段340连接在第一半导体晶片322上。第一段340的顶部应含有一个凹陷的部分340b,第二段342可以连接在该部分上。这使得第二段342的顶部和第一段340的顶部共面,如图17F-1沿17F的线17F-1的剖面图所示。通过冲压、弯曲或刻蚀,形成凹陷部分340b。图17E-2和17E-3表示第一夹片结构第一段340’和340”的可选形状。鉴于凹陷部分340b,第二段342的顶部可以与第一段340的顶部共面。
然后,如图17G所示,在第一夹片结构325的第一段340和第二段342上方,设置导电粘合剂309,在第一夹片结构325的第一和第二段340和342上方,倒装法安装第二半导体晶片324。尽管,如图中虚线所示,第二半导体晶片324的栅极接头332的位置面朝下,但却与第一夹片结构325的第二段342相接触。第二半导体晶片324的源极也面朝下,与第一夹片结构325的第一段340相接触。图17H-1为图17H沿线17H-1的剖面图。由图可知,段340的下部接触第一半导体晶片322,段340的上部接触第二半导体晶片324。第二段342非导电地连接到第一段340的凹陷部分。因此,第一和第二段340和342的上部可以共面,使第二半导体晶片324堆栈在上方,同时也使其连接到第二半导体晶片栅极接头332上。第二夹片结构326安装在第二半导体晶片324上方,也连接到引线段337上。图17I-1至17I-3表示第二夹片结构326的一些可能形状的侧视图。作为示例,第一半导体晶片322可以是一个低端场效应晶体管80(如图10A所示),第二半导体晶片324可以是一个高端场效应晶体管90。
在一个实施例中,第一段340可以弯曲或冲压成型,以形成凹陷区,第二段342可以连接到凹陷区上。在一个可选实施例中,如图18A至18C所示,第一夹片结构425的第一段440具有一个半刻蚀部分440a,以形成可以连接第二段442的凹陷区。在图18B所示的第一段440的侧视图中,凹陷部分440a的位置如图中虚线所示。在图18C所示的第二段442的侧视图中,第一段440的轮廓如图中虚线所示。第一段440也可以具有由半刻蚀工艺形成的锯齿形结构,构成沿第一段440的底部散布的减薄部分440b。
在另一个可选实施例中,如图19A至19C所示,可以弯曲除去第一段540的一部分540a,使第二段542位于该处——然后,与图4类似,将第二段542非导电地连接到第一半导体晶片322上。
应理解上述说明仅是本发明的示例,以及其他在本发明意图和范围内的修正,不应认为是本发明范围的局限。因此,本发明的范围应由所附的权利要求书及其全部等价内容限定。
Claims (33)
1.一种半导体晶片堆栈,其特征在于,该半导体晶片堆栈包含:
一个基础引线框;
一个通过倒装法安装在所述的基础引线框上方的第一半导体晶片;
一个第二半导体晶片,其堆栈在第一半导体晶片上方,即所述的第一半导体晶片与基础引线框相对的一侧;
以及一个位于第一和第二半导体晶片之间的夹片结构。
2.根据权利要求1所述的半导体晶片堆栈,其特征在于,所述的第二半导体晶片为一个p-通道垂直场效应管,所述的第一半导体晶片为一个n-通道垂直场效应晶体管,其中所述的第二半导体晶片不是通过倒装法安装在第一半导体晶片上。
3.根据权利要求1所述的半导体晶片堆栈,其特征在于,所述的第二半导体晶片通过倒装法安装在第一半导体晶片上方,第一和第二半导体晶片是串联的垂直晶体管。
4.根据权利要求3所述的半导体晶片堆栈,其特征在于,所述的第一半导体晶片具有面向第二半导体晶片的第一接头,所述的第二半导体晶片具有面向第一半导体晶片的第二和第三接头,其中所述的夹片结构还包括一个第一导电段,将所述第一半导体晶片的第一接头连接到所述第二半导体晶片的第二接头上,以及一个第二导电段,连接到所述第二半导体晶片的第三接头上,但与第一半导体晶片绝缘。
5.根据权利要求4所述的半导体晶片堆栈,其特征在于,所述的第二导电段在第一导电段附近,但相互隔开。
6.根据权利要求4所述的半导体晶片堆栈,其特征在于,所述的第二导电段非导电地连接到第一半导体晶片上。
7.根据权利要求6所述的半导体晶片堆栈,其特征在于,还包含非导电的水平突出物,位于夹片结构和第一半导体晶片之间,使第一和第二导电段的顶部共面。
8.根据权利要求4所述的半导体晶片堆栈,其特征在于,还包括一个集成电路芯片,与第一半导体晶片一起封装在基础引线框上。
9.根据权利要求8所述的半导体晶片堆栈,其特征在于,所述的第一和第二半导体晶片为垂直场效应管,其中集成电路芯片通过引线框引线,连接到第一和第二半导体晶片的栅极上。
10.根据权利要求3所述的半导体晶片堆栈,其特征在于,所述的第一和第二半导体晶片都是垂直场效应管。
11.根据权利要求6所述的半导体晶片堆栈,其特征在于,所述的第一导电段在其顶部具有一个凹陷部分,其中第二导电段非导电地连接到所述的凹陷部分上。
12.根据权利要求11所述的半导体晶片堆栈,其特征在于,所述的第一导电段具有上部和下部的锯齿形形状,下部接触第一半导体晶片,上部接触第二半导体晶片,其中所述的凹陷部分对应下部中的一个。
13.根据权利要求11所述的半导体晶片堆栈,其特征在于,所述的第一导电段所述的凹陷部分为半刻蚀部分。
14.一种堆栈式结构,其特征在于,该堆栈式结构包含:一个第一半导体晶片和一个第二半导体晶片,
所述的一个第一半导体晶片和一个第二半导体晶片堆栈在一起,其中所述的第一半导体晶片具有一个第一晶片第一接头,对着第二半导体晶片;
所述的第二半导体晶片具有一个第二晶片第一接头和第二晶片第二接头,都对着第一半导体晶片,其中所述第二晶片第二接头与所述第一半导体晶片相互重叠,但不与它电接触,其中所述第二晶片第一接头与所述第一晶片第一接头相互重叠,并电接触。
15.根据权利要求14所述的堆栈式晶片结构,其特征在于,还包含:
一个位于第一和第二半导体晶片之间的夹片结构,具有第一和第二导电段,
其中第一导电段电连接到第一晶片第一接头和第二晶片第一接头上,第二导电段电连接到第二晶片第二接头上,但不连接到第一半导体晶片上。
16.根据权利要求15所述的堆栈式晶片结构,其特征在于,所述的第一和第二导电段与封装引线电接触。
17.根据权利要求15所述的堆栈式晶片结构,其特征在于,所述夹片的第二导电段与第一导电段电绝缘。
18.根据权利要求15所述的堆栈式晶片结构,其特征在于,所述的第一半导体晶片比第二半导体晶片大。
19.根据权利要求15所述的堆栈式晶片结构,其特征在于,所述的第一和第二半导体晶片为垂直场效应管。
20.根据权利要求19所述的堆栈式晶片结构,其特征在于,所述的第一晶片第一接头是一个漏极接头,所述的第二晶片第一接头是一个源极接头,所述的第二晶片第二接头是一个栅极接头。
21.根据权利要求19所述的堆栈式晶片结构,其特征在于,所述的第一半导体晶片背对着第二半导体晶片,倒装法安装,所述的第二半导体晶片朝着第一半导体晶片,倒装法安装。
22.一种半导体封装,其特征在于,该半导体封装包含:
一个第一半导体晶片;
一个连接到第一半导体晶片上的夹片结构;
以及位于夹片结构和第一半导体晶片之间的数个水平突出物,使夹片结构与半导体晶片平行,其中粘合材料位于至少某些水平突出物之间,将夹片结构连接到第一半导体晶片上。
23.根据权利要求22所述的封装,其特征在于,所述的水平突出物具有共同的高度。
24.根据权利要求22所述的封装,其特征在于,所述的夹片结构与封装引线电接触。
25.根据权利要求22所述的封装,其特征在于,所述的水平突出物是非导电的。
26.根据权利要求25所述的封装,其特征在于,至少某些所述的粘合材料是导电的,位于至少某些水平突出物之间,将至少一部分夹片结构电连接到所述第一半导体晶片上。
27.根据权利要求26所述的封装,其特征在于,所述的夹片结构还包含一个第一导电段和一个第二导电段。
28.根据权利要求27所述的封装,其特征在于,所述的第一和第二导电段的顶部是共面的。
29.根据权利要求28所述的封装,其特征在于,所述的第一导电段导电连接到第一半导体晶片上,所述的第二导电段与第一半导体晶片相互重叠,但与第一半导体晶片电绝缘。
30.根据权利要求22所述的封装,其特征在于,还包含一个堆栈在夹片结构上的第二半导体芯片,所述的第二半导体芯片在第一半导体晶片的对面。
31.一种用于制备引线框封装的方法,其特征在于,该方法包含:
将第一半导体晶片通过倒装法安装在导电的基础引线框上,所述的第一半导体晶片具有数个正面电接头,与所述的基础引线框电接触;
在所述的第一半导体晶片上方,即在所述的第一半导体晶片与基础引线框相对的一侧,设置第一夹片结构,其中所述的第一夹片结构包括第一和第二导电段;
并且通过倒装法将第二半导体晶片安装到所述的第一夹片结构上,所述的第二半导体晶片具有数个正面电接头,与所述的第一夹片结构电接触,第二半导体晶片的正面电接头的第一部分,连接到第一导电段上,并通过第一夹片结构的第一导电段,与第一半导体晶片的背部电接头电接触,第二半导体晶片的正面电接头的第二部分,连接到第一夹片结构的第二导电段上,但没有与第一半导体晶片电接触。
32.根据权利要求31所述的方法,其特征在于,设置所述的第一夹片结构还包含,设置带有数个电绝缘的水平突出物的所述的第一夹片结构,对着所述的第一半导体晶片,在所述的第一夹片结构和所述的第一半导体晶片之间,构成一个空隙。
33.根据权利要求32所述的方法,其特征在于,设置所述的带有数个电绝缘水平突出物的第一夹片结构还包含,使所述的数个绝缘突出物具有一个共同的高度。
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Also Published As
Publication number | Publication date |
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CN102194806B (zh) | 2014-09-10 |
US20140054758A1 (en) | 2014-02-27 |
US9165866B2 (en) | 2015-10-20 |
US8581376B2 (en) | 2013-11-12 |
US20110227207A1 (en) | 2011-09-22 |
TW201133724A (en) | 2011-10-01 |
TWI430407B (zh) | 2014-03-11 |
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